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From: Jorge Ramirez-Ortiz, Gmail <jorge.ramirez.ortiz@gmail.com>
To: u-boot@lists.denx.de
Subject: question: mx7ulp - LDO_ENABLED_MODE
Date: Thu, 16 Jan 2020 23:01:48 +0100	[thread overview]
Message-ID: <20200116220148.GA20815@trex> (raw)
In-Reply-To: <CAOMZO5CREf4SbdHR_ReBtp2eKNUxKS-JkQBiezwyF4ooATK-iA@mail.gmail.com>

On 16/01/20 18:33:17, Fabio Estevam wrote:
> Hi Jorge,
> 
> On Thu, Jan 16, 2020 at 5:30 PM Jorge Ramirez-Ortiz, Foundries
> <jorge@foundries.io> wrote:
> >
> > Hi Fabio,
> >
> > I am trying to enable LDO in an imx7ulp based board but somehow the
> > board locks up as soon I  write to PMC1_RUN (using the init_ldo_mode
> > sequence).
> 
> Just looked at the i.MX7UL Reference Manual and it says:
> 
> "28.5.9.1.1 Using internal LDO regulator
> After a POR event, when the PMC 0 is running in RUN mode and the PMC 1 is turned
> off, the process to turn on the PMC 1 using the internal LDO regulator
> is as follows:
> • Assert the LDOEN bit (PMC0_CTRL).
> • Assert the LDOOKDIS bit (PMC0_CTRL) if required.
> • Assert the PMC1ON bit (PMC0_CTRL)."
> 
> So it seems we need to change the order to:
> 
> --- a/arch/arm/mach-imx/mx7ulp/soc.c
> +++ b/arch/arm/mach-imx/mx7ulp/soc.c
> @@ -122,9 +122,6 @@ static void init_ldo_mode(void)
>  {
>         unsigned int reg;
> 
> -       /* Set LDOOKDIS */
> -       setbits_le32(PMC0_BASE_ADDR + PMC0_CTRL, PMC0_CTRL_LDOOKDIS);
> -
>         /* Set LDOVL to 0.95V in PMC1_RUN */
>         reg = readl(PMC1_BASE_ADDR + PMC1_RUN);
>         reg &= ~PMC1_LDOVL_MASK;
> @@ -151,6 +148,9 @@ static void init_ldo_mode(void)
>         /* Set LDOEN bit */
>         setbits_le32(PMC0_BASE_ADDR + PMC0_CTRL, PMC0_CTRL_LDOEN);
> 
> +       /* Set LDOOKDIS */
> +       setbits_le32(PMC0_BASE_ADDR + PMC0_CTRL, PMC0_CTRL_LDOOKDIS);
> +
>         /* Set the PMC1ON bit */
>         setbits_le32(PMC0_BASE_ADDR + PMC0_CTRL, PMC0_CTRL_PMC1ON);
>  }
> 
> Does this help?

no, unfortunately the same thing.
I think PMC0_CTRL_PMC1ON should not be on but cant figure out who sets it up.


> 
> > I think it is interesting that bit PMC0_CTRL_PMC1ON is already set so
> > I am wondering if you think it is possible - in your experience- that
> > ROM might have already configured LDO? or was this also the case -
> > this bit already set- when you tested the feature?
> 
> I think it was not set by default. I can confirm tomorrow with a
> i.MX7ULP Embedded Artists board.

that would be awesome. thanks a lot!

> 
> Regards,
> 
> Fabio Estevam

  parent reply	other threads:[~2020-01-16 22:01 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-01-16 20:30 question: mx7ulp - LDO_ENABLED_MODE Jorge
2020-01-16 21:33 ` Fabio Estevam
2020-01-16 21:51   ` Fabio Estevam
2020-01-16 22:04     ` Fabio Estevam
2020-01-16 22:24       ` Jorge
2020-01-16 22:38         ` Fabio Estevam
2020-01-17  9:24           ` Jorge
2020-01-16 22:01   ` Jorge [this message]
2020-01-17 13:26 ` Fabio Estevam
2020-01-17 14:26   ` Jorge
2020-01-17 16:51   ` Jorge
2020-01-17 17:18     ` Fabio Estevam
2020-01-17 18:40       ` Jorge
2020-01-17 18:53         ` Fabio Estevam
2020-01-17 19:02           ` Jorge

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