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From: "Roger Pau Monné" <roger.pau@citrix.com>
To: Andrew Cooper <andrew.cooper3@citrix.com>
Cc: xen-devel@lists.xenproject.org, Wei Liu <wl@xen.org>,
	Jan Beulich <jbeulich@suse.com>
Subject: Re: [Xen-devel] [PATCH] x86/apic: fix disabling LVT0 in disconnect_bsp_APIC
Date: Fri, 17 Jan 2020 17:11:10 +0100	[thread overview]
Message-ID: <20200117161110.GU11756@Air-de-Roger> (raw)
In-Reply-To: <50fb04ef-8dcb-3613-b909-f0c590d323e9@citrix.com>

On Fri, Jan 17, 2020 at 03:30:44PM +0000, Andrew Cooper wrote:
> On 17/01/2020 15:09, Roger Pau Monne wrote:
> > The Intel SDM states:
> >
> > "When an illegal vector value (0 to 15) is written to a LVT entry and
> > the delivery mode is Fixed (bits 8-11 equal 0), the APIC may signal an
> > illegal vector error, without regard to whether the mask bit is set or
> > whether an interrupt is actually seen on the input."
> >
> > And that's exactly what's currently done in disconnect_bsp_APIC when
> > virt_wire_setup is true and LVT LINT0 is being masked. By writing only
> > APIC_LVT_MASKED Xen is actually setting the vector to 0 and the
> > delivery mode to Fixed (0), and hence it triggers an APIC error even
> > when the LVT entry is masked.
> >
> > This would usually manifest when Xen is being shut down, as that's
> > where disconnect_bsp_APIC is called:
> >
> > (XEN) APIC error on CPU0: 40(00)
> >
> > Fix this by reusing the current LVT LINT0 value and just adding the
> > mask bit to it.
> >
> > Reported-by: Andrew Cooper <andrew.cooper3@citrix.com>
> > Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
> > ---
> >  xen/arch/x86/apic.c | 3 ++-
> >  1 file changed, 2 insertions(+), 1 deletion(-)
> >
> > diff --git a/xen/arch/x86/apic.c b/xen/arch/x86/apic.c
> > index a6a7754d77..e4363639bd 100644
> > --- a/xen/arch/x86/apic.c
> > +++ b/xen/arch/x86/apic.c
> > @@ -281,7 +281,8 @@ void disconnect_bsp_APIC(int virt_wire_setup)
> >          }
> >          else {
> >              /* Disable LVT0 */
> > -            apic_write(APIC_LVT0, APIC_LVT_MASKED);
> > +            value = apic_read(APIC_LVT0);
> > +            apic_write(APIC_LVT0, value | APIC_LVT_MASKED);
> >          }
> 
> This really is ugly.  It seems that we can't write LVT0 to the same
> state that it has after reset/INIT.
> 
> For the code however, both halves of the if() condition do a
> read/modify/write.  It would be nicer to have the read and write common,
> with modify alone having the if().

As said on my reply to Jan, we could do the same as clear_local_APIC
if that seems preferable.

Thanks, Roger.

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  reply	other threads:[~2020-01-17 16:11 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-01-17 15:09 [Xen-devel] [PATCH] x86/apic: fix disabling LVT0 in disconnect_bsp_APIC Roger Pau Monne
2020-01-17 15:30 ` Andrew Cooper
2020-01-17 16:11   ` Roger Pau Monné [this message]
2020-01-17 15:56 ` Jan Beulich
2020-01-17 16:08   ` Roger Pau Monné
2020-01-17 16:25     ` Jan Beulich
2020-01-23 15:43       ` Roger Pau Monné
2020-01-23 15:58         ` Jan Beulich

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