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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 14/20] hw/core/or-irq: Increase limit of or-lines to 48
Date: Thu, 23 Jan 2020 15:30:35 +0000	[thread overview]
Message-ID: <20200123153041.4248-15-peter.maydell@linaro.org> (raw)
In-Reply-To: <20200123153041.4248-1-peter.maydell@linaro.org>

From: Guenter Roeck <linux@roeck-us.net>

Exynos DMA requires up to 33 interrupt lines (32 event interrupts
plus abort interrupt), which all need to be wired together. Increase
the maximum number of or-irq lines to 48 to support this configuration.

Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Message-id: 20200123052540.6132-3-linux@roeck-us.net
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
---
 include/hw/or-irq.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/hw/or-irq.h b/include/hw/or-irq.h
index 3a3230dd844..0038bfbe3d6 100644
--- a/include/hw/or-irq.h
+++ b/include/hw/or-irq.h
@@ -33,7 +33,7 @@
 /* This can safely be increased if necessary without breaking
  * migration compatibility (as long as it remains greater than 15).
  */
-#define MAX_OR_LINES      32
+#define MAX_OR_LINES      48
 
 typedef struct OrIRQState qemu_or_irq;
 
-- 
2.20.1



  parent reply	other threads:[~2020-01-23 17:18 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-01-23 15:30 [PULL 00/20] target-arm queue Peter Maydell
2020-01-23 15:30 ` [PULL 01/20] target/arm: add PMU feature to cortex-r5 and cortex-r5f Peter Maydell
2020-01-23 15:30 ` [PULL 02/20] target/arm: Fix PAuth sbox functions Peter Maydell
2020-01-23 15:30 ` [PULL 03/20] tests/tcg/aarch64: Fix compilation parameters for pauth-% Peter Maydell
2020-01-23 15:30 ` [PULL 04/20] tests/tcg/aarch64: Add pauth-3 Peter Maydell
2020-01-23 15:30 ` [PULL 05/20] tests/tcg/aarch64: Add pauth-4 Peter Maydell
2020-01-23 15:30 ` [PULL 06/20] hw/acpi: Remove extra indent in ACPI GED hotplug cb Peter Maydell
2020-01-23 15:30 ` [PULL 07/20] hw/arm: Use helper function to trigger hotplug handler plug Peter Maydell
2020-01-23 15:30 ` [PULL 08/20] qemu-nbd: Convert invocation documentation to rST Peter Maydell
2020-01-23 15:30 ` [PULL 09/20] docs: Create stub system manual Peter Maydell
2020-01-23 15:30 ` [PULL 10/20] qemu-block-drivers: Convert to rST Peter Maydell
2020-01-23 15:30 ` [PULL 11/20] target/arm/arch_dump: Add SVE notes Peter Maydell
2020-01-23 15:30 ` [PULL 12/20] hw/misc/stm32f4xx_syscfg: Fix copy/paste error Peter Maydell
2020-01-23 15:30 ` [PULL 13/20] dma/pl330: Convert to support tracing Peter Maydell
2020-01-23 15:30 ` Peter Maydell [this message]
2020-01-23 15:30 ` [PULL 15/20] hw/arm/exynos4210: Fix DMA initialization Peter Maydell
2020-01-23 15:30 ` [PULL 16/20] hw/char/exynos4210_uart: Convert to support tracing Peter Maydell
2020-01-23 15:30 ` [PULL 17/20] hw/char/exynos4210_uart: Implement post_load function Peter Maydell
2020-01-23 15:30 ` [PULL 18/20] hw/char/exynos4210_uart: Implement Rx FIFO level triggers and timeouts Peter Maydell
2020-01-23 15:30 ` [PULL 19/20] hw/char/exynos4210_uart: Add receive DMA support Peter Maydell
2020-01-23 15:30 ` [PULL 20/20] hw/arm/exynos4210: Connect serial port DMA busy signals with pl330 Peter Maydell

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