From mboxrd@z Thu Jan 1 00:00:00 1970 From: Lukasz Majewski Date: Tue, 28 Jan 2020 09:14:20 +0100 Subject: [PATCH v2 05/21] clk: imx: pllv3: add enable() support In-Reply-To: <20200110144711.81938-6-giulio.benetti@benettiengineering.com> References: <20200110144711.81938-1-giulio.benetti@benettiengineering.com> <20200110144711.81938-6-giulio.benetti@benettiengineering.com> Message-ID: <20200128091420.059c8e16@jawa> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi Giulio, > Before set_rate() pllv3 needs enable() to power the pll up. > Add enable() taking into account different power_bit and > different powerup_set, because some pll needs its power_bit to be > set or reset to be powered on. I do guess that this code is similar to what we do have in the Linux kernel (and which I've probably omitted as it was not needed in the i.MX6Q use case)? > > Signed-off-by: Giulio Benetti > --- > drivers/clk/imx/clk-pllv3.c | 24 ++++++++++++++++++++++++ > 1 file changed, 24 insertions(+) > > diff --git a/drivers/clk/imx/clk-pllv3.c b/drivers/clk/imx/clk-pllv3.c > index 02c75c37ea..d8cbe3dd4e 100644 > --- a/drivers/clk/imx/clk-pllv3.c > +++ b/drivers/clk/imx/clk-pllv3.c > @@ -16,9 +16,13 @@ > #define UBOOT_DM_CLK_IMX_PLLV3_GENERIC "imx_clk_pllv3_generic" > #define UBOOT_DM_CLK_IMX_PLLV3_USB "imx_clk_pllv3_usb" > > +#define BM_PLL_POWER (0x1 << 12) > + > struct clk_pllv3 { > struct clk clk; > void __iomem *base; > + u32 power_bit; > + bool powerup_set; > u32 div_mask; > u32 div_shift; > }; > @@ -35,8 +39,24 @@ static ulong clk_pllv3_generic_get_rate(struct clk > *clk) return (div == 1) ? parent_rate * 22 : parent_rate * 20; > } > > +static int clk_pllv3_generic_enable(struct clk *clk) > +{ > + struct clk_pllv3 *pll = to_clk_pllv3(clk); > + u32 val; > + > + val = readl(pll->base); > + if (pll->powerup_set) > + val |= pll->power_bit; > + else > + val &= ~pll->power_bit; > + writel(val, pll->base); > + > + return 0; > +} > + > static const struct clk_ops clk_pllv3_generic_ops = { > .get_rate = clk_pllv3_generic_get_rate, > + .enable = clk_pllv3_generic_enable, > }; > > struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name, > @@ -52,14 +72,18 @@ struct clk *imx_clk_pllv3(enum imx_pllv3_type > type, const char *name, if (!pll) > return ERR_PTR(-ENOMEM); > > + pll->power_bit = BM_PLL_POWER; > + > switch (type) { > case IMX_PLLV3_GENERIC: > drv_name = UBOOT_DM_CLK_IMX_PLLV3_GENERIC; > pll->div_shift = 0; > + pll->powerup_set = false; > break; > case IMX_PLLV3_USB: > drv_name = UBOOT_DM_CLK_IMX_PLLV3_USB; > pll->div_shift = 1; > + pll->powerup_set = true; > break; > default: > kfree(pll); Best regards, Lukasz Majewski -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma at denx.de -------------- next part -------------- A non-text attachment was scrubbed... Name: not available Type: application/pgp-signature Size: 488 bytes Desc: OpenPGP digital signature URL: