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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v17 0/6] Enable second DBuf slice for ICL and TGL
Date: Wed, 5 Feb 2020 20:40:06 +0200	[thread overview]
Message-ID: <20200205184005.GM13686@intel.com> (raw)
In-Reply-To: <20200202230630.8975-1-stanislav.lisovskiy@intel.com>

On Mon, Feb 03, 2020 at 01:06:24AM +0200, Stanislav Lisovskiy wrote:
> Those patch series, do some initial preparation DBuf manipulating code
> cleanups, i.e remove redundant structures/code, switch to mask
> based DBuf manupulation, get into use DBuf assignment according to
> BSpec rules.
> 
> Stanislav Lisovskiy (6):
>   drm/i915: Remove skl_ddl_allocation struct
>   drm/i915: Move dbuf slice update to proper place
>   drm/i915: Update dbuf slices only with full modeset
>   drm/i915: Introduce parameterized DBUF_CTL
>   drm/i915: Manipulate DBuf slices properly
>   drm/i915: Correctly map DBUF slices to pipes

Pushed the lot to dinq. Thanks for the patches and reviews.

> 
>  drivers/gpu/drm/i915/display/intel_display.c  |  54 ++-
>  .../drm/i915/display/intel_display_power.c    | 100 ++--
>  .../drm/i915/display/intel_display_power.h    |   5 +
>  .../drm/i915/display/intel_display_types.h    |   4 +-
>  drivers/gpu/drm/i915/gvt/handlers.c           |   2 +-
>  drivers/gpu/drm/i915/i915_drv.h               |  11 +-
>  drivers/gpu/drm/i915/i915_pci.c               |   5 +-
>  drivers/gpu/drm/i915/i915_reg.h               |   6 +-
>  drivers/gpu/drm/i915/intel_device_info.h      |   1 +
>  drivers/gpu/drm/i915/intel_pm.c               | 449 +++++++++++++++---
>  drivers/gpu/drm/i915/intel_pm.h               |   5 +-
>  11 files changed, 479 insertions(+), 163 deletions(-)
> 
> -- 
> 2.24.1.485.gad05a3d8e5

-- 
Ville Syrjälä
Intel
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  parent reply	other threads:[~2020-02-05 18:40 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-02-02 23:06 [Intel-gfx] [PATCH v17 0/6] Enable second DBuf slice for ICL and TGL Stanislav Lisovskiy
2020-02-02 23:06 ` [Intel-gfx] [PATCH v17 1/6] drm/i915: Remove skl_ddl_allocation struct Stanislav Lisovskiy
2020-02-02 23:06 ` [Intel-gfx] [PATCH v17 2/6] drm/i915: Move dbuf slice update to proper place Stanislav Lisovskiy
2020-02-02 23:06 ` [Intel-gfx] [PATCH v17 3/6] drm/i915: Update dbuf slices only with full modeset Stanislav Lisovskiy
2020-02-02 23:06 ` [Intel-gfx] [PATCH v17 4/6] drm/i915: Introduce parameterized DBUF_CTL Stanislav Lisovskiy
2020-02-02 23:06 ` [Intel-gfx] [PATCH v17 5/6] drm/i915: Manipulate DBuf slices properly Stanislav Lisovskiy
2020-02-02 23:06 ` [Intel-gfx] [PATCH v17 6/6] drm/i915: Correctly map DBUF slices to pipes Stanislav Lisovskiy
2020-02-02 23:47 ` [Intel-gfx] ✓ Fi.CI.BAT: success for Enable second DBuf slice for ICL and TGL (rev23) Patchwork
2020-02-05 11:33 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2020-02-05 12:57   ` Lisovskiy, Stanislav
2020-02-05 13:05     ` Lisovskiy, Stanislav
2020-02-05 18:40 ` Ville Syrjälä [this message]
2020-02-06  8:40 ` [Intel-gfx] ✓ Fi.CI.IGT: success " Patchwork
  -- strict thread matches above, loose matches on Subject: below --
2020-02-02 22:59 [Intel-gfx] [PATCH v17 0/6] Enable second DBuf slice for ICL and TGL Stanislav Lisovskiy

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