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From: Anshuman Gupta <anshuman.gupta@intel.com>
To: Jani Nikula <jani.nikula@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 3/7] drm/i915: Fix broken transcoder err state
Date: Thu, 6 Feb 2020 15:53:09 +0530	[thread overview]
Message-ID: <20200206102309.GL24118@intel.com> (raw)
In-Reply-To: <87imkmwbp5.fsf@intel.com>

On 2020-02-04 at 18:37:26 +0200, Jani Nikula wrote:
> On Tue, 04 Feb 2020, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
> > On Tue, Feb 04, 2020 at 04:59:23PM +0530, Anshuman Gupta wrote:
> >> Skip the trascoder whose pipe is disabled while
> >> initializing trascoder error state in 3 display
> >> pipe syatem.
> >> 
> >> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
> >> ---
> >>  drivers/gpu/drm/i915/display/intel_display.c | 4 +++-
> >>  1 file changed, 3 insertions(+), 1 deletion(-)
> >> 
> >> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> >> index 5709e672151a..cf36c3d0f8fc 100644
> >> --- a/drivers/gpu/drm/i915/display/intel_display.c
> >> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> >> @@ -18607,8 +18607,10 @@ intel_display_capture_error_state(struct drm_i915_private *dev_priv)
> >>  
> >>  	for (i = 0; i < ARRAY_SIZE(error->transcoder); i++) {
> >>  		enum transcoder cpu_transcoder = transcoders[i];
> >> +		enum pipe pipe = (enum pipe)cpu_transcoder;
> >
> > Not correct for EDP transcoder.
> 
> Nor DSI?
> 
> BR,
> Jani.
> 
> >
> >>  
> >> -		if (!INTEL_INFO(dev_priv)->trans_offsets[cpu_transcoder])
Is it ok to make trans_offsets[] NULL for disabled pipe as an another approach?
Thanks,
Anshuman Gupta.
> >> +		if (!INTEL_INFO(dev_priv)->trans_offsets[cpu_transcoder] &&
> >> +		    !(INTEL_INFO(dev_priv)->pipe_mask & BIT(pipe)))
> >>  			continue;
> >>  
> >>  		error->transcoder[i].available = true;
> >> -- 
> >> 2.24.0
> 
> -- 
> Jani Nikula, Intel Open Source Graphics Center
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  reply	other threads:[~2020-02-06 10:31 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-02-04 11:29 [Intel-gfx] [PATCH 0/7] 3 display pipes combination system support Anshuman Gupta
2020-02-04 11:29 ` [Intel-gfx] [PATCH 1/7] drm/i915: Iterate over pipe and skip the disabled one Anshuman Gupta
2020-02-04 11:29 ` [Intel-gfx] [PATCH 2/7] drm/i915: Remove (pipe == crtc->index) assumption Anshuman Gupta
2020-02-04 11:52   ` Jani Nikula
2020-02-04 14:36   ` Ville Syrjälä
2020-02-05  8:02     ` Anshuman Gupta
2020-02-05 11:07       ` Ville Syrjälä
2020-02-04 11:29 ` [Intel-gfx] [PATCH 3/7] drm/i915: Fix broken transcoder err state Anshuman Gupta
2020-02-04 14:28   ` Ville Syrjälä
2020-02-04 16:37     ` Jani Nikula
2020-02-06 10:23       ` Anshuman Gupta [this message]
2020-02-04 11:29 ` [Intel-gfx] [PATCH 4/7] drm/i915: Fix wrongly populated plane possible_crtcs bit mask Anshuman Gupta
2020-02-04 14:30   ` Ville Syrjälä
2020-02-04 16:44     ` Ville Syrjälä
2020-02-06 10:15       ` Anshuman Gupta
2020-02-04 11:29 ` [Intel-gfx] [PATCH 5/7] drm/i915: Get right max plane stride Anshuman Gupta
2020-02-04 14:30   ` Ville Syrjälä
2020-02-04 11:29 ` [Intel-gfx] [PATCH 6/7] drm/i915: Add WARN_ON in intel_get_crtc_for_pipe() Anshuman Gupta
2020-02-04 11:29 ` [Intel-gfx] [PATCH 7/7] drm/i915: Enable 3 display pipes support Anshuman Gupta
2020-02-04 14:35   ` Ville Syrjälä
2020-02-05  1:36 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for 3 display pipes combination system support (rev2) Patchwork

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