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Mon, 10 Feb 2020 16:15:29 -0800 (PST) Received: from ast-mbp ([2620:10d:c090:200::2:685c]) by smtp.gmail.com with ESMTPSA id z26sm1201161pgu.80.2020.02.10.16.15.28 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 10 Feb 2020 16:15:29 -0800 (PST) Date: Mon, 10 Feb 2020 16:15:27 -0800 From: Alexei Starovoitov To: Palmer Dabbelt Cc: Bjorn Topel , daniel@iogearbox.net, ast@kernel.org, zlim.lnx@gmail.com, catalin.marinas@arm.com, will@kernel.org, kafai@fb.com, songliubraving@fb.com, yhs@fb.com, andriin@fb.com, shuah@kernel.org, netdev@vger.kernel.org, bpf@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org, clang-built-linux@googlegroups.com, kernel-team@android.com Subject: Re: [PATCH 4/4] arm64: bpf: Elide some moves to a0 after calls Message-ID: <20200211001526.xbfwdnpjqrg3ed6q@ast-mbp> References: <20200128021145.36774-1-palmerdabbelt@google.com> <20200128021145.36774-5-palmerdabbelt@google.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20200128021145.36774-5-palmerdabbelt@google.com> User-Agent: NeoMutt/20180223 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Jan 27, 2020 at 06:11:45PM -0800, Palmer Dabbelt wrote: > > + /* Handle BPF_REG_0, which may be in the wrong place because the ARM64 > + * ABI doesn't match the BPF ABI for function calls. */ > + if (ctx->reg0_in_reg1) { > + /* If we're writing BPF_REG_0 then we don't need to do any > + * extra work to get the registers back in their correct > + * locations. */ > + if (insn->dst_reg == BPF_REG_0) > + ctx->reg0_in_reg1 = false; > + > + /* If we're writing to BPF_REG_1 then we need to save BPF_REG_0 > + * into the correct location if it's still alive, as otherwise > + * it will be clobbered. */ > + if (insn->dst_reg == BPF_REG_1) { > + if (!dead_register(ctx, off + 1, BPF_REG_0)) > + emit(A64_MOV(1, A64_R(7), A64_R(0)), ctx); > + ctx->reg0_in_reg1 = false; > + } > + } I'm not sure this is correct, since it processes insns as a linear code, but there could be jumps in the middle. The logic should be following the control flow of the program. The verifier is a better place to do such analysis. I don't see how JITs can do it on their own. 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Mon, 10 Feb 2020 16:15:29 -0800 (PST) Date: Mon, 10 Feb 2020 16:15:27 -0800 From: Alexei Starovoitov To: Palmer Dabbelt Subject: Re: [PATCH 4/4] arm64: bpf: Elide some moves to a0 after calls Message-ID: <20200211001526.xbfwdnpjqrg3ed6q@ast-mbp> References: <20200128021145.36774-1-palmerdabbelt@google.com> <20200128021145.36774-5-palmerdabbelt@google.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20200128021145.36774-5-palmerdabbelt@google.com> User-Agent: NeoMutt/20180223 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200210_161531_526421_5CF4009E X-CRM114-Status: GOOD ( 17.21 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: songliubraving@fb.com, andriin@fb.com, daniel@iogearbox.net, kernel-team@android.com, Bjorn Topel , shuah@kernel.org, ast@kernel.org, linux-kernel@vger.kernel.org, clang-built-linux@googlegroups.com, netdev@vger.kernel.org, linux-kselftest@vger.kernel.org, catalin.marinas@arm.com, zlim.lnx@gmail.com, yhs@fb.com, bpf@vger.kernel.org, will@kernel.org, kafai@fb.com, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, Jan 27, 2020 at 06:11:45PM -0800, Palmer Dabbelt wrote: > > + /* Handle BPF_REG_0, which may be in the wrong place because the ARM64 > + * ABI doesn't match the BPF ABI for function calls. */ > + if (ctx->reg0_in_reg1) { > + /* If we're writing BPF_REG_0 then we don't need to do any > + * extra work to get the registers back in their correct > + * locations. */ > + if (insn->dst_reg == BPF_REG_0) > + ctx->reg0_in_reg1 = false; > + > + /* If we're writing to BPF_REG_1 then we need to save BPF_REG_0 > + * into the correct location if it's still alive, as otherwise > + * it will be clobbered. */ > + if (insn->dst_reg == BPF_REG_1) { > + if (!dead_register(ctx, off + 1, BPF_REG_0)) > + emit(A64_MOV(1, A64_R(7), A64_R(0)), ctx); > + ctx->reg0_in_reg1 = false; > + } > + } I'm not sure this is correct, since it processes insns as a linear code, but there could be jumps in the middle. The logic should be following the control flow of the program. The verifier is a better place to do such analysis. I don't see how JITs can do it on their own. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel