From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.5 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B4003C5ACC4 for ; Thu, 20 Feb 2020 01:01:48 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7CEC921D56 for ; Thu, 20 Feb 2020 01:01:48 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=gibson.dropbear.id.au header.i=@gibson.dropbear.id.au header.b="NnZ+yQvH" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 7CEC921D56 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=gibson.dropbear.id.au Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:34446 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j4aDr-0000vT-L0 for qemu-devel@archiver.kernel.org; Wed, 19 Feb 2020 20:01:47 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:55493) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j4aD6-0000Nh-Oo for qemu-devel@nongnu.org; Wed, 19 Feb 2020 20:01:02 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j4aD4-0001bE-P4 for qemu-devel@nongnu.org; Wed, 19 Feb 2020 20:01:00 -0500 Received: from bilbo.ozlabs.org ([203.11.71.1]:45861 helo=ozlabs.org) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1j4aD3-0000KD-Fj; Wed, 19 Feb 2020 20:00:58 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 48NGVQ64zGz9sRs; Thu, 20 Feb 2020 12:00:46 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1582160446; bh=uQSYvMR9+vv1L+ayE+jTPJEHEhskcy0Mxf3Tt0vc578=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=NnZ+yQvHjJlvRI7vi/QOePUtuh+tE0edFOzqiSfutvuZLMrNNNU+Ao7JgFRUtOz5b WLL5+9ko60eDuXrDlGLLOoAZDUEhVGIJuVVIqiQWigmHxWipHe7QTYGw6NK6mC2gYg ghmLu9MGMriaujEBJBXninDlmL15L+vvSIg+aM7s= Date: Thu, 20 Feb 2020 11:36:15 +1100 From: David Gibson To: BALATON Zoltan Subject: Re: [PATCH v3 02/12] ppc: Remove stub of PPC970 HID4 implementation Message-ID: <20200220003615.GK1764@umbus.fritz.box> References: <20200219005414.15635-1-david@gibson.dropbear.id.au> <20200219005414.15635-3-david@gibson.dropbear.id.au> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="zYjDATHXTWnytHRU" Content-Disposition: inline In-Reply-To: X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 203.11.71.1 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, groug@kaod.org, qemu-devel@nongnu.org, paulus@samba.org, clg@kaod.org, qemu-ppc@nongnu.org, philmd@redhat.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" --zYjDATHXTWnytHRU Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Wed, Feb 19, 2020 at 12:18:34PM +0100, BALATON Zoltan wrote: > On Wed, 19 Feb 2020, David Gibson wrote: > > The PowerPC 970 CPU was a cut-down POWER4, which had hypervisor capabil= ity. > > However, it can be (and often was) strapped into "Apple mode", where the > > hypervisor capabilities were disabled (essentially putting it always in > > hypervisor mode). > >=20 > > That's actually the only mode of the 970 we support in qemu, and we're > > unlikely to change that any time soon. However, we do have a partial > > implementation of the 970's HID4 register which affects things only > > relevant for hypervisor mode. > >=20 > > That stub is also really ugly, since it attempts to duplicate the effec= ts > > of HID4 by re-encoding it into the LPCR register used in newer CPUs, but > > in a really confusing way. > >=20 > > Just get rid of it. > >=20 > > Signed-off-by: David Gibson > > Reviewed-by: C=E9dric Le Goater > > Reviewed-by: Greg Kurz > > --- > > target/ppc/mmu-hash64.c | 28 +--------------------------- > > target/ppc/translate_init.inc.c | 17 ++++++----------- > > 2 files changed, 7 insertions(+), 38 deletions(-) > >=20 > > diff --git a/target/ppc/mmu-hash64.c b/target/ppc/mmu-hash64.c > > index da8966ccf5..a881876647 100644 > > --- a/target/ppc/mmu-hash64.c > > +++ b/target/ppc/mmu-hash64.c > > @@ -1091,33 +1091,6 @@ void ppc_store_lpcr(PowerPCCPU *cpu, target_ulon= g val) > >=20 > > /* Filter out bits */ > > switch (env->mmu_model) { > > - case POWERPC_MMU_64B: /* 970 */ > > - if (val & 0x40) { > > - lpcr |=3D LPCR_LPES0; > > - } > > - if (val & 0x8000000000000000ull) { > > - lpcr |=3D LPCR_LPES1; > > - } > > - if (val & 0x20) { > > - lpcr |=3D (0x4ull << LPCR_RMLS_SHIFT); > > - } > > - if (val & 0x4000000000000000ull) { > > - lpcr |=3D (0x2ull << LPCR_RMLS_SHIFT); > > - } > > - if (val & 0x2000000000000000ull) { > > - lpcr |=3D (0x1ull << LPCR_RMLS_SHIFT); > > - } > > - env->spr[SPR_RMOR] =3D ((lpcr >> 41) & 0xffffull) << 26; > > - > > - /* > > - * XXX We could also write LPID from HID4 here > > - * but since we don't tag any translation on it > > - * it doesn't actually matter > > - * > > - * XXX For proper emulation of 970 we also need > > - * to dig HRMOR out of HID5 > > - */ > > - break; > > case POWERPC_MMU_2_03: /* P5p */ > > lpcr =3D val & (LPCR_RMLS | LPCR_ILE | > > LPCR_LPES0 | LPCR_LPES1 | > > @@ -1154,6 +1127,7 @@ void ppc_store_lpcr(PowerPCCPU *cpu, target_ulong= val) > > } > > break; > > default: > > + g_assert_not_reached(); > > ; >=20 > Is this empty statement (lone semicolon) still needed now that you've add= ed > something to this case? Thought it was only there to be able to add a lab= el > to it so it could be removed now. (Does this count as a double ; that a > recent patch was trying to fix?) The ; is redundant, but given this whole chunk of code is removed later in the series, I don't think it's worth messing with. >=20 > Regards, > BALATON Zoltan >=20 > > } > > env->spr[SPR_LPCR] =3D lpcr; > > diff --git a/target/ppc/translate_init.inc.c b/target/ppc/translate_ini= t.inc.c > > index a0d0eaabf2..d7d4f012b8 100644 > > --- a/target/ppc/translate_init.inc.c > > +++ b/target/ppc/translate_init.inc.c > > @@ -7895,25 +7895,20 @@ static void spr_write_lpcr(DisasContext *ctx, i= nt sprn, int gprn) > > { > > gen_helper_store_lpcr(cpu_env, cpu_gpr[gprn]); > > } > > - > > -static void spr_write_970_hid4(DisasContext *ctx, int sprn, int gprn) > > -{ > > -#if defined(TARGET_PPC64) > > - spr_write_generic(ctx, sprn, gprn); > > - gen_helper_store_lpcr(cpu_env, cpu_gpr[gprn]); > > -#endif > > -} > > - > > #endif /* !defined(CONFIG_USER_ONLY) */ > >=20 > > static void gen_spr_970_lpar(CPUPPCState *env) > > { > > #if !defined(CONFIG_USER_ONLY) > > /* Logical partitionning */ > > - /* PPC970: HID4 is effectively the LPCR */ > > + /* PPC970: HID4 covers things later controlled by the LPCR and > > + * RMOR in later CPUs, but with a different encoding. We only > > + * support the 970 in "Apple mode" which has all hypervisor > > + * facilities disabled by strapping, so we can basically just > > + * ignore it */ > > spr_register(env, SPR_970_HID4, "HID4", > > SPR_NOACCESS, SPR_NOACCESS, > > - &spr_read_generic, &spr_write_970_hid4, > > + &spr_read_generic, &spr_write_generic, > > 0x00000000); > > #endif > > } > >=20 --=20 David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. 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