From: kbuild test robot <lkp@intel.com>
To: kbuild-all@lists.01.org
Subject: Re: [Intel-gfx] [PATCH] drm/i915/gt: Expand bad CS completion event debug
Date: Thu, 20 Feb 2020 22:54:13 +0800 [thread overview]
Message-ID: <202002202239.tVH7BIAH%lkp@intel.com> (raw)
In-Reply-To: <20200211230944.1203098-1-chris@chris-wilson.co.uk>
[-- Attachment #1: Type: text/plain, Size: 15533 bytes --]
Hi Chris,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on v5.6-rc2]
[cannot apply to drm-tip/drm-tip next-20200220]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system. BTW, we also suggest to use '--base' option to specify the
base tree in git format-patch, please see https://stackoverflow.com/a/37406982]
url: https://github.com/0day-ci/linux/commits/Chris-Wilson/drm-i915-gt-Expand-bad-CS-completion-event-debug/20200215-041958
base: git://anongit.freedesktop.org/drm-intel for-linux-next
config: i386-randconfig-c002-20200220 (attached as .config)
compiler: gcc-7 (Debian 7.5.0-5) 7.5.0
reproduce:
# save the attached .config to linux build tree
make ARCH=i386
If you fix the issue, kindly add following tag
Reported-by: kbuild test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
drivers/gpu/drm/i915/gt/intel_lrc.c: In function 'process_csb':
>> drivers/gpu/drm/i915/gt/intel_lrc.c:2325:16: error: unused variable 'regs' [-Werror=unused-variable]
const u32 *regs = rq->context->lrc_reg_state;
^~~~
Cyclomatic Complexity 5 include/linux/compiler.h:__read_once_size
Cyclomatic Complexity 5 include/linux/compiler.h:__write_once_size
Cyclomatic Complexity 1 include/linux/kasan-checks.h:kasan_check_read
Cyclomatic Complexity 1 include/linux/kasan-checks.h:kasan_check_write
Cyclomatic Complexity 2 arch/x86/include/asm/bitops.h:arch_set_bit
Cyclomatic Complexity 1 arch/x86/include/asm/bitops.h:arch___set_bit
Cyclomatic Complexity 2 arch/x86/include/asm/bitops.h:arch_clear_bit
Cyclomatic Complexity 1 arch/x86/include/asm/bitops.h:arch_clear_bit_unlock
Cyclomatic Complexity 1 arch/x86/include/asm/bitops.h:arch_test_and_set_bit
Cyclomatic Complexity 1 arch/x86/include/asm/bitops.h:constant_test_bit
Cyclomatic Complexity 1 arch/x86/include/asm/bitops.h:variable_test_bit
Cyclomatic Complexity 1 arch/x86/include/asm/bitops.h:__ffs
Cyclomatic Complexity 1 arch/x86/include/asm/bitops.h:ffs
Cyclomatic Complexity 1 arch/x86/include/asm/bitops.h:fls
Cyclomatic Complexity 1 include/asm-generic/bitops/instrumented-atomic.h:set_bit
Cyclomatic Complexity 1 include/asm-generic/bitops/instrumented-atomic.h:clear_bit
Cyclomatic Complexity 1 include/asm-generic/bitops/instrumented-atomic.h:test_and_set_bit
Cyclomatic Complexity 1 include/asm-generic/bitops/instrumented-non-atomic.h:__set_bit
Cyclomatic Complexity 1 include/asm-generic/bitops/instrumented-lock.h:clear_bit_unlock
Cyclomatic Complexity 1 include/linux/log2.h:__ilog2_u32
Cyclomatic Complexity 1 arch/x86/include/asm/div64.h:mul_u32_u32
Cyclomatic Complexity 1 arch/x86/include/asm/string_32.h:memset32
Cyclomatic Complexity 1 include/linux/string.h:memset_p
Cyclomatic Complexity 1 arch/x86/include/asm/atomic.h:arch_atomic_read
Cyclomatic Complexity 1 arch/x86/include/asm/atomic.h:arch_atomic_inc
Cyclomatic Complexity 1 arch/x86/include/asm/atomic.h:arch_atomic_dec
Cyclomatic Complexity 1 arch/x86/include/asm/atomic.h:arch_atomic_dec_and_test
Cyclomatic Complexity 1 arch/x86/include/asm/atomic.h:arch_atomic_fetch_add
Cyclomatic Complexity 1 arch/x86/include/asm/atomic.h:arch_atomic_fetch_sub
Cyclomatic Complexity 2 arch/x86/include/asm/atomic.h:arch_atomic_try_cmpxchg
Cyclomatic Complexity 1 include/asm-generic/atomic-instrumented.h:atomic_read
Cyclomatic Complexity 1 include/asm-generic/atomic-instrumented.h:atomic_fetch_add
Cyclomatic Complexity 1 include/asm-generic/atomic-instrumented.h:atomic_fetch_sub
Cyclomatic Complexity 1 include/asm-generic/atomic-instrumented.h:atomic_inc
Cyclomatic Complexity 1 include/asm-generic/atomic-instrumented.h:atomic_dec
Cyclomatic Complexity 1 include/asm-generic/atomic-instrumented.h:atomic_try_cmpxchg
Cyclomatic Complexity 1 include/asm-generic/atomic-instrumented.h:atomic_dec_and_test
Cyclomatic Complexity 1 include/linux/atomic-fallback.h:atomic_fetch_inc
Cyclomatic Complexity 1 include/linux/list.h:INIT_LIST_HEAD
Cyclomatic Complexity 1 include/linux/list.h:__list_del
Cyclomatic Complexity 1 include/linux/list.h:list_is_last
Cyclomatic Complexity 1 include/linux/list.h:list_empty
Cyclomatic Complexity 1 arch/x86/include/asm/special_insns.h:clflush
Cyclomatic Complexity 1 include/linux/err.h:ERR_PTR
Cyclomatic Complexity 1 include/linux/err.h:PTR_ERR
Cyclomatic Complexity 1 include/linux/err.h:ERR_CAST
Cyclomatic Complexity 1 arch/x86/include/asm/irqflags.h:native_irq_disable
Cyclomatic Complexity 1 arch/x86/include/asm/irqflags.h:native_irq_enable
Cyclomatic Complexity 1 arch/x86/include/asm/irqflags.h:arch_local_irq_disable
Cyclomatic Complexity 1 arch/x86/include/asm/irqflags.h:arch_local_irq_enable
Cyclomatic Complexity 1 arch/x86/include/asm/processor.h:rep_nop
Cyclomatic Complexity 1 arch/x86/include/asm/processor.h:cpu_relax
Cyclomatic Complexity 5 arch/x86/include/asm/preempt.h:__preempt_count_add
Cyclomatic Complexity 5 arch/x86/include/asm/preempt.h:__preempt_count_sub
Cyclomatic Complexity 1 include/linux/bottom_half.h:__local_bh_disable_ip
Cyclomatic Complexity 1 include/linux/bottom_half.h:local_bh_disable
Cyclomatic Complexity 1 include/linux/spinlock.h:spinlock_check
Cyclomatic Complexity 1 include/linux/spinlock.h:spin_lock
Cyclomatic Complexity 1 include/linux/spinlock.h:spin_lock_irq
Cyclomatic Complexity 1 include/linux/spinlock.h:spin_unlock
Cyclomatic Complexity 1 include/linux/spinlock.h:spin_unlock_irq
Cyclomatic Complexity 1 include/linux/spinlock.h:spin_unlock_irqrestore
Cyclomatic Complexity 1 arch/x86/include/asm/io.h:readl
Cyclomatic Complexity 1 arch/x86/include/asm/io.h:writel
Cyclomatic Complexity 1 include/linux/rcupdate.h:__rcu_read_lock
Cyclomatic Complexity 1 include/linux/rcupdate.h:__rcu_read_unlock
Cyclomatic Complexity 1 include/linux/rcupdate.h:rcu_read_lock
Cyclomatic Complexity 1 include/linux/rbtree.h:rb_link_node
Cyclomatic Complexity 3 include/linux/overflow.h:__ab_c_size
Cyclomatic Complexity 1 include/linux/seqlock.h:raw_write_seqcount_begin
Cyclomatic Complexity 1 include/linux/seqlock.h:raw_write_seqcount_end
Cyclomatic Complexity 1 include/linux/jiffies.h:_msecs_to_jiffies
Cyclomatic Complexity 3 include/linux/jiffies.h:msecs_to_jiffies
Cyclomatic Complexity 1 include/linux/ktime.h:ktime_to_ns
Cyclomatic Complexity 3 include/linux/ktime.h:ktime_compare
Cyclomatic Complexity 1 include/linux/ktime.h:ktime_after
Cyclomatic Complexity 1 include/linux/timer.h:timer_pending
Cyclomatic Complexity 1 include/linux/interrupt.h:tasklet_disable_nosync
Cyclomatic Complexity 1 include/linux/interrupt.h:tasklet_enable
Cyclomatic Complexity 3 include/linux/slab.h:kmalloc_type
Cyclomatic Complexity 28 include/linux/slab.h:kmalloc_index
Cyclomatic Complexity 1 include/linux/slab.h:kmalloc_large
Cyclomatic Complexity 4 include/linux/slab.h:kmalloc
Cyclomatic Complexity 1 include/linux/slab.h:kzalloc
Cyclomatic Complexity 1 include/linux/dma-resv.h:dma_resv_get_list
Cyclomatic Complexity 1 include/drm/drm_print.h:drm_info_printer
Cyclomatic Complexity 1 drivers/gpu/drm/i915/i915_reg.h:i915_mmio_reg_offset
Cyclomatic Complexity 1 drivers/gpu/drm/i915/i915_utils.h:msecs_to_jiffies_timeout
Cyclomatic Complexity 3 drivers/gpu/drm/i915/i915_utils.h:timer_expired
Cyclomatic Complexity 1 drivers/gpu/drm/i915/i915_gem.h:__tasklet_is_enabled
Cyclomatic Complexity 1 drivers/gpu/drm/i915/i915_gem.h:__tasklet_enable
Cyclomatic Complexity 1 drivers/gpu/drm/i915/gt/intel_engine_types.h:intel_engine_has_preemption
Cyclomatic Complexity 1 drivers/gpu/drm/i915/gt/intel_engine_types.h:intel_engine_has_semaphores
Cyclomatic Complexity 1 drivers/gpu/drm/i915/gt/intel_engine_types.h:intel_engine_has_relative_mmio
Cyclomatic Complexity 1 drivers/gpu/drm/i915/i915_request.h:to_request
Cyclomatic Complexity 1 drivers/gpu/drm/i915/i915_request.h:i915_seqno_passed
Cyclomatic Complexity 1 drivers/gpu/drm/i915/i915_request.h:__hwsp_seqno
Cyclomatic Complexity 1 drivers/gpu/drm/i915/i915_request.h:i915_request_is_ready
vim +/regs +2325 drivers/gpu/drm/i915/gt/intel_lrc.c
2212
2213 static void process_csb(struct intel_engine_cs *engine)
2214 {
2215 struct intel_engine_execlists * const execlists = &engine->execlists;
2216 const u32 * const buf = execlists->csb_status;
2217 const u8 num_entries = execlists->csb_size;
2218 u8 head, tail;
2219
2220 /*
2221 * As we modify our execlists state tracking we require exclusive
2222 * access. Either we are inside the tasklet, or the tasklet is disabled
2223 * and we assume that is only inside the reset paths and so serialised.
2224 */
2225 GEM_BUG_ON(!tasklet_is_locked(&execlists->tasklet) &&
2226 !reset_in_progress(execlists));
2227 GEM_BUG_ON(!intel_engine_in_execlists_submission_mode(engine));
2228
2229 /*
2230 * Note that csb_write, csb_status may be either in HWSP or mmio.
2231 * When reading from the csb_write mmio register, we have to be
2232 * careful to only use the GEN8_CSB_WRITE_PTR portion, which is
2233 * the low 4bits. As it happens we know the next 4bits are always
2234 * zero and so we can simply masked off the low u8 of the register
2235 * and treat it identically to reading from the HWSP (without having
2236 * to use explicit shifting and masking, and probably bifurcating
2237 * the code to handle the legacy mmio read).
2238 */
2239 head = execlists->csb_head;
2240 tail = READ_ONCE(*execlists->csb_write);
2241 ENGINE_TRACE(engine, "cs-irq head=%d, tail=%d\n", head, tail);
2242 if (unlikely(head == tail))
2243 return;
2244
2245 /*
2246 * Hopefully paired with a wmb() in HW!
2247 *
2248 * We must complete the read of the write pointer before any reads
2249 * from the CSB, so that we do not see stale values. Without an rmb
2250 * (lfence) the HW may speculatively perform the CSB[] reads *before*
2251 * we perform the READ_ONCE(*csb_write).
2252 */
2253 rmb();
2254
2255 do {
2256 bool promote;
2257
2258 if (++head == num_entries)
2259 head = 0;
2260
2261 /*
2262 * We are flying near dragons again.
2263 *
2264 * We hold a reference to the request in execlist_port[]
2265 * but no more than that. We are operating in softirq
2266 * context and so cannot hold any mutex or sleep. That
2267 * prevents us stopping the requests we are processing
2268 * in port[] from being retired simultaneously (the
2269 * breadcrumb will be complete before we see the
2270 * context-switch). As we only hold the reference to the
2271 * request, any pointer chasing underneath the request
2272 * is subject to a potential use-after-free. Thus we
2273 * store all of the bookkeeping within port[] as
2274 * required, and avoid using unguarded pointers beneath
2275 * request itself. The same applies to the atomic
2276 * status notifier.
2277 */
2278
2279 ENGINE_TRACE(engine, "csb[%d]: status=0x%08x:0x%08x\n",
2280 head, buf[2 * head + 0], buf[2 * head + 1]);
2281
2282 if (INTEL_GEN(engine->i915) >= 12)
2283 promote = gen12_csb_parse(execlists, buf + 2 * head);
2284 else
2285 promote = gen8_csb_parse(execlists, buf + 2 * head);
2286 if (promote) {
2287 struct i915_request * const *old = execlists->active;
2288
2289 /* Point active to the new ELSP; prevent overwriting */
2290 WRITE_ONCE(execlists->active, execlists->pending);
2291
2292 if (!inject_preempt_hang(execlists))
2293 ring_set_paused(engine, 0);
2294
2295 /* cancel old inflight, prepare for switch */
2296 trace_ports(execlists, "preempted", old);
2297 while (*old)
2298 execlists_schedule_out(*old++);
2299
2300 /* switch pending to inflight */
2301 GEM_BUG_ON(!assert_pending_valid(execlists, "promote"));
2302 WRITE_ONCE(execlists->active,
2303 memcpy(execlists->inflight,
2304 execlists->pending,
2305 execlists_num_ports(execlists) *
2306 sizeof(*execlists->pending)));
2307
2308 WRITE_ONCE(execlists->pending[0], NULL);
2309 } else {
2310 GEM_BUG_ON(!*execlists->active);
2311
2312 /* port0 completed, advanced to port1 */
2313 trace_ports(execlists, "completed", execlists->active);
2314
2315 /*
2316 * We rely on the hardware being strongly
2317 * ordered, that the breadcrumb write is
2318 * coherent (visible from the CPU) before the
2319 * user interrupt and CSB is processed.
2320 */
2321 if (GEM_SHOW_DEBUG() &&
2322 !i915_request_completed(*execlists->active) &&
2323 !reset_in_progress(execlists)) {
2324 struct i915_request *rq = *execlists->active;
> 2325 const u32 *regs = rq->context->lrc_reg_state;
2326
2327 ENGINE_TRACE(engine,
2328 "ring:{start:0x%08x, head:%04x, tail:%04x, ctl:%08x, mode:%08x}\n",
2329 ENGINE_READ(engine, RING_START),
2330 ENGINE_READ(engine, RING_HEAD) & HEAD_ADDR,
2331 ENGINE_READ(engine, RING_TAIL) & TAIL_ADDR,
2332 ENGINE_READ(engine, RING_CTL),
2333 ENGINE_READ(engine, RING_MI_MODE));
2334 ENGINE_TRACE(engine,
2335 "rq:{start:%08x, head:%04x, tail:%04x, seqno:%llx:%d, hwsp:%d}, ",
2336 i915_ggtt_offset(rq->ring->vma),
2337 rq->head, rq->tail,
2338 rq->fence.context,
2339 lower_32_bits(rq->fence.seqno),
2340 hwsp_seqno(rq));
2341 ENGINE_TRACE(engine,
2342 "ctx:{start:%08x, head:%04x, tail:%04x}, ",
2343 regs[CTX_RING_START],
2344 regs[CTX_RING_HEAD],
2345 regs[CTX_RING_TAIL]);
2346
2347 GEM_BUG_ON("context completed before request");
2348 }
2349
2350 execlists_schedule_out(*execlists->active++);
2351
2352 GEM_BUG_ON(execlists->active - execlists->inflight >
2353 execlists_num_ports(execlists));
2354 }
2355 } while (head != tail);
2356
2357 execlists->csb_head = head;
2358 set_timeslice(engine);
2359
2360 /*
2361 * Gen11 has proven to fail wrt global observation point between
2362 * entry and tail update, failing on the ordering and thus
2363 * we see an old entry in the context status buffer.
2364 *
2365 * Forcibly evict out entries for the next gpu csb update,
2366 * to increase the odds that we get a fresh entries with non
2367 * working hardware. The cost for doing so comes out mostly with
2368 * the wash as hardware, working or not, will need to do the
2369 * invalidation before.
2370 */
2371 invalidate_csb_entries(&buf[0], &buf[num_entries - 1]);
2372 }
2373
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org
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prev parent reply other threads:[~2020-02-20 14:54 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-11 23:09 [Intel-gfx] [PATCH] drm/i915/gt: Expand bad CS completion event debug Chris Wilson
2020-02-12 12:44 ` Mika Kuoppala
2020-02-12 20:29 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
2020-02-14 23:16 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2020-02-20 14:54 ` kbuild test robot [this message]
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