From: "José Roberto de Souza" <jose.souza@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 1/8] drm/i915/tgl: Extend Wa_1409825376 stepping
Date: Fri, 21 Feb 2020 18:08:08 -0800 [thread overview]
Message-ID: <20200222020815.50599-1-jose.souza@intel.com> (raw)
This workaround is only fixed in C0 stepping to extend it to B0 too.
BSpec: 52890
Cc: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/intel_pm.c | 2 +-
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 4305ccc4c683..57282b719ece 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1575,6 +1575,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
(IS_ICELAKE(p) && IS_REVID(p, since, until))
#define TGL_REVID_A0 0x0
+#define TGL_REVID_B0 0x1
#define IS_TGL_REVID(p, since, until) \
(IS_TIGERLAKE(p) && IS_REVID(p, since, until))
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index ffac0b862ca5..33149bccd117 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -6852,7 +6852,7 @@ static void tgl_init_clock_gating(struct drm_i915_private *dev_priv)
I915_READ(POWERGATE_ENABLE) | vd_pg_enable);
/* Wa_1409825376:tgl (pre-prod)*/
- if (IS_TGL_REVID(dev_priv, TGL_REVID_A0, TGL_REVID_A0))
+ if (IS_TGL_REVID(dev_priv, TGL_REVID_A0, TGL_REVID_B0))
I915_WRITE(GEN9_CLKGATE_DIS_3, I915_READ(GEN9_CLKGATE_DIS_3) |
TGL_VRH_GATING_DIS);
}
--
2.25.1
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next reply other threads:[~2020-02-22 2:07 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-22 2:08 José Roberto de Souza [this message]
2020-02-22 2:08 ` [Intel-gfx] [PATCH 2/8] drm/i915/tgl: Implement Wa_1409804808 José Roberto de Souza
2020-02-24 16:20 ` Matt Roper
2020-02-22 2:08 ` [Intel-gfx] [PATCH 3/8] drm/i915/tgl: Implement Wa_1806527549 José Roberto de Souza
2020-02-22 8:53 ` Chris Wilson
2020-02-24 21:07 ` Souza, Jose
2020-02-22 2:08 ` [Intel-gfx] [PATCH 4/8] drm/i915/tgl: Add Wa_1409085225, Wa_14010229206 José Roberto de Souza
2020-02-24 16:27 ` Matt Roper
2020-02-22 2:08 ` [Intel-gfx] [PATCH 5/8] drm/i915/tgl: Extend Wa_1606931601 for all steppings José Roberto de Souza
2020-02-22 2:08 ` [Intel-gfx] [PATCH 6/8] drm/i915/tgl: Add note to Wa_1607297627 José Roberto de Souza
2020-02-24 16:42 ` Matt Roper
2020-02-22 2:08 ` [Intel-gfx] [PATCH 7/8] drm/i915/tgl: Add note about Wa_1607063988 José Roberto de Souza
2020-02-24 16:44 ` Matt Roper
2020-02-22 2:08 ` [Intel-gfx] [PATCH 8/8] drm/i915/tgl: Extend Wa_1409767108 to B0 José Roberto de Souza
2020-02-24 16:49 ` Matt Roper
2020-02-22 5:03 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/8] drm/i915/tgl: Extend Wa_1409825376 stepping Patchwork
2020-02-24 16:08 ` [Intel-gfx] [PATCH 1/8] " Matt Roper
2020-02-24 18:59 ` Souza, Jose
2020-02-24 17:52 ` [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/8] " Patchwork
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