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From: Chris Wilson <chris@chris-wilson.co.uk>
To: intel-gfx@lists.freedesktop.org
Cc: Kenneth Graunke <kenneth@whitecape.org>
Subject: [Intel-gfx] [PATCH 5/6] drm/i915/gt: Declare when we enabled timeslicing
Date: Sun, 23 Feb 2020 20:54:30 +0000	[thread overview]
Message-ID: <20200223205432.3993019-6-chris@chris-wilson.co.uk> (raw)
In-Reply-To: <20200223205432.3993019-1-chris@chris-wilson.co.uk>

Let userspace know if they can trust timeslicing by including it as part
of the I915_PARAM_HAS_SCHEDULER::I915_SCHEDULER_CAP_TIMESLICING

v2: Only declare timeslicing if we can safely preempt userspace.

Fixes: 8ee36e048c98 ("drm/i915/execlists: Minimalistic timeslicing")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Kenneth Graunke <kenneth@whitecape.org>
---
 drivers/gpu/drm/i915/gt/intel_engine.h      | 3 ++-
 drivers/gpu/drm/i915/gt/intel_engine_user.c | 5 +++++
 include/uapi/drm/i915_drm.h                 | 1 +
 3 files changed, 8 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_engine.h b/drivers/gpu/drm/i915/gt/intel_engine.h
index 29c8c03c5caa..a32dc82a90d4 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine.h
+++ b/drivers/gpu/drm/i915/gt/intel_engine.h
@@ -326,7 +326,8 @@ intel_engine_has_timeslices(const struct intel_engine_cs *engine)
 	if (!IS_ACTIVE(CONFIG_DRM_I915_TIMESLICE_DURATION))
 		return false;
 
-	return intel_engine_has_semaphores(engine);
+	return (intel_engine_has_semaphores(engine) &&
+		intel_engine_has_preemption(engine));
 }
 
 #endif /* _INTEL_RINGBUFFER_H_ */
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_user.c b/drivers/gpu/drm/i915/gt/intel_engine_user.c
index 848decee9066..b84fdd722781 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_user.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_user.c
@@ -121,6 +121,11 @@ static void set_scheduler_caps(struct drm_i915_private *i915)
 			else
 				disabled |= BIT(map[i].sched);
 		}
+
+		if (intel_engine_has_timeslices(engine))
+			enabled |= I915_SCHEDULER_CAP_TIMESLICING;
+		else
+			disabled |= I915_SCHEDULER_CAP_TIMESLICING;
 	}
 
 	i915->caps.scheduler = enabled & ~disabled;
diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
index 92e2773a7c77..4b2be4d446a1 100644
--- a/include/uapi/drm/i915_drm.h
+++ b/include/uapi/drm/i915_drm.h
@@ -523,6 +523,7 @@ typedef struct drm_i915_irq_wait {
 #define   I915_SCHEDULER_CAP_PREEMPTION	(1ul << 2)
 #define   I915_SCHEDULER_CAP_SEMAPHORES	(1ul << 3)
 #define   I915_SCHEDULER_CAP_ENGINE_BUSY_STATS	(1ul << 4)
+#define   I915_SCHEDULER_CAP_TIMESLICING	(1ul << 5)
 
 #define I915_PARAM_HUC_STATUS		 42
 
-- 
2.25.1

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  parent reply	other threads:[~2020-02-23 20:54 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-02-23 20:54 [Intel-gfx] Support for iris PIPE_FLUSH_DEFERRED Chris Wilson
2020-02-23 20:54 ` [Intel-gfx] [PATCH 1/6] dma-buf: Proxy fence, an unsignaled fence placeholder Chris Wilson
2020-02-23 20:54 ` [Intel-gfx] [PATCH 2/6] drm/syncobj: Allow use of dma-fence-proxy Chris Wilson
2020-02-23 20:54 ` [Intel-gfx] [PATCH 3/6] drm/i915/gem: Teach execbuf how to wait on future syncobj Chris Wilson
2020-02-23 20:54 ` [Intel-gfx] [PATCH 4/6] drm/i915/gem: Allow combining submit-fences with syncobj Chris Wilson
2020-02-23 20:54 ` Chris Wilson [this message]
2020-02-23 20:54 ` [Intel-gfx] [PATCH 6/6] drm/i915/gt: Yield the timeslice if caught waiting on a user semaphore Chris Wilson
2020-02-23 21:07 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/6] dma-buf: Proxy fence, an unsignaled fence placeholder Patchwork
2020-02-23 21:11 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-02-23 21:33 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
  -- strict thread matches above, loose matches on Subject: below --
2020-02-20  7:50 [Intel-gfx] [PATCH 1/6] drm/i915/gt: Protect signaler walk with RCU Chris Wilson
2020-02-20  7:50 ` [Intel-gfx] [PATCH 5/6] drm/i915/gt: Declare when we enabled timeslicing Chris Wilson

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