From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1CA1EC4BA06 for ; Tue, 25 Feb 2020 23:26:42 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id EDDA2246A1 for ; Tue, 25 Feb 2020 23:26:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730343AbgBYX0k (ORCPT ); Tue, 25 Feb 2020 18:26:40 -0500 Received: from Galois.linutronix.de ([193.142.43.55]:55826 "EHLO Galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730216AbgBYX01 (ORCPT ); Tue, 25 Feb 2020 18:26:27 -0500 Received: from p5de0bf0b.dip0.t-ipconnect.de ([93.224.191.11] helo=nanos.tec.linutronix.de) by Galois.linutronix.de with esmtpsa (TLS1.2:DHE_RSA_AES_256_CBC_SHA256:256) (Exim 4.80) (envelope-from ) id 1j6jaf-0004tn-OG; Wed, 26 Feb 2020 00:26:14 +0100 Received: from nanos.tec.linutronix.de (localhost [IPv6:::1]) by nanos.tec.linutronix.de (Postfix) with ESMTP id 7C89C1040AA; Wed, 26 Feb 2020 00:25:45 +0100 (CET) Message-Id: <20200225224144.728612264@linutronix.de> User-Agent: quilt/0.65 Date: Tue, 25 Feb 2020 23:33:27 +0100 From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Steven Rostedt , Brian Gerst , Juergen Gross , Paolo Bonzini , Arnd Bergmann Subject: [patch 06/16] x86/entry/64: Remove error code clearing from #DB and #MCE ASM stub References: <20200225223321.231477305@linutronix.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 X-Linutronix-Spam-Score: -1.0 X-Linutronix-Spam-Level: - X-Linutronix-Spam-Status: No , -1.0 points, 5.0 required, ALL_TRUSTED=-1,SHORTCIRCUIT=-0.0001 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The C entry point do not expect an error code. Signed-off-by: Thomas Gleixner --- arch/x86/entry/entry_64.S | 1 - 1 file changed, 1 deletion(-) --- a/arch/x86/entry/entry_64.S +++ b/arch/x86/entry/entry_64.S @@ -631,7 +631,6 @@ SYM_CODE_START(\asmsym) .endif movq %rsp, %rdi /* pt_regs pointer */ - xorl %esi, %esi /* Clear the error code */ .if \vector == X86_TRAP_DB subq $DB_STACK_OFFSET, CPU_TSS_IST(IST_INDEX_DB)