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From: Sean Anderson <seanga2@gmail.com>
To: u-boot@lists.denx.de
Subject: [PATCH v5 06/33] clk: Add a bypass clock for K210
Date: Fri, 28 Feb 2020 16:05:24 -0500	[thread overview]
Message-ID: <20200228210552.615672-7-seanga2@gmail.com> (raw)
In-Reply-To: <20200228210552.615672-1-seanga2@gmail.com>

This is a small driver to do a software bypass of a clock if hardware
bypass is not working. I have tried to write this in a generic fashion, so
that it could be potentially broken out of the kendryte code at some future
date. For the K210, it is used to have aclk bypass pll0 and use in0 instead
so that the CPU keeps on working.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
---

Changes in v5:
- Add function to register from a struct bypass

Changes in v4:
- New

 drivers/clk/kendryte/Makefile |   2 +-
 drivers/clk/kendryte/bypass.c | 270 ++++++++++++++++++++++++++++++++++
 include/kendryte/bypass.h     |  31 ++++
 3 files changed, 302 insertions(+), 1 deletion(-)
 create mode 100644 drivers/clk/kendryte/bypass.c
 create mode 100644 include/kendryte/bypass.h

diff --git a/drivers/clk/kendryte/Makefile b/drivers/clk/kendryte/Makefile
index c56d93ea1c..47f682fce3 100644
--- a/drivers/clk/kendryte/Makefile
+++ b/drivers/clk/kendryte/Makefile
@@ -1 +1 @@
-obj-y += pll.o
+obj-y += bypass.o pll.o
diff --git a/drivers/clk/kendryte/bypass.c b/drivers/clk/kendryte/bypass.c
new file mode 100644
index 0000000000..eb3e27d055
--- /dev/null
+++ b/drivers/clk/kendryte/bypass.c
@@ -0,0 +1,270 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2020 Sean Anderson <seanga2@gmail.com>
+ */
+
+#include <kendryte/bypass.h>
+
+#include <clk-uclass.h>
+#include <linux/clk-provider.h>
+#include <linux/err.h>
+#define LOG_CATEGORY UCLASS_CLK
+#include <log.h>
+
+#define CLK_K210_BYPASS "k210_clk_bypass"
+
+/*
+ * This is a small driver to do a software bypass of a clock if hardware bypass
+ * is not working. I have tried to write this in a generic fashion, so that it
+ * could be potentially broken out of the kendryte code at some future date.
+ *
+ * Say you have the following clock configuration
+ *
+ * +---+ +---+
+ * |osc| |pll|
+ * +---+ +---+
+ *         ^
+ *        /|
+ *       / |
+ *      /  |
+ *     /   |
+ *    /    |
+ * +---+ +---+
+ * |clk| |clk|
+ * +---+ +---+
+ *
+ * But the pll does not have a bypass, so when you configure the pll, the
+ * configuration needs to change to look like
+ *
+ * +---+ +---+
+ * |osc| |pll|
+ * +---+ +---+
+ *   ^
+ *   |\
+ *   | \
+ *   |  \
+ *   |   \
+ *   |    \
+ * +---+ +---+
+ * |clk| |clk|
+ * +---+ +---+
+ *
+ * To set this up, create a bypass clock with bypassee=pll and alt=osc. When
+ * creating the child clocks, set their parent to the bypass clock. After
+ * creating all the children, call k210_bypass_setchildren().
+ */
+
+static int k210_bypass_dobypass(struct k210_bypass *bypass)
+{
+	int ret, i;
+
+	/*
+	 * If we already have saved parents, then the children are already
+	 * bypassed
+	 */
+	if (bypass->child_count && bypass->saved_parents[0])
+		return 0;
+
+	for (i = 0; i < bypass->child_count; i++) {
+		struct clk *child = bypass->children[i];
+		struct clk *parent = clk_get_parent(child);
+
+		if (IS_ERR(parent)) {
+			for (; i; i--)
+				bypass->saved_parents[i] = NULL;
+			return PTR_ERR(parent);
+		}
+		bypass->saved_parents[i] = parent;
+	}
+
+	for (i = 0; i < bypass->child_count; i++) {
+		struct clk *child = bypass->children[i];
+
+		ret = clk_set_parent(child, bypass->alt);
+		if (ret) {
+			for (; i; i--)
+				clk_set_parent(bypass->children[i],
+					       bypass->saved_parents[i]);
+			for (i = 0; i < bypass->child_count; i++)
+				bypass->saved_parents[i] = NULL;
+			return ret;
+		}
+	}
+
+	return 0;
+}
+
+static int k210_bypass_unbypass(struct k210_bypass *bypass)
+{
+	int err, ret, i;
+
+	if (!bypass->child_count && !bypass->saved_parents[0]) {
+		log_warning("Cannot unbypass children; dobypass not called first\n");
+		return 0;
+	}
+
+	ret = 0;
+	for (i = 0; i < bypass->child_count; i++) {
+		err = clk_set_parent(bypass->children[i],
+				     bypass->saved_parents[i]);
+		if (err)
+			ret = err;
+		bypass->saved_parents[i] = NULL;
+	}
+	return ret;
+}
+
+static ulong k210_bypass_get_rate(struct clk *clk)
+{
+	struct k210_bypass *bypass = to_k210_bypass(clk);
+	const struct clk_ops *ops = bypass->bypassee_ops;
+
+	if (ops->get_rate)
+		return ops->get_rate(bypass->bypassee);
+	else
+		return clk_get_parent_rate(bypass->bypassee);
+}
+
+static ulong k210_bypass_set_rate(struct clk *clk, unsigned long rate)
+{
+	int ret;
+	struct k210_bypass *bypass = to_k210_bypass(clk);
+	const struct clk_ops *ops = bypass->bypassee_ops;
+
+	/* Don't bother bypassing if we aren't going to set the rate */
+	if (!ops->set_rate)
+		return k210_bypass_get_rate(clk);
+
+	ret = k210_bypass_dobypass(bypass);
+	if (ret)
+		return ret;
+
+	ret = ops->set_rate(bypass->bypassee, rate);
+	if (ret < 0)
+		return ret;
+
+	return k210_bypass_unbypass(bypass);
+}
+
+static int k210_bypass_set_parent(struct clk *clk, struct clk *parent)
+{
+	struct k210_bypass *bypass = to_k210_bypass(clk);
+	const struct clk_ops *ops = bypass->bypassee_ops;
+
+	if (ops->set_parent)
+		return ops->set_parent(bypass->bypassee, parent);
+	else
+		return -ENOTSUPP;
+}
+
+/*
+ * For these next two functions, do the bypassing even if there is no
+ * en-/-disable function, since the bypassing itself can be observed in between
+ * calls.
+ */
+static int k210_bypass_enable(struct clk *clk)
+{
+	int ret;
+	struct k210_bypass *bypass = to_k210_bypass(clk);
+	const struct clk_ops *ops = bypass->bypassee_ops;
+
+	ret = k210_bypass_dobypass(bypass);
+	if (ret)
+		return ret;
+
+	if (ops->enable)
+		ret = ops->enable(bypass->bypassee);
+	else
+		ret = 0;
+	if (ret)
+		return ret;
+
+	return k210_bypass_unbypass(bypass);
+}
+
+static int k210_bypass_disable(struct clk *clk)
+{
+	int ret;
+	struct k210_bypass *bypass = to_k210_bypass(clk);
+	const struct clk_ops *ops = bypass->bypassee_ops;
+
+	ret = k210_bypass_dobypass(bypass);
+	if (ret)
+		return ret;
+
+	if (ops->disable)
+		return ops->disable(bypass->bypassee);
+	else
+		return 0;
+}
+
+static const struct clk_ops k210_bypass_ops = {
+	.get_rate = k210_bypass_get_rate,
+	.set_rate = k210_bypass_set_rate,
+	.set_parent = k210_bypass_set_parent,
+	.enable = k210_bypass_enable,
+	.disable = k210_bypass_disable,
+};
+
+int k210_bypass_set_children(struct clk *clk, struct clk **children,
+			     size_t child_count)
+{
+	struct k210_bypass *bypass = to_k210_bypass(clk);
+
+	kfree(bypass->saved_parents);
+	if (child_count) {
+		bypass->saved_parents =
+			kcalloc(child_count, sizeof(struct clk *), GFP_KERNEL);
+		if (!bypass->saved_parents)
+			return -ENOMEM;
+	}
+	bypass->child_count = child_count;
+	bypass->children = children;
+
+	return 0;
+}
+
+struct clk *k210_register_bypass_struct(const char *name,
+					const char *parent_name,
+					struct k210_bypass *bypass)
+{
+	int ret;
+	struct clk *clk;
+
+	clk = &bypass->clk;
+
+	ret = clk_register(clk, CLK_K210_BYPASS, name, parent_name);
+	if (ret)
+		return ERR_PTR(ret);
+
+	bypass->bypassee->dev = clk->dev;
+	return clk;
+}
+
+struct clk *k210_register_bypass(const char *name, const char *parent_name,
+				 struct clk *bypassee,
+				 const struct clk_ops *bypassee_ops,
+				 struct clk *alt)
+{
+	struct clk *clk;
+	struct k210_bypass *bypass;
+
+	bypass = kzalloc(sizeof(*bypass), GFP_KERNEL);
+	if (!bypass)
+		return ERR_PTR(-ENOMEM);
+
+	bypass->bypassee = bypassee;
+	bypass->bypassee_ops = bypassee_ops;
+	bypass->alt = alt;
+
+	clk = k210_register_bypass_struct(name, parent_name, bypass);
+	if (IS_ERR(clk))
+		kfree(bypass);
+	return clk;
+}
+
+U_BOOT_DRIVER(k210_bypass) = {
+	.name	= CLK_K210_BYPASS,
+	.id	= UCLASS_CLK,
+	.ops	= &k210_bypass_ops,
+};
diff --git a/include/kendryte/bypass.h b/include/kendryte/bypass.h
new file mode 100644
index 0000000000..a081cbd12f
--- /dev/null
+++ b/include/kendryte/bypass.h
@@ -0,0 +1,31 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2020 Sean Anderson <seanga2@gmail.com>
+ */
+#ifndef K210_BYPASS_H
+#define K210_BYPASS_H
+
+#include <clk.h>
+
+struct k210_bypass {
+	struct clk clk;
+	struct clk **children; /* Clocks to reparent */
+	struct clk **saved_parents; /* Parents saved over en-/dis-able */
+	struct clk *bypassee; /* Clock to bypass */
+	const struct clk_ops *bypassee_ops; /* Ops of the bypass clock */
+	struct clk *alt; /* Clock to set children to when bypassing */
+	size_t child_count;
+};
+
+#define to_k210_bypass(_clk) container_of(_clk, struct k210_bypass, clk)
+
+int k210_bypass_set_children(struct clk *clk, struct clk **children,
+			     size_t child_count);
+struct clk *k210_register_bypass_struct(const char *name,
+					const char *parent_name,
+					struct k210_bypass *bypass);
+struct clk *k210_register_bypass(const char *name, const char *parent_name,
+				 struct clk *bypassee,
+				 const struct clk_ops *bypassee_ops,
+				 struct clk *alt);
+#endif /* K210_BYPASS_H */
-- 
2.25.0

  parent reply	other threads:[~2020-02-28 21:05 UTC|newest]

Thread overview: 69+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-02-28 21:05 [PATCH v5 00/33] riscv: Add Sipeed Maix support Sean Anderson
2020-02-28 21:05 ` [PATCH v5 01/33] clk: Always use the supplied struct clk Sean Anderson
2020-02-28 21:05 ` [PATCH v5 02/33] clk: Check that ops of composite clock components exist before calling Sean Anderson
2020-02-28 21:05 ` [PATCH v5 03/33] clk: Unconditionally recursively en-/dis-able clocks Sean Anderson
2020-03-04  6:50   ` Rick Chen
2020-02-28 21:05 ` [PATCH v5 04/33] clk: Add functions to register CCF clock structs Sean Anderson
2020-02-28 21:05 ` [PATCH v5 05/33] clk: Add K210 pll support Sean Anderson
2020-02-28 21:05 ` Sean Anderson [this message]
2020-02-28 21:05 ` [PATCH v5 07/33] clk: Add K210 clock support Sean Anderson
2020-03-04  6:58   ` Rick Chen
2020-03-04 14:54     ` Sean Anderson
2020-02-28 21:05 ` [PATCH v5 08/33] doc: Fix typo in FIT documentation Sean Anderson
2020-03-02  2:21   ` Bin Meng
2020-02-28 21:05 ` [PATCH v5 09/33] dm: Add support for simple-pm-bus Sean Anderson
2020-02-28 21:05 ` [PATCH v5 10/33] dm: Fix error handling for dev_read_addr_ptr Sean Anderson
2020-03-02  2:22   ` Bin Meng
2020-03-02 19:46   ` Simon Glass
2020-02-28 21:05 ` [PATCH v5 11/33] reset: Add generic reset driver Sean Anderson
2020-02-28 21:05 ` [PATCH v5 12/33] lib: Always set errno in hcreate_r Sean Anderson
2020-03-02  2:24   ` Bin Meng
2020-02-28 21:05 ` [PATCH v5 13/33] pinctrl: Add support for Kendryte K210 FPIOA Sean Anderson
2020-03-04  6:47   ` Rick Chen
2020-03-04 15:00     ` Sean Anderson
2020-02-28 21:05 ` [PATCH v5 14/33] gpio: sifive: Use generic reg read function Sean Anderson
2020-03-02  2:24   ` Bin Meng
2020-02-28 21:05 ` [PATCH v5 15/33] gpio: dw: Fix warnings about casting int to pointer Sean Anderson
2020-03-02  2:27   ` Bin Meng
2020-03-02  3:50     ` Sean Anderson
2020-02-28 21:05 ` [PATCH v5 16/33] gpio: dw: Add a trailing underscore to generated name Sean Anderson
2020-02-28 21:05 ` [PATCH v5 17/33] gpio: dw: Return output value when direction is out Sean Anderson
2020-02-28 21:05 ` [PATCH v5 18/33] led: gpio: Default to using node name if label is absent Sean Anderson
2020-02-28 21:05 ` [PATCH v5 19/33] spi: dw: Add device tree properties for fields in CTRL1 Sean Anderson
2020-03-04  6:15   ` Rick Chen
2020-03-04 15:01     ` Sean Anderson
2020-02-28 21:05 ` [PATCH v5 20/33] spi: dw: Rename "cs-gpio" to "cs-gpios" Sean Anderson
2020-02-28 21:05 ` [PATCH v5 21/33] spi: dw: Use generic function to read reg address Sean Anderson
2020-02-28 21:05 ` [PATCH v5 22/33] spi: dw: Speed up transfer loops Sean Anderson
2020-02-28 21:05 ` [PATCH v5 23/33] spi: dw: Properly set rx_end when not recieving Sean Anderson
2020-02-29 17:47   ` Sean Anderson
2020-02-28 21:05 ` [PATCH v5 24/33] spi: dw: Add mem_ops Sean Anderson
2020-02-28 21:05 ` [PATCH v5 25/33] wdt: Move asm/utils.h to log2.h Sean Anderson
2020-02-28 21:46   ` Marek Vasut
2020-02-28 22:43     ` Sean Anderson
2020-02-28 23:27       ` Marek Vasut
2020-03-03  6:58   ` Rick Chen
2020-03-03 14:11     ` Sean Anderson
2020-02-28 21:05 ` [PATCH v5 26/33] riscv: Add headers for asm/global_data.h Sean Anderson
2020-02-28 21:05 ` [PATCH v5 27/33] riscv: Fix race conditions when initializing IPI Sean Anderson
2020-03-02  9:08   ` Rick Chen
2020-03-02 15:43     ` Sean Anderson
2020-03-02 23:15       ` Lukas Auer
2020-03-03  8:27         ` Rick Chen
2020-03-05  2:18           ` Rick Chen
2020-03-02 23:17   ` Lukas Auer
2020-03-02 23:43     ` Sean Anderson
2020-03-03 21:53       ` Lukas Auer
2020-03-03 21:57         ` Sean Anderson
2020-03-04 15:25           ` Lukas Auer
2020-02-28 21:05 ` [PATCH v5 28/33] riscv: Add option to support RISC-V privileged spec 1.9 Sean Anderson
2020-03-04  6:20   ` Rick Chen
2020-02-28 21:05 ` [PATCH v5 29/33] riscv: Allow use of reset drivers Sean Anderson
2020-02-28 21:05 ` [PATCH v5 30/33] riscv: Try to get cpu frequency from a "clocks" node if it exists Sean Anderson
2020-02-28 21:05 ` [PATCH v5 31/33] riscv: Enable cpu clock if it is present Sean Anderson
2020-02-28 21:05 ` [PATCH v5 32/33] riscv: Add device tree for K210 and Sipeed Maix BitM Sean Anderson
2020-02-28 21:05 ` [PATCH v5 33/33] riscv: Add Sipeed Maix support Sean Anderson
2020-03-04  6:04   ` Rick Chen
2020-03-04  7:47     ` Rick Chen
2020-03-04 15:11       ` Sean Anderson
2020-03-05  3:40         ` Bin Meng

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