From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 4/6] drm/i915: Fix cs_timestamp_frequency_hz for cl/bw
Date: Mon, 2 Mar 2020 16:39:41 +0200 [thread overview]
Message-ID: <20200302143943.32676-4-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20200302143943.32676-1-ville.syrjala@linux.intel.com>
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Despite what the spec says the TIMESTAMP register seems to tick
once every hrawclk (confirmed on i965gm and g35).
Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/intel_device_info.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
index b756e8fb7682..be88eb41035a 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -748,8 +748,10 @@ static u32 read_timestamp_frequency(struct drm_i915_private *dev_priv)
* "The value in this register increments once every 16
* hclks." (through the “Clocking Configuration”
* (“CLKCFG”) MCHBAR register)
+ *
+ * Testing on actual hardware has shown there is no /16.
*/
- return RUNTIME_INFO(dev_priv)->rawclk_freq * 1000 / 16;
+ return RUNTIME_INFO(dev_priv)->rawclk_freq * 1000;
} else if (IS_G4X(dev_priv)) {
/*
* 63:20 increments every 1/4 ns
--
2.24.1
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next prev parent reply other threads:[~2020-03-02 14:39 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-02 14:39 [Intel-gfx] [PATCH 1/6] drm/i915: Nuke pointless div by 64bit Ville Syrjala
2020-03-02 14:39 ` [Intel-gfx] [PATCH 2/6] drm/i915: Store CS timestamp frequency in Hz Ville Syrjala
2020-05-13 15:04 ` Chris Wilson
2020-05-13 15:08 ` Lionel Landwerlin
2020-03-02 14:39 ` [Intel-gfx] [PATCH 3/6] drm/i915: Fix cs_timestamp_frequency_hz for ctg/elk/ilk Ville Syrjala
2020-03-02 14:39 ` Ville Syrjala [this message]
2020-03-02 14:39 ` [Intel-gfx] [PATCH 5/6] drm/i915: Extract i915_cs_timestamp_{ns_to_ticks, tick_to_ns}() Ville Syrjala
2020-05-13 15:09 ` Chris Wilson
2020-03-02 14:39 ` [Intel-gfx] [PATCH 6/6] drm/i915/selftests: Make the CS timestamp tests work on gen4-snb (sort of) Ville Syrjala
2020-05-17 12:49 ` Chris Wilson
2020-03-02 14:58 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/6] drm/i915: Nuke pointless div by 64bit Patchwork
2020-03-02 15:15 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2020-03-02 15:24 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-03-03 1:51 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2020-05-13 14:57 ` [Intel-gfx] [PATCH 1/6] " Chris Wilson
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