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From: Walter Lozano <walter.lozano@collabora.com>
To: u-boot@lists.denx.de
Subject: [PATCH 3/4] mx6cuboxi: customize board_boot_order to access eMMC
Date: Wed,  4 Mar 2020 11:41:24 -0300	[thread overview]
Message-ID: <20200304144125.8564-4-walter.lozano@collabora.com> (raw)
In-Reply-To: <20200304144125.8564-1-walter.lozano@collabora.com>

In SPL legacy code only one MMC device is created, based on BOOT_CFG
register, which can be either SD or eMMC. In this context
board_boot_order return always MMC1 when configure to boot from
SD/eMMC. After switching to DM both SD and eMMC devices are created
based on the information available on DT, but as board_boot_order
only returns MMC1 is not possible to boot from eMMC.

This patch customizes board_boot_order taking into account BOOT_CFG
register to point to correct MMC1 / MMC2 device.

Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
---
 board/solidrun/mx6cuboxi/mx6cuboxi.c | 49 ++++++++++++++++++++++++++++
 1 file changed, 49 insertions(+)

diff --git a/board/solidrun/mx6cuboxi/mx6cuboxi.c b/board/solidrun/mx6cuboxi/mx6cuboxi.c
index 71c77ad2a2..3ce122e8b9 100644
--- a/board/solidrun/mx6cuboxi/mx6cuboxi.c
+++ b/board/solidrun/mx6cuboxi/mx6cuboxi.c
@@ -649,6 +649,55 @@ int board_fit_config_name_match(const char *name)
 	return strcmp(name, tmp_name);
 }
 
+void board_boot_order(u32 *spl_boot_list)
+{
+	struct src *psrc = (struct src *)SRC_BASE_ADDR;
+	unsigned int reg = readl(&psrc->sbmr1) >> 11;
+	u32 boot_mode = imx6_src_get_boot_mode() & IMX6_BMODE_MASK;
+	unsigned int bmode = readl(&src_base->sbmr2);
+
+	/* If bmode is serial or USB phy is active, return serial */
+	if (((bmode >> 24) & 0x03) == 0x01 || is_usbotg_phy_active()) {
+		spl_boot_list[0] = BOOT_DEVICE_BOARD;
+		return;
+	}
+
+	switch (boot_mode >> IMX6_BMODE_SHIFT) {
+	case IMX6_BMODE_NAND_MIN ... IMX6_BMODE_NAND_MAX:
+		spl_boot_list[0] = BOOT_DEVICE_NAND;
+		break;
+	case IMX6_BMODE_SD:
+	case IMX6_BMODE_ESD:
+	case IMX6_BMODE_MMC:
+	case IMX6_BMODE_EMMC:
+		/*
+		 * Upon reading BOOT_CFG register the following map is done:
+		 * Bit 11 and 12 of BOOT_CFG register can determine the current
+		 * mmc port
+		 * 0x1                  SD2
+		 * 0x2                  SD3
+		 */
+
+		reg &= 0x3; /* Only care about bottom 2 bits */
+		switch (reg) {
+		case 1:
+			spl_boot_list[0] = BOOT_DEVICE_MMC1;
+			break;
+		case 2:
+			spl_boot_list[0] = BOOT_DEVICE_MMC2;
+			break;
+		}
+		break;
+	default:
+		/* By default use USB downloader */
+		spl_boot_list[0] = BOOT_DEVICE_BOARD;
+		break;
+	}
+
+	/* As a last resort, use serial downloader */
+	spl_boot_list[1] = BOOT_DEVICE_BOARD;
+}
+
 #ifdef CONFIG_SPL_BUILD
 #include <asm/arch/mx6-ddr.h>
 static const struct mx6dq_iomux_ddr_regs mx6q_ddr_ioregs = {
-- 
2.20.1

  parent reply	other threads:[~2020-03-04 14:41 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-04 14:41 [PATCH 0/4] mx6cuboxi: enable support for OF_CONTROL and DM in SPL Walter Lozano
2020-03-04 14:41 ` [PATCH 1/4] mx6cuboxi: enable MMC and eMMC in DT for SPL Walter Lozano
2020-03-04 14:41 ` [PATCH 2/4] mx6cuboxi: enable MMC iomux on board_early_init_f Walter Lozano
2020-03-08  4:38   ` Baruch Siach
2020-03-09 19:55     ` Walter Lozano
2020-03-04 14:41 ` Walter Lozano [this message]
2020-03-08  4:42   ` [PATCH 3/4] mx6cuboxi: customize board_boot_order to access eMMC Baruch Siach
2020-03-09 19:55     ` Walter Lozano
2020-03-04 14:41 ` [PATCH 4/4] mx6cuboxi: enable OF_CONTROL and DM in SPL Walter Lozano

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