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From: <Sergey.Semin@baikalelectronics.ru>
To: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc: Serge Semin <Sergey.Semin@baikalelectronics.ru>,
	Serge Semin <fancer.lancer@gmail.com>,
	Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>,
	Paul Burton <paulburton@kernel.org>,
	Ralf Baechle <ralf@linux-mips.org>, <linux-mips@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>
Subject: [PATCH 21/22] mips: cevt-r4k: Update the r4k-clockevent frequency in sync with CPU
Date: Fri, 6 Mar 2020 15:47:04 +0300	[thread overview]
Message-ID: <20200306124921.228448030794@mail.baikalelectronics.ru> (raw)
In-Reply-To: <20200306124705.6595-1-Sergey.Semin@baikalelectronics.ru>

From: Serge Semin <Sergey.Semin@baikalelectronics.ru>

Due to being embedded into the CPU cores MIPS count/compare timer
frequency is changed together with the CPU clocks alteration.
In case if frequency really changes the kernel clockevent framework
must be notified, otherwise the kernel timers won't work correctly.
Fix this by calling clockevents_update_freq() for each r4k clockevent
handlers registered per available CPUs.

Traditionally MIPS r4k-clock are clocked with CPU frequency divided by 2.
But this isn't true for some of the platforms. Due to this we have to save
the basic CPU frequency, so then use it to scale the initial timer
frequency (mips_hpt_frequency) and pass the updated value further to the
clockevent framework.

Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Signed-off-by: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>
Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc: Paul Burton <paulburton@kernel.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
---
 arch/mips/kernel/cevt-r4k.c | 44 +++++++++++++++++++++++++++++++++++++
 1 file changed, 44 insertions(+)

diff --git a/arch/mips/kernel/cevt-r4k.c b/arch/mips/kernel/cevt-r4k.c
index dd6a18bc10ab..f24377c1e8d7 100644
--- a/arch/mips/kernel/cevt-r4k.c
+++ b/arch/mips/kernel/cevt-r4k.c
@@ -8,6 +8,7 @@
  */
 #include <linux/clockchips.h>
 #include <linux/interrupt.h>
+#include <linux/cpufreq.h>
 #include <linux/percpu.h>
 #include <linux/smp.h>
 #include <linux/irq.h>
@@ -250,6 +251,49 @@ unsigned int __weak get_c0_compare_int(void)
 	return MIPS_CPU_IRQ_BASE + cp0_compare_irq;
 }
 
+#ifdef CONFIG_CPU_FREQ
+
+static unsigned long mips_ref_freq;
+
+static int cpufreq_callback(struct notifier_block *nb,
+			    unsigned long val, void *data)
+{
+	struct cpufreq_freqs *freq = data;
+	struct clock_event_device *cd;
+	unsigned long rate;
+	int cpu;
+
+	if (!mips_ref_freq)
+		mips_ref_freq = freq->old;
+
+	if (val == CPUFREQ_POSTCHANGE) {
+		rate = cpufreq_scale(mips_hpt_frequency, mips_ref_freq,
+				     freq->new);
+
+		for_each_cpu(cpu, freq->policy->cpus) {
+			cd = &per_cpu(mips_clockevent_device, cpu);
+
+			clockevents_update_freq(cd, rate);
+		}
+	}
+
+	return 0;
+}
+
+static struct notifier_block cpufreq_notifier = {
+	.notifier_call  = cpufreq_callback,
+};
+
+static int __init register_cpufreq_notifier(void)
+{
+	return cpufreq_register_notifier(&cpufreq_notifier,
+					 CPUFREQ_TRANSITION_NOTIFIER);
+
+}
+core_initcall(register_cpufreq_notifier);
+
+#endif /* !CONFIG_CPU_FREQ */
+
 int r4k_clockevent_init(void)
 {
 	unsigned int cpu = smp_processor_id();
-- 
2.25.1


  parent reply	other threads:[~2020-03-06 12:49 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <20200306124705.6595-1-Sergey.Semin@baikalelectronics.ru>
2020-03-06 12:46 ` [PATCH 01/22] dt-bindings: Permit platform devices in the trivial-devices bindings Sergey.Semin
2020-03-06 13:56   ` Rob Herring
     [not found]   ` <20200306140550.0A68180307C4@mail.baikalelectronics.ru>
2020-03-10  1:09     ` Sergey Semin
2020-03-06 12:46 ` [PATCH 02/22] dt-bindings: Add MIPS CPC controller as a trivial devices Sergey.Semin
2020-03-06 12:46 ` [PATCH 03/22] dt-bindings: Add MIPS CDMM controller as a trivial device Sergey.Semin
2020-03-06 12:46 ` [PATCH 04/22] dt-bindings: Add vendor prefix for Baikal Electronics, JSC Sergey.Semin
2020-03-12 20:41   ` Rob Herring
2020-03-13  8:52     ` Sergey Semin
2020-03-12 20:44   ` Rob Herring
2020-03-13  9:40     ` Sergey Semin
2020-03-06 12:46 ` [PATCH 06/22] mips: cm: Add L2 ECC/parity errors reporting Sergey.Semin
2020-03-06 12:46 ` [PATCH 07/22] mips: Add MIPS32 Release 5 support Sergey.Semin
2020-03-06 12:46 ` [PATCH 08/22] mips: Add MIPS Warrior P5600 support Sergey.Semin
2020-03-06 12:46 ` [PATCH 10/22] mips: Add CP0 Write Merge config support Sergey.Semin
2020-03-06 12:46 ` [PATCH 11/22] mips: Add CONFIG/CONFIG6 reg fields macro Sergey.Semin
2020-03-06 12:46 ` [PATCH 12/22] mips: MAAR: Use more precise address mask Sergey.Semin
2020-03-06 12:46 ` [PATCH 13/22] mips: MAAR: Add XPA mode support Sergey.Semin
2020-03-06 12:46 ` [PATCH 14/22] mips: early_printk_8250: Use offset-sized IO-mem accessors Sergey.Semin
2020-03-06 12:46 ` [PATCH 15/22] mips: Use offset-sized IO-mem accessors in CPS debug printout Sergey.Semin
2020-03-06 12:46 ` [PATCH 16/22] mips: cdmm: Add mti,mips-cdmm dtb node support Sergey.Semin
2020-03-06 12:47 ` [PATCH 17/22] bus: cdmm: Add MIPS R5 arch support Sergey.Semin
2020-03-06 12:47 ` [PATCH 18/22] tty: mips_ejtag_fdc: Mark expected switch fall-through Sergey.Semin
2020-03-09 16:12   ` Jiri Slaby
     [not found]   ` <20200309161243.D5D5180307C7@mail.baikalelectronics.ru>
2020-03-10  1:06     ` Sergey Semin
2020-03-17 12:27       ` Jiri Slaby
2020-03-06 12:47 ` [PATCH 19/22] mips: Add udelay lpj numbers adjustment Sergey.Semin
2020-03-06 12:47 ` [PATCH 20/22] mips: csrc-r4k: Decrease r4k-clocksource rating if CPU_FREQ enabled Sergey.Semin
2020-03-06 12:47 ` Sergey.Semin [this message]
2020-03-10  1:01 ` [PATCH 00/22] mips: Prepare MIPS-arch code for Baikal-T1 SoC support Sergey Semin

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