From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2A950C10F29 for ; Mon, 9 Mar 2020 11:09:51 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 050942051A for ; Mon, 9 Mar 2020 11:09:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726781AbgCILJu (ORCPT ); Mon, 9 Mar 2020 07:09:50 -0400 Received: from mout.kundenserver.de ([212.227.126.134]:49957 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725956AbgCILJt (ORCPT ); Mon, 9 Mar 2020 07:09:49 -0400 Received: from mail.cetitecgmbh.com ([87.190.42.90]) by mrelayeu.kundenserver.de (mreue009 [212.227.15.167]) with ESMTPSA (Nemesis) id 1MNss4-1j0MB33BHc-00OKYg; Mon, 09 Mar 2020 12:09:33 +0100 Received: from pflvmailgateway.corp.cetitec.com (unknown [127.0.0.1]) by mail.cetitecgmbh.com (Postfix) with ESMTP id AEACE650061; Mon, 9 Mar 2020 11:09:32 +0000 (UTC) X-Virus-Scanned: amavisd-new at cetitec.com Received: from mail.cetitecgmbh.com ([127.0.0.1]) by pflvmailgateway.corp.cetitec.com (pflvmailgateway.corp.cetitec.com [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id EF_gs1Tv7aJJ; Mon, 9 Mar 2020 12:09:32 +0100 (CET) Received: from pfwsexchange.corp.cetitec.com (unknown [10.10.1.99]) by mail.cetitecgmbh.com (Postfix) with ESMTPS id 4495A64FD05; Mon, 9 Mar 2020 12:09:32 +0100 (CET) Received: from pflmari.corp.cetitec.com (10.10.2.141) by PFWSEXCHANGE.corp.cetitec.com (10.10.1.99) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 9 Mar 2020 12:09:32 +0100 Received: by pflmari.corp.cetitec.com (Postfix, from userid 1000) id E1BA1804F8; Mon, 9 Mar 2020 12:09:31 +0100 (CET) Date: Mon, 9 Mar 2020 12:09:31 +0100 From: Alex Riesen To: Kuninori Morimoto CC: Laurent Pinchart , Geert Uytterhoeven , Kieran Bingham , Mauro Carvalho Chehab , Hans Verkuil , Rob Herring , Mark Rutland , Driver Development , Linux Media , Linux Kernel , Device Tree , Renesas SoC Subject: Re: [PATCH 8/8] arm64: dts: renesas: salvator: add a connection from adv748x codec (HDMI input) to the R-Car SoC Message-ID: <20200309110931.GB3593@pflmari> Mail-Followup-To: Alex Riesen , Kuninori Morimoto , Laurent Pinchart , Geert Uytterhoeven , Kieran Bingham , Mauro Carvalho Chehab , Hans Verkuil , Rob Herring , Mark Rutland , Driver Development , Linux Media , Linux Kernel , Device Tree , Renesas SoC References: <20200302150706.GB3717@pflmari> <20200302160906.GC3717@pflmari> <20200305143628.GB25741@pflmari> <20200306131632.GA4878@pendragon.ideasonboard.com> <20200306134154.GD27714@pflmari> <20200306134546.GE4878@pendragon.ideasonboard.com> <87r1y2wbze.wl-kuninori.morimoto.gx@renesas.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <87r1y2wbze.wl-kuninori.morimoto.gx@renesas.com> X-Originating-IP: [10.10.2.141] X-ClientProxiedBy: PFWSEXCHANGE.corp.cetitec.com (10.10.1.99) To PFWSEXCHANGE.corp.cetitec.com (10.10.1.99) X-EsetResult: clean, is OK X-EsetId: 37303A29536F936F637D63 X-Provags-ID: V03:K1:gR6rW5ecslKFmSCgJXl9/tgvA5veb1fTHa5FSn9E02NiSYn8MTc jfTRnhmhxG1xh05nAmModYg4ablDUwhsTEWRtMKNiwF1Ba+Q4XBvXEXLZUfES35/yWi0Siv mW5lPK8HZK2Ymp/Dyg8Uz8kFjgeAWLhSrZtsSOuyib7tUn57ibP939fs3UC9nCbF83YzvKM Ng06OF7KQ36aOR0aRClNw== X-UI-Out-Filterresults: notjunk:1;V03:K0:rLu4bN4ajpU=:h8UFrs8QFFhECyg3qTXbrA 3JNpp6c0hdSW7ncjvgVXWh2iQHS+Y0jct46wxyEhGGkrV0oCDArK5DhnpdUcTzm78L5zXPGKi yIPl2CNrEgIkSA/5VERu1sHyqn+VdfnDQLHYd7snDgsll+j0MiIpq+/ZK1Z3+6d7K6rZcXMzR w3A7az7S6srz5fz9Auy2RJAPxI0Fe4EBrF7R8bTpT2KJsmch3TyiTErVRCCsOCAo+bdCdZFsM MPvcyE5Q7YLmnY6HMBZnbUUknhGzSVJgthMI1+GqGD6yvp9OU1qI2Z4O8YAbg5ttdRFJbT9Bk Ov05BmUmMHLO/1Msl0vZ20gPoJid/qxpyEbcedDUmDM7Mv27UMAjgKQMo8YVN6ctelyix7s4k JogLp4RV9krJ96qClbNo7DRUsjsAU3w+h4uzi5HGZhhSH4rUJFjBETcK5lykq3IYQFfIOw31D pwdGjPjH++xAyVltzpVnLerAsQkO00qa1hc4nsTUgHCfH5DSa8d2/GHtCBcyRCzN9PHtsdYXy XoWJ78Ckt5RTFgxJ05xxzyMAgX2/TgzhwtWt4XYSFYqs6cDKe+eSNnpo0iaO/eBEQeoJD+1AI N0YtFEfiY4uw5lMmZVkOns/8ii0WQrLWxZg4Ld/wir7iFW3D00Y2iaW5zAj+nxuNttzuospw0 lgy3NUXLdIEwl8WiWDDDnndRbKoMJfsiB9/2tvJ5wvlUM3RFFNH5Z8OSk49IERX5QJwWTQRPs cGgih8YlLjJw4IZgfSClkNtM7w1mk4vjsDvESjtaCr1YiTgaaQ/uL73fsR6f5DtBYYzZ/IhI0 rymrCcY3m1GBu0hpUne15zhelObdrhOC+u5oCsc21Vn87GFy0Wody6vBthbrHoWPTpXLz52 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, Kuninori Morimoto, Mon, Mar 09, 2020 02:31:01 +0100: > > > > Those clocks are part of the CSI-2 protocol and also don't need to be > > > > explicitly controlled. As far as I can tell from a quick check of the > > > > ADV7482 documentation, only the I2S MCLK is a general-purpose clock that > > > > needs to be exposed. > (snip) > > > Do you know, by chance, which of the snd_soc* callbacks should be used to > > > implement setting of the MCLK? The one in snd_soc_component_driver or > > > snd_soc_dai_driver->ops (snd_soc_dai_ops)? > > > > > > Or how the userspace interface looks like? Or, if there is no userspace > > > interface for this, how the MCLK is supposed to be set? Through mclk-fs? > > > > I'm afraid my knowledge of the sound subsystem is limited. Morimoto-san > > is the main developer and maintainer of Renesas sound drivers. > > Morimoto-sensei, would you have an answer to that question ? :-) > > In my quick check, it goes to AUDIO_CLKC. > If so, you can update rcar_sound::clocks. > > &rcar_sound { > ... > - /* update to */ > + /* update to , > + * to */ > clocks = <&cpg CPG_MOD 1005>, > ... > <&audio_clk_a>, <&cs2000>, > - <&audio_clk_c>, > + <&adv748x>, > <&cpg CPG_CORE CPG_AUDIO_CLK_I>; > > Thank you for your help !! Thanks. Should the adv748x driver also implement anything to configure the frequency of MCLK clock? I mean something like .set_sysclk and .set_fmt callbacks of snd_soc_dai_ops? Or is the driver implementation, which depends on mclk-fs to be 256, the audio stream format to be 8x S24_LE, and requires strictly 48kHz sampling rate on the HDMI input, a totally acceptable first attempt at writing a DAI driver? I'm a bit bothered by that, as the hardware is also capable of decoding stereo, sampling rate 32-192kHz, a variety of PCM and compressed/encrypted formats, 128-768fs MCLK multipliers, and a row of I2S options. I just find it confusing to place the configuration interfaces. For instance, the patches use the media ioctl for audio output selection to select I2S protocol. While works, it does not feel right (shouldn't it be in the device tree?) Maybe you can point me at a driver doing something similar? I'm studying media drivers now, but not many of them use ASoC interfaces for devices providing a clock. Or maybe I should better look at sound/soc/...? Thanks in advance, Alex From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C55CCC18E5B for ; Mon, 9 Mar 2020 11:09:57 +0000 (UTC) Received: from hemlock.osuosl.org (smtp2.osuosl.org [140.211.166.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A51EF2051A for ; Mon, 9 Mar 2020 11:09:57 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A51EF2051A Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=cetitec.com Authentication-Results: mail.kernel.org; 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Mon, 9 Mar 2020 12:09:32 +0100 (CET) Received: from pflmari.corp.cetitec.com (10.10.2.141) by PFWSEXCHANGE.corp.cetitec.com (10.10.1.99) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 9 Mar 2020 12:09:32 +0100 Received: by pflmari.corp.cetitec.com (Postfix, from userid 1000) id E1BA1804F8; Mon, 9 Mar 2020 12:09:31 +0100 (CET) Date: Mon, 9 Mar 2020 12:09:31 +0100 From: Alex Riesen To: Kuninori Morimoto Subject: Re: [PATCH 8/8] arm64: dts: renesas: salvator: add a connection from adv748x codec (HDMI input) to the R-Car SoC Message-ID: <20200309110931.GB3593@pflmari> Mail-Followup-To: Alex Riesen , Kuninori Morimoto , Laurent Pinchart , Geert Uytterhoeven , Kieran Bingham , Mauro Carvalho Chehab , Hans Verkuil , Rob Herring , Mark Rutland , Driver Development , Linux Media , Linux Kernel , Device Tree , Renesas SoC References: <20200302150706.GB3717@pflmari> <20200302160906.GC3717@pflmari> <20200305143628.GB25741@pflmari> <20200306131632.GA4878@pendragon.ideasonboard.com> <20200306134154.GD27714@pflmari> <20200306134546.GE4878@pendragon.ideasonboard.com> <87r1y2wbze.wl-kuninori.morimoto.gx@renesas.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <87r1y2wbze.wl-kuninori.morimoto.gx@renesas.com> X-Originating-IP: [10.10.2.141] X-ClientProxiedBy: PFWSEXCHANGE.corp.cetitec.com (10.10.1.99) To PFWSEXCHANGE.corp.cetitec.com (10.10.1.99) X-EsetResult: clean, is OK X-EsetId: 37303A29536F936F637D63 X-Provags-ID: V03:K1:gR6rW5ecslKFmSCgJXl9/tgvA5veb1fTHa5FSn9E02NiSYn8MTc jfTRnhmhxG1xh05nAmModYg4ablDUwhsTEWRtMKNiwF1Ba+Q4XBvXEXLZUfES35/yWi0Siv mW5lPK8HZK2Ymp/Dyg8Uz8kFjgeAWLhSrZtsSOuyib7tUn57ibP939fs3UC9nCbF83YzvKM Ng06OF7KQ36aOR0aRClNw== X-UI-Out-Filterresults: notjunk:1;V03:K0:rLu4bN4ajpU=:h8UFrs8QFFhECyg3qTXbrA 3JNpp6c0hdSW7ncjvgVXWh2iQHS+Y0jct46wxyEhGGkrV0oCDArK5DhnpdUcTzm78L5zXPGKi yIPl2CNrEgIkSA/5VERu1sHyqn+VdfnDQLHYd7snDgsll+j0MiIpq+/ZK1Z3+6d7K6rZcXMzR w3A7az7S6srz5fz9Auy2RJAPxI0Fe4EBrF7R8bTpT2KJsmch3TyiTErVRCCsOCAo+bdCdZFsM MPvcyE5Q7YLmnY6HMBZnbUUknhGzSVJgthMI1+GqGD6yvp9OU1qI2Z4O8YAbg5ttdRFJbT9Bk Ov05BmUmMHLO/1Msl0vZ20gPoJid/qxpyEbcedDUmDM7Mv27UMAjgKQMo8YVN6ctelyix7s4k JogLp4RV9krJ96qClbNo7DRUsjsAU3w+h4uzi5HGZhhSH4rUJFjBETcK5lykq3IYQFfIOw31D pwdGjPjH++xAyVltzpVnLerAsQkO00qa1hc4nsTUgHCfH5DSa8d2/GHtCBcyRCzN9PHtsdYXy XoWJ78Ckt5RTFgxJ05xxzyMAgX2/TgzhwtWt4XYSFYqs6cDKe+eSNnpo0iaO/eBEQeoJD+1AI N0YtFEfiY4uw5lMmZVkOns/8ii0WQrLWxZg4Ld/wir7iFW3D00Y2iaW5zAj+nxuNttzuospw0 lgy3NUXLdIEwl8WiWDDDnndRbKoMJfsiB9/2tvJ5wvlUM3RFFNH5Z8OSk49IERX5QJwWTQRPs cGgih8YlLjJw4IZgfSClkNtM7w1mk4vjsDvESjtaCr1YiTgaaQ/uL73fsR6f5DtBYYzZ/IhI0 rymrCcY3m1GBu0hpUne15zhelObdrhOC+u5oCsc21Vn87GFy0Wody6vBthbrHoWPTpXLz52 X-BeenThere: driverdev-devel@linuxdriverproject.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux Driver Project Developer List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Driver Development , Device Tree , Kieran Bingham , Linux Kernel , Renesas SoC , Rob Herring , Geert Uytterhoeven , Laurent Pinchart , Hans Verkuil , Mauro Carvalho Chehab , Linux Media Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: driverdev-devel-bounces@linuxdriverproject.org Sender: "devel" Hi, Kuninori Morimoto, Mon, Mar 09, 2020 02:31:01 +0100: > > > > Those clocks are part of the CSI-2 protocol and also don't need to be > > > > explicitly controlled. As far as I can tell from a quick check of the > > > > ADV7482 documentation, only the I2S MCLK is a general-purpose clock that > > > > needs to be exposed. > (snip) > > > Do you know, by chance, which of the snd_soc* callbacks should be used to > > > implement setting of the MCLK? The one in snd_soc_component_driver or > > > snd_soc_dai_driver->ops (snd_soc_dai_ops)? > > > > > > Or how the userspace interface looks like? Or, if there is no userspace > > > interface for this, how the MCLK is supposed to be set? Through mclk-fs? > > > > I'm afraid my knowledge of the sound subsystem is limited. Morimoto-san > > is the main developer and maintainer of Renesas sound drivers. > > Morimoto-sensei, would you have an answer to that question ? :-) > > In my quick check, it goes to AUDIO_CLKC. > If so, you can update rcar_sound::clocks. > > &rcar_sound { > ... > - /* update to */ > + /* update to , > + * to */ > clocks = <&cpg CPG_MOD 1005>, > ... > <&audio_clk_a>, <&cs2000>, > - <&audio_clk_c>, > + <&adv748x>, > <&cpg CPG_CORE CPG_AUDIO_CLK_I>; > > Thank you for your help !! Thanks. Should the adv748x driver also implement anything to configure the frequency of MCLK clock? I mean something like .set_sysclk and .set_fmt callbacks of snd_soc_dai_ops? Or is the driver implementation, which depends on mclk-fs to be 256, the audio stream format to be 8x S24_LE, and requires strictly 48kHz sampling rate on the HDMI input, a totally acceptable first attempt at writing a DAI driver? I'm a bit bothered by that, as the hardware is also capable of decoding stereo, sampling rate 32-192kHz, a variety of PCM and compressed/encrypted formats, 128-768fs MCLK multipliers, and a row of I2S options. I just find it confusing to place the configuration interfaces. For instance, the patches use the media ioctl for audio output selection to select I2S protocol. While works, it does not feel right (shouldn't it be in the device tree?) Maybe you can point me at a driver doing something similar? I'm studying media drivers now, but not many of them use ASoC interfaces for devices providing a clock. Or maybe I should better look at sound/soc/...? Thanks in advance, Alex _______________________________________________ devel mailing list devel@linuxdriverproject.org http://driverdev.linuxdriverproject.org/mailman/listinfo/driverdev-devel