From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.3 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A40A1C10F25 for ; Mon, 9 Mar 2020 21:15:44 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 826CA2146E for ; Mon, 9 Mar 2020 21:15:44 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 826CA2146E Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 301E06E593; Mon, 9 Mar 2020 21:15:44 +0000 (UTC) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTPS id C16CA6E593 for ; Mon, 9 Mar 2020 21:15:42 +0000 (UTC) X-Amp-Result: UNKNOWN X-Amp-Original-Verdict: FILE UNKNOWN X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 09 Mar 2020 14:15:41 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.70,534,1574150400"; d="scan'208";a="234121939" Received: from orsosgc001.ra.intel.com (HELO orsosgc001.amr.corp.intel.com) ([10.23.184.150]) by fmsmga007.fm.intel.com with ESMTP; 09 Mar 2020 14:15:41 -0700 Date: Mon, 9 Mar 2020 14:15:41 -0700 From: Umesh Nerlige Ramappa To: "Dixit, Ashutosh" Message-ID: <20200309211541.GB9651@orsosgc001.amr.corp.intel.com> References: <20200303221905.25866-1-umesh.nerlige.ramappa@intel.com> <20200303221905.25866-8-umesh.nerlige.ramappa@intel.com> <87v9nku0uu.wl-ashutosh.dixit@intel.com> <87o8tb2vlf.wl-ashutosh.dixit@intel.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <87o8tb2vlf.wl-ashutosh.dixit@intel.com> User-Agent: Mutt/1.12.0 (2019-05-25) Subject: Re: [Intel-gfx] [PATCH 7/7] drm/i915/perf: add flushing ioctl X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: intel-gfx@lists.freedesktop.org Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Wed, Mar 04, 2020 at 09:56:28PM -0800, Dixit, Ashutosh wrote: >On Wed, 04 Mar 2020 00:52:34 -0800, Lionel Landwerlin wrote: >> >> On 04/03/2020 07:48, Dixit, Ashutosh wrote: >> > On Tue, 03 Mar 2020 14:19:05 -0800, Umesh Nerlige Ramappa wrote: >> >> From: Lionel Landwerlin >> >> >> >> With the currently available parameters for the i915-perf stream, >> >> there are still situations that are not well covered : >> >> >> >> If an application opens the stream with polling disable or at very low >> >> frequency and OA interrupt enabled, no data will be available even >> >> though somewhere between nothing and half of the OA buffer worth of >> >> data might have landed in memory. >> >> >> >> To solve this issue we have a new flush ioctl on the perf stream that >> >> forces the i915-perf driver to look at the state of the buffer when >> >> called and makes any data available through both poll() & read() type >> >> syscalls. >> >> >> >> v2: Version the ioctl (Joonas) >> >> v3: Rebase (Umesh) >> >> >> >> Signed-off-by: Lionel Landwerlin >> >> Signed-off-by: Umesh Nerlige Ramappa >> > [snip] >> > >> >> +/** >> >> + * i915_perf_flush_data - handle `I915_PERF_IOCTL_FLUSH_DATA` ioctl >> >> + * @stream: An enabled i915 perf stream >> >> + * >> >> + * The intention is to flush all the data available for reading from the OA >> >> + * buffer >> >> + */ >> >> +static void i915_perf_flush_data(struct i915_perf_stream *stream) >> >> +{ >> >> + stream->pollin = oa_buffer_check(stream, true); >> >> +} >> > Since this function doesn't actually wake up any thread (which anyway can >> > be done by sending a signal to the blocked thread), is the only purpose of >> > this function to update OA buffer head/tail? But in that it is not clear >> > why a separate ioctl should be created for this, can't the read() call >> > itself call oa_buffer_check() to update the OA buffer head/tail? >> > >> > Again just trying to minimize uapi changes if possible. >> >> Most applications will call read() after being notified by poll()/select() >> that some data is available. > >Correct this is the standard non blocking read behavior. > >> Changing that behavior will break some of the existing perf tests . > >I am not suggesting changing that (that standard non blocking read >behavior). > >> If any data is available, this new ioctl will wake up existing waiters on >> poll()/select(). > >The issue is we are not calling wake_up() in the above function to wake up >any blocked waiters. The ioctl will just update the OA buffer head/tail so >that (a) a subsequent blocking read will not block, or (b) a subsequent non >blocking read will return valid data (not -EAGAIN), or (c) a poll/select >will not block but return immediately saying data is available. > >That is why it seems to me the ioctl is not required, updating the OA >buffer head/tail can be done as part of the read() (and the poll/select) >calls themselves. > >We will investigate if this can be done and update the patches in the next >revision accordingly. Thanks! resending (cc: Lionel).. In this case, where we are trying to determine if there is any data in the oa buffer before the next interrupt has fired, user could call poll with a reasonable timeout to determine if data is available or not. That would eliminate the need for the flush ioctl. Thoughts? Thanks, Umesh _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx