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Signed-off-by: Corey Wharton Reviewed-by: Bin Meng Reviewed-by: Alistair Francis --- hw/riscv/sifive_e.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/hw/riscv/sifive_e.c b/hw/riscv/sifive_e.c index a254cad489..b0a611adb9 100644 --- a/hw/riscv/sifive_e.c +++ b/hw/riscv/sifive_e.c @@ -123,7 +123,7 @@ static void riscv_sifive_e_soc_init(Object *obj) object_initialize_child(obj, "cpus", &s->cpus, sizeof(s->cpus), TYPE_RISCV_HART_ARRAY, &error_abort, NULL); - object_property_set_str(OBJECT(&s->cpus), SIFIVE_E_CPU, "cpu-type", + object_property_set_str(OBJECT(&s->cpus), ms->cpu_type, "cpu-type", &error_abort); object_property_set_int(OBJECT(&s->cpus), ms->smp.cpus, "num-harts", &error_abort); @@ -220,6 +220,7 @@ static void riscv_sifive_e_machine_init(MachineClass *mc) mc->desc = "RISC-V Board compatible with SiFive E SDK"; mc->init = riscv_sifive_e_init; mc->max_cpus = 1; + mc->default_cpu_type = SIFIVE_E_CPU; } DEFINE_MACHINE("sifive_e", riscv_sifive_e_machine_init) -- 2.21.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1jCq5m-000363-Jf for mharc-qemu-riscv@gnu.org; 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Signed-off-by: Corey Wharton Reviewed-by: Bin Meng Reviewed-by: Alistair Francis --- hw/riscv/sifive_e.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/hw/riscv/sifive_e.c b/hw/riscv/sifive_e.c index a254cad489..b0a611adb9 100644 --- a/hw/riscv/sifive_e.c +++ b/hw/riscv/sifive_e.c @@ -123,7 +123,7 @@ static void riscv_sifive_e_soc_init(Object *obj) object_initialize_child(obj, "cpus", &s->cpus, sizeof(s->cpus), TYPE_RISCV_HART_ARRAY, &error_abort, NULL); - object_property_set_str(OBJECT(&s->cpus), SIFIVE_E_CPU, "cpu-type", + object_property_set_str(OBJECT(&s->cpus), ms->cpu_type, "cpu-type", &error_abort); object_property_set_int(OBJECT(&s->cpus), ms->smp.cpus, "num-harts", &error_abort); @@ -220,6 +220,7 @@ static void riscv_sifive_e_machine_init(MachineClass *mc) mc->desc = "RISC-V Board compatible with SiFive E SDK"; mc->init = riscv_sifive_e_init; mc->max_cpus = 1; + mc->default_cpu_type = SIFIVE_E_CPU; } DEFINE_MACHINE("sifive_e", riscv_sifive_e_machine_init) -- 2.21.1