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From: Manasi Navare <manasi.d.navare@intel.com>
To: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 03/13] drm/i915: Drop usless master_transcoder assignments
Date: Fri, 20 Mar 2020 16:12:16 -0700	[thread overview]
Message-ID: <20200320231216.GC15035@intel.com> (raw)
In-Reply-To: <20200319132205.GI13686@intel.com>

On Thu, Mar 19, 2020 at 03:22:06PM +0200, Ville Syrjälä wrote:
> On Wed, Mar 18, 2020 at 03:37:32PM -0700, Manasi Navare wrote:
> > On Fri, Mar 13, 2020 at 06:48:21PM +0200, Ville Syrjala wrote:
> > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > 
> > > The entire crtc state has been reset before readout so
> > > master_transcoder is already set to INVALID.
> > 
> > But wont that mean that the master transcoder would be set to 0
> > on reset and what we want is actually setting that to INVALID
> 
> No. Pls see intel_crtc_state_reset()
>

Okay got it with that

Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>

Manasi
 
> 
> > 
> > Manasi
> > 
> > > 
> > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > ---
> > >  drivers/gpu/drm/i915/display/intel_display.c | 2 --
> > >  1 file changed, 2 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> > > index c49b4e6eb3d4..12823d8f6afe 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > > @@ -9364,7 +9364,6 @@ static bool i9xx_get_pipe_config(struct intel_crtc *crtc,
> > >  	pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
> > >  	pipe_config->cpu_transcoder = (enum transcoder) crtc->pipe;
> > >  	pipe_config->shared_dpll = NULL;
> > > -	pipe_config->master_transcoder = INVALID_TRANSCODER;
> > >  
> > >  	ret = false;
> > >  
> > > @@ -10588,7 +10587,6 @@ static bool ilk_get_pipe_config(struct intel_crtc *crtc,
> > >  
> > >  	pipe_config->cpu_transcoder = (enum transcoder) crtc->pipe;
> > >  	pipe_config->shared_dpll = NULL;
> > > -	pipe_config->master_transcoder = INVALID_TRANSCODER;
> > >  
> > >  	ret = false;
> > >  	tmp = intel_de_read(dev_priv, PIPECONF(crtc->pipe));
> > > -- 
> > > 2.24.1
> > > 
> 
> -- 
> Ville Syrjälä
> Intel
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  reply	other threads:[~2020-03-20 23:10 UTC|newest]

Thread overview: 41+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-13 16:48 [Intel-gfx] [PATCH 00/13] drm/i915: Port sync for skl+ Ville Syrjala
2020-03-13 16:48 ` [Intel-gfx] [PATCH 01/13] drm/i915/mst: Use .compute_config_late() to compute master transcoder Ville Syrjala
2020-03-20 23:37   ` Souza, Jose
2020-03-20 23:54     ` Souza, Jose
2020-03-13 16:48 ` [Intel-gfx] [PATCH 02/13] drm/i915: Move TRANS_DDI_FUNC_CTL2 programming where it belongs Ville Syrjala
2020-03-18 22:34   ` Manasi Navare
2020-03-19 13:20     ` Ville Syrjälä
2020-03-20 18:36       ` Manasi Navare
2020-03-13 16:48 ` [Intel-gfx] [PATCH 03/13] drm/i915: Drop usless master_transcoder assignments Ville Syrjala
2020-03-18 22:37   ` Manasi Navare
2020-03-19 13:22     ` Ville Syrjälä
2020-03-20 23:12       ` Manasi Navare [this message]
2020-03-13 16:48 ` [Intel-gfx] [PATCH 04/13] drm/i915: Move icl_get_trans_port_sync_config() into the DDI code Ville Syrjala
2020-03-18 22:44   ` Manasi Navare
2020-03-13 16:48 ` [Intel-gfx] [PATCH 05/13] drm/i915: Use REG_FIELD_PREP() & co. for TRANS_DDI_FUNC_CTL2 Ville Syrjala
2020-03-18 22:53   ` Manasi Navare
2020-03-13 16:48 ` [Intel-gfx] [PATCH 06/13] drm/i915: Include port sync state in the state dump Ville Syrjala
2020-03-18 23:00   ` Manasi Navare
2020-03-27 17:15     ` Ville Syrjälä
2020-03-13 16:48 ` [Intel-gfx] [PATCH 07/13] drm/i915: Store cpu_transcoder_mask in device info Ville Syrjala
2020-03-18 17:02   ` [Intel-gfx] [PATCH v2 " Ville Syrjala
2020-04-02  0:59     ` Souza, Jose
2020-03-13 16:48 ` [Intel-gfx] [PATCH 08/13] drm/i915: Implement port sync for SKL+ Ville Syrjala
2020-03-18 23:32   ` Manasi Navare
2020-03-13 16:48 ` [Intel-gfx] [PATCH 09/13] drm/i915: Eliminate port sync copy pasta Ville Syrjala
2020-04-02  1:25   ` Souza, Jose
2020-03-13 16:48 ` [Intel-gfx] [PATCH 10/13] drm/i915: Fix port sync code to work with >2 pipes Ville Syrjala
2020-04-03  0:32   ` Souza, Jose
2020-04-03 17:25     ` Ville Syrjälä
2020-03-13 16:48 ` [Intel-gfx] [PATCH 11/13] drm/i915: Do pipe updates after enables for everyone Ville Syrjala
2020-04-03  0:44   ` Souza, Jose
2020-03-13 16:48 ` [Intel-gfx] [PATCH 12/13] drm/i915: Pass atomic state to encoder hooks Ville Syrjala
2020-04-02  1:18   ` Souza, Jose
2020-03-13 16:48 ` [Intel-gfx] [PATCH 13/13] drm/i915: Move the port sync DP_TP_CTL stuff to the encoder hook Ville Syrjala
2020-04-03  0:59   ` Souza, Jose
2020-03-16 14:43 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915: Port sync for skl+ Patchwork
2020-03-18 18:45 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Port sync for skl+ (rev2) Patchwork
2020-03-18 18:57 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2020-03-18 21:39 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Port sync for skl+ (rev3) Patchwork
2020-03-18 22:05 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-03-19  0:19 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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