[PATCHv2 0/9] fsl: layerscape: Initialize the GIC redistributor

[PATCHv2 0/9] fsl: layerscape: Initialize the GIC redistributor

[Zhiqiang Hou]

From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>

This patch set is to initialize the GIC redistributor tables and add the
tables to kernel DT's reserved memeory node.

Hou Zhiqiang (9):
  board: lx2160a: Add header file cpu_func.h
  arm64: fsl-layerscape: Assign addr to resv_ram if enabled RESV_RAM
    config
  board: lx2160a: Don't program the GIC RD tables if failed to reserve
    memory
  board: lx2160a: Make sure the RD tables address align to 64KB
  fsl-layerscape: Kconfig: Select RESV_RAM config if GIC_V3_ITS is
    enabled
  arm64: layerscape: Move GIC RD tables initialization to CPU setup
    function
  configs: ls1088a: Enable GIC_V3_ITS config
  configs: ls1028a: Enable GIC_V3_ITS config
  configs: ls208xa: Enable GIC_V3_ITS config

Depends on:
 https://patchwork.ozlabs.org/project/uboot/list/?series=158486

 arch/arm/cpu/armv8/fsl-layerscape/Kconfig     |  4 ++
 arch/arm/cpu/armv8/fsl-layerscape/cpu.c       |  8 ++--
 arch/arm/cpu/armv8/fsl-layerscape/fdt.c       |  4 ++
 arch/arm/cpu/armv8/fsl-layerscape/soc.c       | 44 +++++++++++++++++++
 .../arm/include/asm/arch-fsl-layerscape/soc.h |  4 ++
 board/freescale/lx2160a/lx2160a.c             | 24 ----------
 configs/ls1028aqds_tfa_SECURE_BOOT_defconfig  |  1 +
 configs/ls1028aqds_tfa_defconfig              |  1 +
 configs/ls1028ardb_tfa_SECURE_BOOT_defconfig  |  1 +
 configs/ls1028ardb_tfa_defconfig              |  1 +
 configs/ls1088aqds_defconfig                  |  1 +
 configs/ls1088aqds_qspi_SECURE_BOOT_defconfig |  1 +
 configs/ls1088aqds_qspi_defconfig             |  1 +
 configs/ls1088aqds_sdcard_ifc_defconfig       |  1 +
 configs/ls1088aqds_sdcard_qspi_defconfig      |  1 +
 configs/ls1088aqds_tfa_defconfig              |  1 +
 configs/ls1088ardb_qspi_SECURE_BOOT_defconfig |  1 +
 configs/ls1088ardb_qspi_defconfig             |  1 +
 ...1088ardb_sdcard_qspi_SECURE_BOOT_defconfig |  1 +
 configs/ls1088ardb_sdcard_qspi_defconfig      |  1 +
 configs/ls1088ardb_tfa_SECURE_BOOT_defconfig  |  1 +
 configs/ls1088ardb_tfa_defconfig              |  1 +
 configs/ls2080aqds_SECURE_BOOT_defconfig      |  1 +
 configs/ls2080aqds_defconfig                  |  1 +
 configs/ls2080aqds_nand_defconfig             |  1 +
 configs/ls2080aqds_qspi_defconfig             |  1 +
 configs/ls2080aqds_sdcard_defconfig           |  1 +
 configs/ls2080ardb_SECURE_BOOT_defconfig      |  1 +
 configs/ls2080ardb_defconfig                  |  1 +
 configs/ls2080ardb_nand_defconfig             |  1 +
 configs/ls2081ardb_defconfig                  |  1 +
 configs/ls2088aqds_tfa_defconfig              |  1 +
 configs/ls2088ardb_qspi_SECURE_BOOT_defconfig |  1 +
 configs/ls2088ardb_qspi_defconfig             |  1 +
 configs/ls2088ardb_tfa_SECURE_BOOT_defconfig  |  1 +
 configs/ls2088ardb_tfa_defconfig              |  1 +
 36 files changed, 90 insertions(+), 28 deletions(-)

-- 
2.17.1

[PATCHv2 1/9] board: lx2160a: Add header file cpu_func.h

[Zhiqiang Hou]

From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>

The declaration of the function cpu_numcores() has been moved to
cpu_func.h, so add including of the header file to avoid build
error.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
V2:
 - No change.

 board/freescale/lx2160a/lx2160a.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/board/freescale/lx2160a/lx2160a.c b/board/freescale/lx2160a/lx2160a.c
index 134ae22f85..595c774b42 100644
--- a/board/freescale/lx2160a/lx2160a.c
+++ b/board/freescale/lx2160a/lx2160a.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <clock_legacy.h>
+#include <cpu_func.h>
 #include <dm.h>
 #include <dm/platform_data/serial_pl01x.h>
 #include <i2c.h>
-- 
2.17.1

[PATCHv2 2/9] arm64: fsl-layerscape: Assign addr to resv_ram if enabled RESV_RAM config

[Zhiqiang Hou]

From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>

The initialization of gd->arch.resv_ram pointer should depend on if the
RESV_RAM config is enabled.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
V2:
 - No change.

 arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
index b443894453..1b7729c046 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
@@ -1379,7 +1379,7 @@ static int tfa_dram_init_banksize(void)
 	if (i > 0)
 		ret = 0;
 
-#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
+#if defined(CONFIG_RESV_RAM) && !defined(CONFIG_SPL_BUILD)
 	/* Assign memory for MC */
 #ifdef CONFIG_SYS_DDR_BLOCK3_BASE
 	if (gd->bd->bi_dram[2].size >=
@@ -1402,7 +1402,7 @@ static int tfa_dram_init_banksize(void)
 				board_reserve_ram_top(gd->bd->bi_dram[0].size);
 		}
 	}
-#endif	/* CONFIG_FSL_MC_ENET */
+#endif	/* CONFIG_RESV_RAM */
 
 	return ret;
 }
@@ -1465,7 +1465,7 @@ int dram_init_banksize(void)
 	}
 #endif	/* CONFIG_SYS_MEM_RESERVE_SECURE */
 
-#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
+#if defined(CONFIG_RESV_RAM) && !defined(CONFIG_SPL_BUILD)
 	/* Assign memory for MC */
 #ifdef CONFIG_SYS_DDR_BLOCK3_BASE
 	if (gd->bd->bi_dram[2].size >=
@@ -1488,7 +1488,7 @@ int dram_init_banksize(void)
 				board_reserve_ram_top(gd->bd->bi_dram[0].size);
 		}
 	}
-#endif	/* CONFIG_FSL_MC_ENET */
+#endif	/* CONFIG_RESV_RAM */
 
 #ifdef CONFIG_SYS_DP_DDR_BASE_PHY
 #ifdef CONFIG_SYS_DDR_BLOCK3_BASE
-- 
2.17.1

[PATCHv2 3/9] board: lx2160a: Don't program the GIC RD tables if failed to reserve memory

[Zhiqiang Hou]

From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>

Program the GIC redistributor tables only when succeeded to reserve memory
for them, otherwise kernel will lose the chance to program them using
allocated memory.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
V2:
 - The #4 of v1 patchset.

 board/freescale/lx2160a/lx2160a.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/board/freescale/lx2160a/lx2160a.c b/board/freescale/lx2160a/lx2160a.c
index 595c774b42..7f22110dc6 100644
--- a/board/freescale/lx2160a/lx2160a.c
+++ b/board/freescale/lx2160a/lx2160a.c
@@ -657,6 +657,7 @@ int ft_board_setup(void *blob, bd_t *bd)
 	u64 mc_memory_size = 0;
 	u16 total_memory_banks;
 	u64 gic_lpi_base;
+	int ret;
 
 	ft_cpu_setup(blob, bd);
 
@@ -678,8 +679,9 @@ int ft_board_setup(void *blob, bd_t *bd)
 
 #ifdef CONFIG_GIC_V3_ITS
 	gic_lpi_base = gd->arch.resv_ram - GIC_LPI_SIZE;
-	gic_lpi_tables_init(gic_lpi_base, cpu_numcores());
-	fdt_fixup_gic_lpi_memory(blob, gic_lpi_base);
+	ret = fdt_fixup_gic_lpi_memory(blob, gic_lpi_base);
+	if (!ret && gic_lpi_tables_init(gic_lpi_base, cpu_numcores()))
+		debug("%s: failed to init gic-lpi-tables\n", __func__);
 #endif
 
 #ifdef CONFIG_RESV_RAM
-- 
2.17.1

[PATCHv2 4/9] board: lx2160a: Make sure the RD tables address align to 64KB

[Zhiqiang Hou]

From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>

As the lower 16bit of the redistributor pending table is reserved
for describing the memory attributes, we must give a 64KB aligned
address to the GIC LPI initialization function.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
V2:
 - The #5 of v1 patchset.

 board/freescale/lx2160a/lx2160a.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/board/freescale/lx2160a/lx2160a.c b/board/freescale/lx2160a/lx2160a.c
index 7f22110dc6..c8e962ce3d 100644
--- a/board/freescale/lx2160a/lx2160a.c
+++ b/board/freescale/lx2160a/lx2160a.c
@@ -17,6 +17,7 @@
 #include <asm/io.h>
 #include <fdt_support.h>
 #include <linux/libfdt.h>
+#include <linux/sizes.h>
 #include <fsl-mc/fsl_mc.h>
 #include <env_internal.h>
 #include <efi_loader.h>
@@ -678,7 +679,7 @@ int ft_board_setup(void *blob, bd_t *bd)
 	}
 
 #ifdef CONFIG_GIC_V3_ITS
-	gic_lpi_base = gd->arch.resv_ram - GIC_LPI_SIZE;
+	gic_lpi_base = ALIGN(gd->arch.resv_ram - GIC_LPI_SIZE, SZ_64K);
 	ret = fdt_fixup_gic_lpi_memory(blob, gic_lpi_base);
 	if (!ret && gic_lpi_tables_init(gic_lpi_base, cpu_numcores()))
 		debug("%s: failed to init gic-lpi-tables\n", __func__);
-- 
2.17.1

[PATCHv2 5/9] fsl-layerscape: Kconfig: Select RESV_RAM config if GIC_V3_ITS is enabled

[Zhiqiang Hou]

From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>

The GIC redistributor tables initialization depends on RESV_RAM config,
so select RESV_RAM if GIC_V3_ITS is enabled.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
V2:
 - The #6 of v1 patchset.

 arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index 275c66d992..af1c148c26 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -46,6 +46,7 @@ config ARCH_LS1028A
 	select SYS_FSL_ERRATUM_A009663 if !TFABOOT
 	select SYS_FSL_ERRATUM_A009942 if !TFABOOT
 	select SYS_FSL_ERRATUM_A050382
+	select RESV_RAM if GIC_V3_ITS
 	imply PANIC_HANG
 
 config ARCH_LS1043A
@@ -152,6 +153,7 @@ config ARCH_LS1088A
 	select SYS_I2C_MXC_I2C2 if !TFABOOT
 	select SYS_I2C_MXC_I2C3 if !TFABOOT
 	select SYS_I2C_MXC_I2C4 if !TFABOOT
+	select RESV_RAM if GIC_V3_ITS
 	imply SCSI
 	imply PANIC_HANG
 
@@ -202,6 +204,7 @@ config ARCH_LS2080A
 	select SYS_I2C_MXC_I2C2 if !TFABOOT
 	select SYS_I2C_MXC_I2C3 if !TFABOOT
 	select SYS_I2C_MXC_I2C4 if !TFABOOT
+	select RESV_RAM if GIC_V3_ITS
 	imply DISTRO_DEFAULTS
 	imply PANIC_HANG
 
@@ -229,6 +232,7 @@ config ARCH_LX2160A
 	select ARCH_EARLY_INIT_R
 	select BOARD_EARLY_INIT_F
 	select SYS_I2C_MXC
+	select RESV_RAM if GIC_V3_ITS
 	imply DISTRO_DEFAULTS
 	imply PANIC_HANG
 	imply SCSI
-- 
2.17.1

[PATCHv2 6/9] arm64: layerscape: Move GIC RD tables initialization to CPU setup function

[Zhiqiang Hou]

From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>

Move GIC redistributor tables initialization to CPU setup function.

This patch introduces a GIC redistributor tables init function, and
moves the function of reserving memory for GIC redistributor tables
to soc.c and adds a argument for the memory size to reserve, BTW
rename the function so that it is more readable.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
V2:
 - New patch.

 arch/arm/cpu/armv8/fsl-layerscape/fdt.c       |  4 ++
 arch/arm/cpu/armv8/fsl-layerscape/soc.c       | 44 +++++++++++++++++++
 .../arm/include/asm/arch-fsl-layerscape/soc.h |  4 ++
 board/freescale/lx2160a/lx2160a.c             | 28 ------------
 4 files changed, 52 insertions(+), 28 deletions(-)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
index 87c3e05f45..36e0a2380e 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
@@ -462,6 +462,10 @@ void ft_cpu_setup(void *blob, bd_t *bd)
 	do_fixup_by_path_u32(blob, "/sysclk", "clock-frequency",
 			     CONFIG_SYS_CLK_FREQ, 1);
 
+#ifdef CONFIG_GIC_V3_ITS
+	ls_gic_rd_tables_init(blob);
+#endif
+
 #if defined(CONFIG_PCIE_LAYERSCAPE) || defined(CONFIG_PCIE_LAYERSCAPE_GEN4)
 	ft_pci_setup(blob, bd);
 #endif
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index d0e10cb007..28bb1d7401 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -6,10 +6,12 @@
 
 #include <common.h>
 #include <clock_legacy.h>
+#include <cpu_func.h>
 #include <env.h>
 #include <fsl_immap.h>
 #include <fsl_ifc.h>
 #include <init.h>
+#include <linux/sizes.h>
 #include <asm/arch/fsl_serdes.h>
 #include <asm/arch/soc.h>
 #include <asm/io.h>
@@ -17,6 +19,7 @@
 #include <asm/arch-fsl-layerscape/config.h>
 #include <asm/arch-fsl-layerscape/ns_access.h>
 #include <asm/arch-fsl-layerscape/fsl_icid.h>
+#include <asm/gic-v3.h>
 #ifdef CONFIG_LAYERSCAPE_NS_ACCESS
 #include <fsl_csu.h>
 #endif
@@ -30,9 +33,50 @@
 #include <fsl_immap.h>
 #ifdef CONFIG_TFABOOT
 #include <env_internal.h>
+#endif
+#if defined(CONFIG_TFABOOT) || defined(CONFIG_GIC_V3_ITS)
 DECLARE_GLOBAL_DATA_PTR;
 #endif
 
+#ifdef CONFIG_GIC_V3_ITS
+#define PENDTABLE_MAX_SZ	ALIGN(BIT(ITS_MAX_LPI_NRBITS), SZ_64K)
+#define PROPTABLE_MAX_SZ	ALIGN(BIT(ITS_MAX_LPI_NRBITS) / 8, SZ_64K)
+#define GIC_LPI_SIZE		ALIGN(cpu_numcores() * PENDTABLE_MAX_SZ + \
+				PROPTABLE_MAX_SZ, SZ_1M)
+static int fdt_add_resv_mem_gic_rd_tables(void *blob, u64 base, size_t size)
+{
+	u32 phandle;
+	int err;
+	struct fdt_memory gic_rd_tables;
+
+	gic_rd_tables.start = base;
+	gic_rd_tables.end = base + size - 1;
+	err = fdtdec_add_reserved_memory(blob, "gic-rd-tables", &gic_rd_tables,
+					 &phandle);
+	if (err < 0)
+		debug("%s: failed to add reserved memory: %d\n", __func__, err);
+
+	return err;
+}
+
+int ls_gic_rd_tables_init(void *blob)
+{
+	u64 gic_lpi_base;
+	int ret;
+
+	gic_lpi_base = ALIGN(gd->arch.resv_ram - GIC_LPI_SIZE, SZ_64K);
+	ret = fdt_add_resv_mem_gic_rd_tables(blob, gic_lpi_base, GIC_LPI_SIZE);
+	if (ret)
+		return ret;
+
+	ret = gic_lpi_tables_init(gic_lpi_base, cpu_numcores());
+	if (ret)
+		debug("%s: failed to init gic-lpi-tables\n", __func__);
+
+	return ret;
+}
+#endif
+
 bool soc_has_dp_ddr(void)
 {
 	struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/soc.h b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
index c62d414aac..020548ac6c 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/soc.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
@@ -158,6 +158,10 @@ void erratum_a010315(void);
 
 bool soc_has_dp_ddr(void);
 bool soc_has_aiop(void);
+
+#ifdef CONFIG_GIC_V3_ITS
+int ls_gic_rd_tables_init(void *blob);
+#endif
 #endif
 
 #endif /* _ASM_ARMV8_FSL_LAYERSCAPE_SOC_H_ */
diff --git a/board/freescale/lx2160a/lx2160a.c b/board/freescale/lx2160a/lx2160a.c
index c8e962ce3d..cd6a9a34ac 100644
--- a/board/freescale/lx2160a/lx2160a.c
+++ b/board/freescale/lx2160a/lx2160a.c
@@ -5,7 +5,6 @@
 
 #include <common.h>
 #include <clock_legacy.h>
-#include <cpu_func.h>
 #include <dm.h>
 #include <dm/platform_data/serial_pl01x.h>
 #include <i2c.h>
@@ -17,7 +16,6 @@
 #include <asm/io.h>
 #include <fdt_support.h>
 #include <linux/libfdt.h>
-#include <linux/sizes.h>
 #include <fsl-mc/fsl_mc.h>
 #include <env_internal.h>
 #include <efi_loader.h>
@@ -31,13 +29,11 @@
 #include "../common/vid.h"
 #include <fsl_immap.h>
 #include <asm/arch-fsl-layerscape/fsl_icid.h>
-#include <asm/gic-v3.h>
 
 #ifdef CONFIG_EMC2305
 #include "../common/emc2305.h"
 #endif
 
-#define GIC_LPI_SIZE                             0x200000
 #ifdef CONFIG_TARGET_LX2160AQDS
 #define CFG_MUX_I2C_SDHC(reg, value)		((reg & 0x3f) | value)
 #define SET_CFG_MUX1_SDHC1_SDHC(reg)		(reg & 0x3f)
@@ -631,21 +627,6 @@ void board_quiesce_devices(void)
 }
 #endif
 
-#ifdef CONFIG_GIC_V3_ITS
-void fdt_fixup_gic_lpi_memory(void *blob, u64 gic_lpi_base)
-{
-	u32 phandle;
-	int err;
-	struct fdt_memory gic_lpi;
-
-	gic_lpi.start = gic_lpi_base;
-	gic_lpi.end = gic_lpi_base + GIC_LPI_SIZE - 1;
-	err = fdtdec_add_reserved_memory(blob, "gic-lpi", &gic_lpi, &phandle);
-	if (err < 0)
-		debug("failed to add reserved memory: %d\n", err);
-}
-#endif
-
 #ifdef CONFIG_OF_BOARD_SETUP
 int ft_board_setup(void *blob, bd_t *bd)
 {
@@ -657,8 +638,6 @@ int ft_board_setup(void *blob, bd_t *bd)
 	u64 mc_memory_base = 0;
 	u64 mc_memory_size = 0;
 	u16 total_memory_banks;
-	u64 gic_lpi_base;
-	int ret;
 
 	ft_cpu_setup(blob, bd);
 
@@ -678,13 +657,6 @@ int ft_board_setup(void *blob, bd_t *bd)
 		size[i] = gd->bd->bi_dram[i].size;
 	}
 
-#ifdef CONFIG_GIC_V3_ITS
-	gic_lpi_base = ALIGN(gd->arch.resv_ram - GIC_LPI_SIZE, SZ_64K);
-	ret = fdt_fixup_gic_lpi_memory(blob, gic_lpi_base);
-	if (!ret && gic_lpi_tables_init(gic_lpi_base, cpu_numcores()))
-		debug("%s: failed to init gic-lpi-tables\n", __func__);
-#endif
-
 #ifdef CONFIG_RESV_RAM
 	/* reduce size if reserved memory is within this bank */
 	if (gd->arch.resv_ram >= base[0] &&
-- 
2.17.1

[PATCHv2 7/9] configs: ls1088a: Enable GIC_V3_ITS config

[Zhiqiang Hou]

From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>

Enable GIC_V3_ITS config to initialize the GIC redistributor
tables.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
V2:
 - No change.

 configs/ls1088aqds_defconfig                         | 1 +
 configs/ls1088aqds_qspi_SECURE_BOOT_defconfig        | 1 +
 configs/ls1088aqds_qspi_defconfig                    | 1 +
 configs/ls1088aqds_sdcard_ifc_defconfig              | 1 +
 configs/ls1088aqds_sdcard_qspi_defconfig             | 1 +
 configs/ls1088aqds_tfa_defconfig                     | 1 +
 configs/ls1088ardb_qspi_SECURE_BOOT_defconfig        | 1 +
 configs/ls1088ardb_qspi_defconfig                    | 1 +
 configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig | 1 +
 configs/ls1088ardb_sdcard_qspi_defconfig             | 1 +
 configs/ls1088ardb_tfa_SECURE_BOOT_defconfig         | 1 +
 configs/ls1088ardb_tfa_defconfig                     | 1 +
 12 files changed, 12 insertions(+)

diff --git a/configs/ls1088aqds_defconfig b/configs/ls1088aqds_defconfig
index 7713e58bbe..b1b74f9af4 100644
--- a/configs/ls1088aqds_defconfig
+++ b/configs/ls1088aqds_defconfig
@@ -59,3 +59,4 @@ CONFIG_USB_XHCI_DWC3=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_GIC_V3_ITS=y
diff --git a/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig b/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig
index 242c40b8b5..943b914e01 100644
--- a/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig
+++ b/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig
@@ -60,3 +60,4 @@ CONFIG_USB_GADGET=y
 CONFIG_RSA=y
 CONFIG_RSA_SOFTWARE_EXP=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_GIC_V3_ITS=y
diff --git a/configs/ls1088aqds_qspi_defconfig b/configs/ls1088aqds_qspi_defconfig
index 3649b06a75..490782ebfc 100644
--- a/configs/ls1088aqds_qspi_defconfig
+++ b/configs/ls1088aqds_qspi_defconfig
@@ -61,3 +61,4 @@ CONFIG_USB_XHCI_DWC3=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_GADGET=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_GIC_V3_ITS=y
diff --git a/configs/ls1088aqds_sdcard_ifc_defconfig b/configs/ls1088aqds_sdcard_ifc_defconfig
index 815ea5ce4a..a4c6b27a3d 100644
--- a/configs/ls1088aqds_sdcard_ifc_defconfig
+++ b/configs/ls1088aqds_sdcard_ifc_defconfig
@@ -67,3 +67,4 @@ CONFIG_USB_XHCI_DWC3=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_GIC_V3_ITS=y
diff --git a/configs/ls1088aqds_sdcard_qspi_defconfig b/configs/ls1088aqds_sdcard_qspi_defconfig
index 275dbf9e0e..435f704eb3 100644
--- a/configs/ls1088aqds_sdcard_qspi_defconfig
+++ b/configs/ls1088aqds_sdcard_qspi_defconfig
@@ -70,3 +70,4 @@ CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_GADGET=y
+CONFIG_GIC_V3_ITS=y
diff --git a/configs/ls1088aqds_tfa_defconfig b/configs/ls1088aqds_tfa_defconfig
index 1144cba983..5c2a699849 100644
--- a/configs/ls1088aqds_tfa_defconfig
+++ b/configs/ls1088aqds_tfa_defconfig
@@ -78,3 +78,4 @@ CONFIG_USB_XHCI_DWC3=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_GADGET=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_GIC_V3_ITS=y
diff --git a/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig
index 3f654e2e1d..89e9a46c4f 100644
--- a/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig
+++ b/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig
@@ -61,3 +61,4 @@ CONFIG_USB_GADGET=y
 CONFIG_RSA=y
 CONFIG_RSA_SOFTWARE_EXP=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_GIC_V3_ITS=y
diff --git a/configs/ls1088ardb_qspi_defconfig b/configs/ls1088ardb_qspi_defconfig
index 935d76b4be..3c2fda4593 100644
--- a/configs/ls1088ardb_qspi_defconfig
+++ b/configs/ls1088ardb_qspi_defconfig
@@ -62,3 +62,4 @@ CONFIG_USB_XHCI_DWC3=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_GADGET=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_GIC_V3_ITS=y
diff --git a/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig b/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig
index 562cbdd3ab..da41ccaa29 100644
--- a/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig
+++ b/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig
@@ -70,3 +70,4 @@ CONFIG_USB_XHCI_DWC3=y
 CONFIG_USB_DWC3=y
 CONFIG_RSA=y
 CONFIG_SPL_RSA=y
+CONFIG_GIC_V3_ITS=y
diff --git a/configs/ls1088ardb_sdcard_qspi_defconfig b/configs/ls1088ardb_sdcard_qspi_defconfig
index 1e6fdceca1..0483e5d8d2 100644
--- a/configs/ls1088ardb_sdcard_qspi_defconfig
+++ b/configs/ls1088ardb_sdcard_qspi_defconfig
@@ -71,3 +71,4 @@ CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_GADGET=y
+CONFIG_GIC_V3_ITS=y
diff --git a/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig
index 0086039e52..079e6c53fb 100644
--- a/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig
@@ -71,3 +71,4 @@ CONFIG_RSA=y
 CONFIG_SPL_RSA=y
 CONFIG_RSA_SOFTWARE_EXP=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_GIC_V3_ITS=y
diff --git a/configs/ls1088ardb_tfa_defconfig b/configs/ls1088ardb_tfa_defconfig
index a7908e95b5..e3d4b02d21 100644
--- a/configs/ls1088ardb_tfa_defconfig
+++ b/configs/ls1088ardb_tfa_defconfig
@@ -77,3 +77,4 @@ CONFIG_USB_ETHER_ASIX=y
 CONFIG_USB_ETHER_ASIX88179=y
 CONFIG_USB_ETHER_RTL8152=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_GIC_V3_ITS=y
-- 
2.17.1

[PATCHv2 8/9] configs: ls1028a: Enable GIC_V3_ITS config

[Zhiqiang Hou]

From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>

Enable GIC_V3_ITS config to initialize the GIC redistributor
tables.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
V2:
 - No change.

 configs/ls1028aqds_tfa_SECURE_BOOT_defconfig | 1 +
 configs/ls1028aqds_tfa_defconfig             | 1 +
 configs/ls1028ardb_tfa_SECURE_BOOT_defconfig | 1 +
 configs/ls1028ardb_tfa_defconfig             | 1 +
 4 files changed, 4 insertions(+)

diff --git a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
index c5f0bd85da..92b944f426 100644
--- a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
@@ -79,3 +79,4 @@ CONFIG_WDT_SP805=y
 CONFIG_RSA=y
 CONFIG_OF_LIBFDT_OVERLAY=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_GIC_V3_ITS=y
diff --git a/configs/ls1028aqds_tfa_defconfig b/configs/ls1028aqds_tfa_defconfig
index 7085be77fe..66d3ee1761 100644
--- a/configs/ls1028aqds_tfa_defconfig
+++ b/configs/ls1028aqds_tfa_defconfig
@@ -84,3 +84,4 @@ CONFIG_WDT=y
 CONFIG_WDT_SP805=y
 CONFIG_OF_LIBFDT_OVERLAY=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_GIC_V3_ITS=y
diff --git a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
index 6fa14af6af..c999f3e6ef 100644
--- a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
@@ -76,3 +76,4 @@ CONFIG_WDT_SP805=y
 CONFIG_RSA=y
 CONFIG_OF_LIBFDT_OVERLAY=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_GIC_V3_ITS=y
diff --git a/configs/ls1028ardb_tfa_defconfig b/configs/ls1028ardb_tfa_defconfig
index 3ef5520969..150123bc7b 100644
--- a/configs/ls1028ardb_tfa_defconfig
+++ b/configs/ls1028ardb_tfa_defconfig
@@ -86,3 +86,4 @@ CONFIG_WDT=y
 CONFIG_WDT_SP805=y
 CONFIG_OF_LIBFDT_OVERLAY=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_GIC_V3_ITS=y
-- 
2.17.1

[PATCHv2 9/9] configs: ls208xa: Enable GIC_V3_ITS config

[Zhiqiang Hou]

From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>

Enable GIC_V3_ITS config to initialize the GIC redistributor
tables.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
V2:
 - No change.

 configs/ls2080aqds_SECURE_BOOT_defconfig      | 1 +
 configs/ls2080aqds_defconfig                  | 1 +
 configs/ls2080aqds_nand_defconfig             | 1 +
 configs/ls2080aqds_qspi_defconfig             | 1 +
 configs/ls2080aqds_sdcard_defconfig           | 1 +
 configs/ls2080ardb_SECURE_BOOT_defconfig      | 1 +
 configs/ls2080ardb_defconfig                  | 1 +
 configs/ls2080ardb_nand_defconfig             | 1 +
 configs/ls2081ardb_defconfig                  | 1 +
 configs/ls2088aqds_tfa_defconfig              | 1 +
 configs/ls2088ardb_qspi_SECURE_BOOT_defconfig | 1 +
 configs/ls2088ardb_qspi_defconfig             | 1 +
 configs/ls2088ardb_tfa_SECURE_BOOT_defconfig  | 1 +
 configs/ls2088ardb_tfa_defconfig              | 1 +
 14 files changed, 14 insertions(+)

diff --git a/configs/ls2080aqds_SECURE_BOOT_defconfig b/configs/ls2080aqds_SECURE_BOOT_defconfig
index 8a792e449a..9039b252c1 100644
--- a/configs/ls2080aqds_SECURE_BOOT_defconfig
+++ b/configs/ls2080aqds_SECURE_BOOT_defconfig
@@ -62,3 +62,4 @@ CONFIG_USB_XHCI_DWC3=y
 CONFIG_RSA=y
 CONFIG_RSA_SOFTWARE_EXP=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_GIC_V3_ITS=y
diff --git a/configs/ls2080aqds_defconfig b/configs/ls2080aqds_defconfig
index bc4c218c21..b14b3ca5e7 100644
--- a/configs/ls2080aqds_defconfig
+++ b/configs/ls2080aqds_defconfig
@@ -63,3 +63,4 @@ CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_GIC_V3_ITS=y
diff --git a/configs/ls2080aqds_nand_defconfig b/configs/ls2080aqds_nand_defconfig
index e840cbf0ef..fac2b04068 100644
--- a/configs/ls2080aqds_nand_defconfig
+++ b/configs/ls2080aqds_nand_defconfig
@@ -70,3 +70,4 @@ CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_GIC_V3_ITS=y
diff --git a/configs/ls2080aqds_qspi_defconfig b/configs/ls2080aqds_qspi_defconfig
index 861e652f7f..343c7675e0 100644
--- a/configs/ls2080aqds_qspi_defconfig
+++ b/configs/ls2080aqds_qspi_defconfig
@@ -62,3 +62,4 @@ CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_GIC_V3_ITS=y
diff --git a/configs/ls2080aqds_sdcard_defconfig b/configs/ls2080aqds_sdcard_defconfig
index 864e70d334..dd2862ffe0 100644
--- a/configs/ls2080aqds_sdcard_defconfig
+++ b/configs/ls2080aqds_sdcard_defconfig
@@ -69,3 +69,4 @@ CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_GIC_V3_ITS=y
diff --git a/configs/ls2080ardb_SECURE_BOOT_defconfig b/configs/ls2080ardb_SECURE_BOOT_defconfig
index 4abfc64705..743e25f7b7 100644
--- a/configs/ls2080ardb_SECURE_BOOT_defconfig
+++ b/configs/ls2080ardb_SECURE_BOOT_defconfig
@@ -64,3 +64,4 @@ CONFIG_USB_XHCI_DWC3=y
 CONFIG_RSA=y
 CONFIG_RSA_SOFTWARE_EXP=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_GIC_V3_ITS=y
diff --git a/configs/ls2080ardb_defconfig b/configs/ls2080ardb_defconfig
index 0102e14ecb..e9dfc3603e 100644
--- a/configs/ls2080ardb_defconfig
+++ b/configs/ls2080ardb_defconfig
@@ -65,3 +65,4 @@ CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_GIC_V3_ITS=y
diff --git a/configs/ls2080ardb_nand_defconfig b/configs/ls2080ardb_nand_defconfig
index 448e0fe58d..68ec26e405 100644
--- a/configs/ls2080ardb_nand_defconfig
+++ b/configs/ls2080ardb_nand_defconfig
@@ -70,3 +70,4 @@ CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_GIC_V3_ITS=y
diff --git a/configs/ls2081ardb_defconfig b/configs/ls2081ardb_defconfig
index e446a1120b..4036ed94e5 100644
--- a/configs/ls2081ardb_defconfig
+++ b/configs/ls2081ardb_defconfig
@@ -62,3 +62,4 @@ CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_GIC_V3_ITS=y
diff --git a/configs/ls2088aqds_tfa_defconfig b/configs/ls2088aqds_tfa_defconfig
index 9f49736b4f..d3ee37cabe 100644
--- a/configs/ls2088aqds_tfa_defconfig
+++ b/configs/ls2088aqds_tfa_defconfig
@@ -74,3 +74,4 @@ CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_GIC_V3_ITS=y
diff --git a/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig b/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig
index ae4a6820ff..9b06bf4257 100644
--- a/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig
+++ b/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig
@@ -59,3 +59,4 @@ CONFIG_USB_XHCI_DWC3=y
 CONFIG_RSA=y
 CONFIG_RSA_SOFTWARE_EXP=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_GIC_V3_ITS=y
diff --git a/configs/ls2088ardb_qspi_defconfig b/configs/ls2088ardb_qspi_defconfig
index 1ad5f3b367..3203384c5b 100644
--- a/configs/ls2088ardb_qspi_defconfig
+++ b/configs/ls2088ardb_qspi_defconfig
@@ -63,3 +63,4 @@ CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_GIC_V3_ITS=y
diff --git a/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig b/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig
index c0d0a99c8a..41a2770bb9 100644
--- a/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig
@@ -76,3 +76,4 @@ CONFIG_RSA=y
 CONFIG_SPL_RSA=y
 CONFIG_RSA_SOFTWARE_EXP=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_GIC_V3_ITS=y
diff --git a/configs/ls2088ardb_tfa_defconfig b/configs/ls2088ardb_tfa_defconfig
index ccbaaf7a5c..b27b2c59cb 100644
--- a/configs/ls2088ardb_tfa_defconfig
+++ b/configs/ls2088ardb_tfa_defconfig
@@ -81,3 +81,4 @@ CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_GIC_V3_ITS=y
-- 
2.17.1

[PATCHv2 2/9] arm64: fsl-layerscape: Assign addr to resv_ram if enabled RESV_RAM config

[Priyanka Jain]

>-----Original Message-----
>From: U-Boot <u-boot-bounces@lists.denx.de> On Behalf Of Zhiqiang Hou
>Sent: Tuesday, March 24, 2020 1:42 PM
>To: u-boot at lists.denx.de; Priyanka Jain <priyanka.jain@nxp.com>; Biwen Li
><biwen.li@nxp.com>
>Cc: Z.q. Hou <zhiqiang.hou@nxp.com>
>Subject: [PATCHv2 2/9] arm64: fsl-layerscape: Assign addr to resv_ram if
>enabled RESV_RAM config
>
>From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
>
>The initialization of gd->arch.resv_ram pointer should depend on if the
>RESV_RAM config is enabled.
>
>Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
>---
>V2:
> - No change.
>
> arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
>diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
>b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
>index b443894453..1b7729c046 100644
>--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
>+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
>@@ -1379,7 +1379,7 @@ static int tfa_dram_init_banksize(void)
> 	if (i > 0)
> 		ret = 0;
>
>-#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
>+#if defined(CONFIG_RESV_RAM) && !defined(CONFIG_SPL_BUILD)
> 	/* Assign memory for MC */
> #ifdef CONFIG_SYS_DDR_BLOCK3_BASE
> 	if (gd->bd->bi_dram[2].size >=
>@@ -1402,7 +1402,7 @@ static int tfa_dram_init_banksize(void)
> 				board_reserve_ram_top(gd->bd-
>>bi_dram[0].size);
> 		}
> 	}
>-#endif	/* CONFIG_FSL_MC_ENET */
>+#endif	/* CONFIG_RESV_RAM */
This memory block was intended to be used for MC. That's why earlier check was for "CONFIG_FSL_MC_ENET"
Are we planning to use this block for some other purpose as well?
Also I see "CONFIG_ RESV_RAM" getting defines later in the series.
Will MC will work if the series in applied partially?

Regards
Priyanka
> 	return ret;
> }
>@@ -1465,7 +1465,7 @@ int dram_init_banksize(void)
> 	}
> #endif	/* CONFIG_SYS_MEM_RESERVE_SECURE */
>
>-#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
>+#if defined(CONFIG_RESV_RAM) && !defined(CONFIG_SPL_BUILD)
> 	/* Assign memory for MC */
> #ifdef CONFIG_SYS_DDR_BLOCK3_BASE
> 	if (gd->bd->bi_dram[2].size >=
>@@ -1488,7 +1488,7 @@ int dram_init_banksize(void)
> 				board_reserve_ram_top(gd->bd-
>>bi_dram[0].size);
> 		}
> 	}
>-#endif	/* CONFIG_FSL_MC_ENET */
>+#endif	/* CONFIG_RESV_RAM */
>
> #ifdef CONFIG_SYS_DP_DDR_BASE_PHY
> #ifdef CONFIG_SYS_DDR_BLOCK3_BASE
>--
>2.17.1

[PATCHv2 2/9] arm64: fsl-layerscape: Assign addr to resv_ram if enabled RESV_RAM config

[Z.q. Hou]

Hi Priyanka,

Thanks a lot for your comments!

> -----Original Message-----
> From: Priyanka Jain (OSS) <priyanka.jain@oss.nxp.com>
> Sent: 2020?4?15? 18:28
> To: Z.q. Hou <zhiqiang.hou@nxp.com>; u-boot at lists.denx.de; Biwen Li
> <biwen.li@nxp.com>
> Cc: Z.q. Hou <zhiqiang.hou@nxp.com>
> Subject: RE: [PATCHv2 2/9] arm64: fsl-layerscape: Assign addr to resv_ram if
> enabled RESV_RAM config
> 
> >-----Original Message-----
> >From: U-Boot <u-boot-bounces@lists.denx.de> On Behalf Of Zhiqiang Hou
> >Sent: Tuesday, March 24, 2020 1:42 PM
> >To: u-boot at lists.denx.de; Priyanka Jain <priyanka.jain@nxp.com>; Biwen
> >Li <biwen.li@nxp.com>
> >Cc: Z.q. Hou <zhiqiang.hou@nxp.com>
> >Subject: [PATCHv2 2/9] arm64: fsl-layerscape: Assign addr to resv_ram
> >if enabled RESV_RAM config
> >
> >From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> >
> >The initialization of gd->arch.resv_ram pointer should depend on if the
> >RESV_RAM config is enabled.
> >
> >Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> >---
> >V2:
> > - No change.
> >
> > arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 8 ++++----
> > 1 file changed, 4 insertions(+), 4 deletions(-)
> >
> >diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
> >b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
> >index b443894453..1b7729c046 100644
> >--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
> >+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
> >@@ -1379,7 +1379,7 @@ static int tfa_dram_init_banksize(void)
> > 	if (i > 0)
> > 		ret = 0;
> >
> >-#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
> >+#if defined(CONFIG_RESV_RAM) && !defined(CONFIG_SPL_BUILD)
> > 	/* Assign memory for MC */
> > #ifdef CONFIG_SYS_DDR_BLOCK3_BASE
> > 	if (gd->bd->bi_dram[2].size >=
> >@@ -1402,7 +1402,7 @@ static int tfa_dram_init_banksize(void)
> > 				board_reserve_ram_top(gd->bd-
> >>bi_dram[0].size);
> > 		}
> > 	}
> >-#endif	/* CONFIG_FSL_MC_ENET */
> >+#endif	/* CONFIG_RESV_RAM */
> This memory block was intended to be used for MC. That?s why earlier
> check was for "CONFIG_FSL_MC_ENET"
> Are we planning to use this block for some other purpose as well?
> Also I see "CONFIG_ RESV_RAM" getting defines later in the series.
> Will MC will work if the series in applied partially?

Yes, as you know this will be used for workaround of GICv3 redistributor tables
one-way reset issue.
The MC will not be affected, since FSL_MC_ENET selected RESV_RAM config.

Thanks,
Zhiqiang

> 
> Regards
> Priyanka
> > 	return ret;
> > }
> >@@ -1465,7 +1465,7 @@ int dram_init_banksize(void)
> > 	}
> > #endif	/* CONFIG_SYS_MEM_RESERVE_SECURE */
> >
> >-#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
> >+#if defined(CONFIG_RESV_RAM) && !defined(CONFIG_SPL_BUILD)
> > 	/* Assign memory for MC */
> > #ifdef CONFIG_SYS_DDR_BLOCK3_BASE
> > 	if (gd->bd->bi_dram[2].size >=
> >@@ -1488,7 +1488,7 @@ int dram_init_banksize(void)
> > 				board_reserve_ram_top(gd->bd-
> >>bi_dram[0].size);
> > 		}
> > 	}
> >-#endif	/* CONFIG_FSL_MC_ENET */
> >+#endif	/* CONFIG_RESV_RAM */
> >
> > #ifdef CONFIG_SYS_DP_DDR_BASE_PHY
> > #ifdef CONFIG_SYS_DDR_BLOCK3_BASE
> >--
> >2.17.1

[PATCHv2 1/9] board: lx2160a: Add header file cpu_func.h

[Wasim Khan]

> -----Original Message-----
> From: U-Boot <u-boot-bounces@lists.denx.de> On Behalf Of Zhiqiang Hou
> Sent: Tuesday, March 24, 2020 1:42 PM
> To: u-boot at lists.denx.de; Priyanka Jain <priyanka.jain@nxp.com>; Biwen Li
> <biwen.li@nxp.com>
> Cc: Z.q. Hou <zhiqiang.hou@nxp.com>
> Subject: [PATCHv2 1/9] board: lx2160a: Add header file cpu_func.h
> 
> From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> 
> The declaration of the function cpu_numcores() has been moved to cpu_func.h,
> so add including of the header file to avoid build error.
> 
> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> ---
> V2:
>  - No change.
> 
>  board/freescale/lx2160a/lx2160a.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/board/freescale/lx2160a/lx2160a.c
> b/board/freescale/lx2160a/lx2160a.c
> index 134ae22f85..595c774b42 100644
> --- a/board/freescale/lx2160a/lx2160a.c
> +++ b/board/freescale/lx2160a/lx2160a.c
> @@ -5,6 +5,7 @@
> 
>  #include <common.h>
>  #include <clock_legacy.h>
> +#include <cpu_func.h>

cpu_func.h is already included in board/freescale/lx2160a/lx2160a.c. 
You can remove this patch.

>  #include <dm.h>
>  #include <dm/platform_data/serial_pl01x.h>  #include <i2c.h>
> --
> 2.17.1

[PATCHv2 2/9] arm64: fsl-layerscape: Assign addr to resv_ram if enabled RESV_RAM config

[Wasim Khan]

> -----Original Message-----
> From: U-Boot <u-boot-bounces@lists.denx.de> On Behalf Of Zhiqiang Hou
> Sent: Tuesday, March 24, 2020 1:42 PM
> To: u-boot at lists.denx.de; Priyanka Jain <priyanka.jain@nxp.com>; Biwen Li
> <biwen.li@nxp.com>
> Cc: Z.q. Hou <zhiqiang.hou@nxp.com>
> Subject: [PATCHv2 2/9] arm64: fsl-layerscape: Assign addr to resv_ram if
> enabled RESV_RAM config
> 
> From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> 
> The initialization of gd->arch.resv_ram pointer should depend on if the
> RESV_RAM config is enabled.
> 
> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> ---
> V2:
>  - No change.
> 
>  arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
> b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
> index b443894453..1b7729c046 100644
> --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
> +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
> @@ -1379,7 +1379,7 @@ static int tfa_dram_init_banksize(void)
>  	if (i > 0)
>  		ret = 0;
> 
> -#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
> +#if defined(CONFIG_RESV_RAM) && !defined(CONFIG_SPL_BUILD)
>  	/* Assign memory for MC */
>  #ifdef CONFIG_SYS_DDR_BLOCK3_BASE
>  	if (gd->bd->bi_dram[2].size >=
> @@ -1402,7 +1402,7 @@ static int tfa_dram_init_banksize(void)
>  				board_reserve_ram_top(gd->bd-
> >bi_dram[0].size);
>  		}
>  	}
> -#endif	/* CONFIG_FSL_MC_ENET */
> +#endif	/* CONFIG_RESV_RAM */
> 
>  	return ret;
>  }
> @@ -1465,7 +1465,7 @@ int dram_init_banksize(void)
>  	}
>  #endif	/* CONFIG_SYS_MEM_RESERVE_SECURE */
> 
> -#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
> +#if defined(CONFIG_RESV_RAM) && !defined(CONFIG_SPL_BUILD)
>  	/* Assign memory for MC */
>  #ifdef CONFIG_SYS_DDR_BLOCK3_BASE
>  	if (gd->bd->bi_dram[2].size >=
> @@ -1488,7 +1488,7 @@ int dram_init_banksize(void)
>  				board_reserve_ram_top(gd->bd-
> >bi_dram[0].size);
>  		}
>  	}
> -#endif	/* CONFIG_FSL_MC_ENET */
> +#endif	/* CONFIG_RESV_RAM */
> 

CONFIG_FSL_MC_ENET will select the CONFIG_RESV_RAM. What benefit we have with this change ? 
because we are reserving memory for MC in the following code, so earlier check (with CONFIG_FSL_MC_ENET) looks good to be. 

>  #ifdef CONFIG_SYS_DP_DDR_BASE_PHY
>  #ifdef CONFIG_SYS_DDR_BLOCK3_BASE
> --
> 2.17.1

[PATCHv2 3/9] board: lx2160a: Don't program the GIC RD tables if failed to reserve memory

[Wasim Khan]

> -----Original Message-----
> From: U-Boot <u-boot-bounces@lists.denx.de> On Behalf Of Zhiqiang Hou
> Sent: Tuesday, March 24, 2020 1:42 PM
> To: u-boot at lists.denx.de; Priyanka Jain <priyanka.jain@nxp.com>; Biwen Li
> <biwen.li@nxp.com>
> Cc: Z.q. Hou <zhiqiang.hou@nxp.com>
> Subject: [PATCHv2 3/9] board: lx2160a: Don't program the GIC RD tables if failed
> to reserve memory
> 
> From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> 
> Program the GIC redistributor tables only when succeeded to reserve memory
> for them, otherwise kernel will lose the chance to program them using allocated
> memory.
> 
> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> ---
> V2:
>  - The #4 of v1 patchset.
> 
>  board/freescale/lx2160a/lx2160a.c | 6 ++++--
>  1 file changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/board/freescale/lx2160a/lx2160a.c
> b/board/freescale/lx2160a/lx2160a.c
> index 595c774b42..7f22110dc6 100644
> --- a/board/freescale/lx2160a/lx2160a.c
> +++ b/board/freescale/lx2160a/lx2160a.c
> @@ -657,6 +657,7 @@ int ft_board_setup(void *blob, bd_t *bd)
>  	u64 mc_memory_size = 0;
>  	u16 total_memory_banks;
>  	u64 gic_lpi_base;
> +	int ret;
> 
>  	ft_cpu_setup(blob, bd);
> 
> @@ -678,8 +679,9 @@ int ft_board_setup(void *blob, bd_t *bd)
> 
>  #ifdef CONFIG_GIC_V3_ITS
>  	gic_lpi_base = gd->arch.resv_ram - GIC_LPI_SIZE;
> -	gic_lpi_tables_init(gic_lpi_base, cpu_numcores());
> -	fdt_fixup_gic_lpi_memory(blob, gic_lpi_base);
> +	ret = fdt_fixup_gic_lpi_memory(blob, gic_lpi_base);
> +	if (!ret && gic_lpi_tables_init(gic_lpi_base, cpu_numcores()))
> +		debug("%s: failed to init gic-lpi-tables\n", __func__);

Currently till this point, fdt_fixup_gic_lpi_memory return type is void , you may first you need to change fdt_fixup_gic_lpi_memory() to return something and then you can check for the errors. 
OR, no need for this patch, as in your later patches you are already doing error checking . 

>  #endif
> 
>  #ifdef CONFIG_RESV_RAM
> --
> 2.17.1

[PATCHv2 5/9] fsl-layerscape: Kconfig: Select RESV_RAM config if GIC_V3_ITS is enabled

[Wasim Khan]

> -----Original Message-----
> From: U-Boot <u-boot-bounces@lists.denx.de> On Behalf Of Zhiqiang Hou
> Sent: Tuesday, March 24, 2020 1:42 PM
> To: u-boot at lists.denx.de; Priyanka Jain <priyanka.jain@nxp.com>; Biwen Li
> <biwen.li@nxp.com>
> Cc: Z.q. Hou <zhiqiang.hou@nxp.com>
> Subject: [PATCHv2 5/9] fsl-layerscape: Kconfig: Select RESV_RAM config if
> GIC_V3_ITS is enabled
> 
> From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> 
> The GIC redistributor tables initialization depends on RESV_RAM config, so
> select RESV_RAM if GIC_V3_ITS is enabled.
> 
> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Wasim Khan <wasim.khan@nxp.com>

<snip>

[PATCHv2 4/9] board: lx2160a: Make sure the RD tables address align to 64KB

[Wasim Khan]

> -----Original Message-----
> From: U-Boot <u-boot-bounces@lists.denx.de> On Behalf Of Zhiqiang Hou
> Sent: Tuesday, March 24, 2020 1:42 PM
> To: u-boot at lists.denx.de; Priyanka Jain <priyanka.jain@nxp.com>; Biwen Li
> <biwen.li@nxp.com>
> Cc: Z.q. Hou <zhiqiang.hou@nxp.com>
> Subject: [PATCHv2 4/9] board: lx2160a: Make sure the RD tables address align to
> 64KB
> 
> From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> 
> As the lower 16bit of the redistributor pending table is reserved for describing
> the memory attributes, we must give a 64KB aligned address to the GIC LPI
> initialization function.
> 
> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>


Reviewed-by: Wasim Khan <wasim.khan@nxp.com>

> ---
> V2:
>  - The #5 of v1 patchset.
> 
>  board/freescale/lx2160a/lx2160a.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/board/freescale/lx2160a/lx2160a.c
> b/board/freescale/lx2160a/lx2160a.c
> index 7f22110dc6..c8e962ce3d 100644
> --- a/board/freescale/lx2160a/lx2160a.c
> +++ b/board/freescale/lx2160a/lx2160a.c
> @@ -17,6 +17,7 @@
>  #include <asm/io.h>
>  #include <fdt_support.h>
>  #include <linux/libfdt.h>
> +#include <linux/sizes.h>
>  #include <fsl-mc/fsl_mc.h>
>  #include <env_internal.h>
>  #include <efi_loader.h>
> @@ -678,7 +679,7 @@ int ft_board_setup(void *blob, bd_t *bd)
>  	}
> 
>  #ifdef CONFIG_GIC_V3_ITS
> -	gic_lpi_base = gd->arch.resv_ram - GIC_LPI_SIZE;
> +	gic_lpi_base = ALIGN(gd->arch.resv_ram - GIC_LPI_SIZE, SZ_64K);
>  	ret = fdt_fixup_gic_lpi_memory(blob, gic_lpi_base);
>  	if (!ret && gic_lpi_tables_init(gic_lpi_base, cpu_numcores()))
>  		debug("%s: failed to init gic-lpi-tables\n", __func__);
> --
> 2.17.1

[PATCHv2 6/9] arm64: layerscape: Move GIC RD tables initialization to CPU setup function

[Wasim Khan]

> -----Original Message-----
> From: U-Boot <u-boot-bounces@lists.denx.de> On Behalf Of Zhiqiang Hou
> Sent: Tuesday, March 24, 2020 1:42 PM
> To: u-boot at lists.denx.de; Priyanka Jain <priyanka.jain@nxp.com>; Biwen Li
> <biwen.li@nxp.com>
> Cc: Z.q. Hou <zhiqiang.hou@nxp.com>
> Subject: [PATCHv2 6/9] arm64: layerscape: Move GIC RD tables initialization to
> CPU setup function
> 
> From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> 
> Move GIC redistributor tables initialization to CPU setup function.
> 
> This patch introduces a GIC redistributor tables init function, and moves the
> function of reserving memory for GIC redistributor tables to soc.c and adds a
> argument for the memory size to reserve, BTW rename the function so that it is
> more readable.
> 
> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>

Reviewed-by: Wasim Khan <wasim.khan@nxp.com>

> ---
> V2:
>  - New patch.
> 
>  arch/arm/cpu/armv8/fsl-layerscape/fdt.c       |  4 ++
>  arch/arm/cpu/armv8/fsl-layerscape/soc.c       | 44 +++++++++++++++++++
>  .../arm/include/asm/arch-fsl-layerscape/soc.h |  4 ++
>  board/freescale/lx2160a/lx2160a.c             | 28 ------------
>  4 files changed, 52 insertions(+), 28 deletions(-)
> 
> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c b/arch/arm/cpu/armv8/fsl-
> layerscape/fdt.c
> index 87c3e05f45..36e0a2380e 100644
> --- a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
> +++ b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
> @@ -462,6 +462,10 @@ void ft_cpu_setup(void *blob, bd_t *bd)
>  	do_fixup_by_path_u32(blob, "/sysclk", "clock-frequency",
>  			     CONFIG_SYS_CLK_FREQ, 1);
> 
> +#ifdef CONFIG_GIC_V3_ITS
> +	ls_gic_rd_tables_init(blob);
> +#endif
> +
>  #if defined(CONFIG_PCIE_LAYERSCAPE) ||
> defined(CONFIG_PCIE_LAYERSCAPE_GEN4)
>  	ft_pci_setup(blob, bd);
>  #endif
> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> index d0e10cb007..28bb1d7401 100644
> --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> @@ -6,10 +6,12 @@
> 
>  #include <common.h>
>  #include <clock_legacy.h>
> +#include <cpu_func.h>
>  #include <env.h>
>  #include <fsl_immap.h>
>  #include <fsl_ifc.h>
>  #include <init.h>
> +#include <linux/sizes.h>
>  #include <asm/arch/fsl_serdes.h>
>  #include <asm/arch/soc.h>
>  #include <asm/io.h>
> @@ -17,6 +19,7 @@
>  #include <asm/arch-fsl-layerscape/config.h>
>  #include <asm/arch-fsl-layerscape/ns_access.h>
>  #include <asm/arch-fsl-layerscape/fsl_icid.h>
> +#include <asm/gic-v3.h>
>  #ifdef CONFIG_LAYERSCAPE_NS_ACCESS
>  #include <fsl_csu.h>
>  #endif
> @@ -30,9 +33,50 @@
>  #include <fsl_immap.h>
>  #ifdef CONFIG_TFABOOT
>  #include <env_internal.h>
> +#endif
> +#if defined(CONFIG_TFABOOT) || defined(CONFIG_GIC_V3_ITS)
>  DECLARE_GLOBAL_DATA_PTR;
>  #endif
> 
> +#ifdef CONFIG_GIC_V3_ITS
> +#define PENDTABLE_MAX_SZ	ALIGN(BIT(ITS_MAX_LPI_NRBITS), SZ_64K)
> +#define PROPTABLE_MAX_SZ	ALIGN(BIT(ITS_MAX_LPI_NRBITS) / 8, SZ_64K)
> +#define GIC_LPI_SIZE		ALIGN(cpu_numcores() * PENDTABLE_MAX_SZ
> + \
> +				PROPTABLE_MAX_SZ, SZ_1M)
> +static int fdt_add_resv_mem_gic_rd_tables(void *blob, u64 base, size_t
> +size) {
> +	u32 phandle;
> +	int err;
> +	struct fdt_memory gic_rd_tables;
> +
> +	gic_rd_tables.start = base;
> +	gic_rd_tables.end = base + size - 1;
> +	err = fdtdec_add_reserved_memory(blob, "gic-rd-tables",
> &gic_rd_tables,
> +					 &phandle);
> +	if (err < 0)
> +		debug("%s: failed to add reserved memory: %d\n", __func__,
> err);
> +
> +	return err;
> +}
> +
> +int ls_gic_rd_tables_init(void *blob)
> +{
> +	u64 gic_lpi_base;
> +	int ret;
> +
> +	gic_lpi_base = ALIGN(gd->arch.resv_ram - GIC_LPI_SIZE, SZ_64K);
> +	ret = fdt_add_resv_mem_gic_rd_tables(blob, gic_lpi_base,
> GIC_LPI_SIZE);
> +	if (ret)
> +		return ret;
> +
> +	ret = gic_lpi_tables_init(gic_lpi_base, cpu_numcores());
> +	if (ret)
> +		debug("%s: failed to init gic-lpi-tables\n", __func__);
> +
> +	return ret;
> +}
> +#endif
> +
>  bool soc_has_dp_ddr(void)
>  {
>  	struct ccsr_gur __iomem *gur = (void
> *)(CONFIG_SYS_FSL_GUTS_ADDR); diff --git a/arch/arm/include/asm/arch-fsl-
> layerscape/soc.h b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
> index c62d414aac..020548ac6c 100644
> --- a/arch/arm/include/asm/arch-fsl-layerscape/soc.h
> +++ b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
> @@ -158,6 +158,10 @@ void erratum_a010315(void);
> 
>  bool soc_has_dp_ddr(void);
>  bool soc_has_aiop(void);
> +
> +#ifdef CONFIG_GIC_V3_ITS
> +int ls_gic_rd_tables_init(void *blob);
> +#endif
>  #endif
> 
>  #endif /* _ASM_ARMV8_FSL_LAYERSCAPE_SOC_H_ */ diff --git
> a/board/freescale/lx2160a/lx2160a.c b/board/freescale/lx2160a/lx2160a.c
> index c8e962ce3d..cd6a9a34ac 100644
> --- a/board/freescale/lx2160a/lx2160a.c
> +++ b/board/freescale/lx2160a/lx2160a.c
> @@ -5,7 +5,6 @@
> 
>  #include <common.h>
>  #include <clock_legacy.h>
> -#include <cpu_func.h>
>  #include <dm.h>
>  #include <dm/platform_data/serial_pl01x.h>  #include <i2c.h> @@ -17,7 +16,6
> @@  #include <asm/io.h>  #include <fdt_support.h>  #include <linux/libfdt.h> -
> #include <linux/sizes.h>  #include <fsl-mc/fsl_mc.h>  #include <env_internal.h>
> #include <efi_loader.h> @@ -31,13 +29,11 @@  #include "../common/vid.h"
>  #include <fsl_immap.h>
>  #include <asm/arch-fsl-layerscape/fsl_icid.h>
> -#include <asm/gic-v3.h>
> 
>  #ifdef CONFIG_EMC2305
>  #include "../common/emc2305.h"
>  #endif
> 
> -#define GIC_LPI_SIZE                             0x200000
>  #ifdef CONFIG_TARGET_LX2160AQDS
>  #define CFG_MUX_I2C_SDHC(reg, value)		((reg & 0x3f) | value)
>  #define SET_CFG_MUX1_SDHC1_SDHC(reg)		(reg & 0x3f)
> @@ -631,21 +627,6 @@ void board_quiesce_devices(void)  }  #endif
> 
> -#ifdef CONFIG_GIC_V3_ITS
> -void fdt_fixup_gic_lpi_memory(void *blob, u64 gic_lpi_base) -{
> -	u32 phandle;
> -	int err;
> -	struct fdt_memory gic_lpi;
> -
> -	gic_lpi.start = gic_lpi_base;
> -	gic_lpi.end = gic_lpi_base + GIC_LPI_SIZE - 1;
> -	err = fdtdec_add_reserved_memory(blob, "gic-lpi", &gic_lpi, &phandle);
> -	if (err < 0)
> -		debug("failed to add reserved memory: %d\n", err);
> -}
> -#endif
> -
>  #ifdef CONFIG_OF_BOARD_SETUP
>  int ft_board_setup(void *blob, bd_t *bd)  { @@ -657,8 +638,6 @@ int
> ft_board_setup(void *blob, bd_t *bd)
>  	u64 mc_memory_base = 0;
>  	u64 mc_memory_size = 0;
>  	u16 total_memory_banks;
> -	u64 gic_lpi_base;
> -	int ret;
> 
>  	ft_cpu_setup(blob, bd);
> 
> @@ -678,13 +657,6 @@ int ft_board_setup(void *blob, bd_t *bd)
>  		size[i] = gd->bd->bi_dram[i].size;
>  	}
> 
> -#ifdef CONFIG_GIC_V3_ITS
> -	gic_lpi_base = ALIGN(gd->arch.resv_ram - GIC_LPI_SIZE, SZ_64K);
> -	ret = fdt_fixup_gic_lpi_memory(blob, gic_lpi_base);
> -	if (!ret && gic_lpi_tables_init(gic_lpi_base, cpu_numcores()))
> -		debug("%s: failed to init gic-lpi-tables\n", __func__);
> -#endif
> -
>  #ifdef CONFIG_RESV_RAM
>  	/* reduce size if reserved memory is within this bank */
>  	if (gd->arch.resv_ram >= base[0] &&
> --
> 2.17.1

[PATCHv2 7/9] configs: ls1088a: Enable GIC_V3_ITS config

[Wasim Khan]

> -----Original Message-----
> From: U-Boot <u-boot-bounces@lists.denx.de> On Behalf Of Zhiqiang Hou
> Sent: Tuesday, March 24, 2020 1:42 PM
> To: u-boot at lists.denx.de; Priyanka Jain <priyanka.jain@nxp.com>; Biwen Li
> <biwen.li@nxp.com>
> Cc: Z.q. Hou <zhiqiang.hou@nxp.com>
> Subject: [PATCHv2 7/9] configs: ls1088a: Enable GIC_V3_ITS config
> 
> From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> 
> Enable GIC_V3_ITS config to initialize the GIC redistributor tables.
> 
> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>

Reviewed-by: Wasim Khan <wasim.khan@nxp.com>

> ---
> V2:
>  - No change.
> 
>  configs/ls1088aqds_defconfig                         | 1 +
>  configs/ls1088aqds_qspi_SECURE_BOOT_defconfig        | 1 +
>  configs/ls1088aqds_qspi_defconfig                    | 1 +
>  configs/ls1088aqds_sdcard_ifc_defconfig              | 1 +
>  configs/ls1088aqds_sdcard_qspi_defconfig             | 1 +
>  configs/ls1088aqds_tfa_defconfig                     | 1 +
>  configs/ls1088ardb_qspi_SECURE_BOOT_defconfig        | 1 +
>  configs/ls1088ardb_qspi_defconfig                    | 1 +
>  configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig | 1 +
>  configs/ls1088ardb_sdcard_qspi_defconfig             | 1 +
>  configs/ls1088ardb_tfa_SECURE_BOOT_defconfig         | 1 +
>  configs/ls1088ardb_tfa_defconfig                     | 1 +
>  12 files changed, 12 insertions(+)
> 
> diff --git a/configs/ls1088aqds_defconfig b/configs/ls1088aqds_defconfig index
> 7713e58bbe..b1b74f9af4 100644
> --- a/configs/ls1088aqds_defconfig
> +++ b/configs/ls1088aqds_defconfig
> @@ -59,3 +59,4 @@ CONFIG_USB_XHCI_DWC3=y  CONFIG_USB_DWC3=y
> CONFIG_USB_STORAGE=y  CONFIG_USB_GADGET=y
> +CONFIG_GIC_V3_ITS=y
> diff --git a/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig
> b/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig
> index 242c40b8b5..943b914e01 100644
> --- a/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig
> +++ b/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig
> @@ -60,3 +60,4 @@ CONFIG_USB_GADGET=y
>  CONFIG_RSA=y
>  CONFIG_RSA_SOFTWARE_EXP=y
>  CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
> +CONFIG_GIC_V3_ITS=y
> diff --git a/configs/ls1088aqds_qspi_defconfig
> b/configs/ls1088aqds_qspi_defconfig
> index 3649b06a75..490782ebfc 100644
> --- a/configs/ls1088aqds_qspi_defconfig
> +++ b/configs/ls1088aqds_qspi_defconfig
> @@ -61,3 +61,4 @@ CONFIG_USB_XHCI_DWC3=y  CONFIG_USB_DWC3=y
> CONFIG_USB_GADGET=y  CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
> +CONFIG_GIC_V3_ITS=y
> diff --git a/configs/ls1088aqds_sdcard_ifc_defconfig
> b/configs/ls1088aqds_sdcard_ifc_defconfig
> index 815ea5ce4a..a4c6b27a3d 100644
> --- a/configs/ls1088aqds_sdcard_ifc_defconfig
> +++ b/configs/ls1088aqds_sdcard_ifc_defconfig
> @@ -67,3 +67,4 @@ CONFIG_USB_XHCI_DWC3=y  CONFIG_USB_DWC3=y
> CONFIG_USB_STORAGE=y  CONFIG_USB_GADGET=y
> +CONFIG_GIC_V3_ITS=y
> diff --git a/configs/ls1088aqds_sdcard_qspi_defconfig
> b/configs/ls1088aqds_sdcard_qspi_defconfig
> index 275dbf9e0e..435f704eb3 100644
> --- a/configs/ls1088aqds_sdcard_qspi_defconfig
> +++ b/configs/ls1088aqds_sdcard_qspi_defconfig
> @@ -70,3 +70,4 @@ CONFIG_USB_XHCI_HCD=y
>  CONFIG_USB_XHCI_DWC3=y
>  CONFIG_USB_DWC3=y
>  CONFIG_USB_GADGET=y
> +CONFIG_GIC_V3_ITS=y
> diff --git a/configs/ls1088aqds_tfa_defconfig
> b/configs/ls1088aqds_tfa_defconfig
> index 1144cba983..5c2a699849 100644
> --- a/configs/ls1088aqds_tfa_defconfig
> +++ b/configs/ls1088aqds_tfa_defconfig
> @@ -78,3 +78,4 @@ CONFIG_USB_XHCI_DWC3=y  CONFIG_USB_DWC3=y
> CONFIG_USB_GADGET=y  CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
> +CONFIG_GIC_V3_ITS=y
> diff --git a/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig
> b/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig
> index 3f654e2e1d..89e9a46c4f 100644
> --- a/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig
> +++ b/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig
> @@ -61,3 +61,4 @@ CONFIG_USB_GADGET=y
>  CONFIG_RSA=y
>  CONFIG_RSA_SOFTWARE_EXP=y
>  CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
> +CONFIG_GIC_V3_ITS=y
> diff --git a/configs/ls1088ardb_qspi_defconfig
> b/configs/ls1088ardb_qspi_defconfig
> index 935d76b4be..3c2fda4593 100644
> --- a/configs/ls1088ardb_qspi_defconfig
> +++ b/configs/ls1088ardb_qspi_defconfig
> @@ -62,3 +62,4 @@ CONFIG_USB_XHCI_DWC3=y  CONFIG_USB_DWC3=y
> CONFIG_USB_GADGET=y  CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
> +CONFIG_GIC_V3_ITS=y
> diff --git a/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig
> b/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig
> index 562cbdd3ab..da41ccaa29 100644
> --- a/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig
> +++ b/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig
> @@ -70,3 +70,4 @@ CONFIG_USB_XHCI_DWC3=y  CONFIG_USB_DWC3=y
> CONFIG_RSA=y  CONFIG_SPL_RSA=y
> +CONFIG_GIC_V3_ITS=y
> diff --git a/configs/ls1088ardb_sdcard_qspi_defconfig
> b/configs/ls1088ardb_sdcard_qspi_defconfig
> index 1e6fdceca1..0483e5d8d2 100644
> --- a/configs/ls1088ardb_sdcard_qspi_defconfig
> +++ b/configs/ls1088ardb_sdcard_qspi_defconfig
> @@ -71,3 +71,4 @@ CONFIG_USB_XHCI_HCD=y
>  CONFIG_USB_XHCI_DWC3=y
>  CONFIG_USB_DWC3=y
>  CONFIG_USB_GADGET=y
> +CONFIG_GIC_V3_ITS=y
> diff --git a/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig
> b/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig
> index 0086039e52..079e6c53fb 100644
> --- a/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig
> +++ b/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig
> @@ -71,3 +71,4 @@ CONFIG_RSA=y
>  CONFIG_SPL_RSA=y
>  CONFIG_RSA_SOFTWARE_EXP=y
>  CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
> +CONFIG_GIC_V3_ITS=y
> diff --git a/configs/ls1088ardb_tfa_defconfig
> b/configs/ls1088ardb_tfa_defconfig
> index a7908e95b5..e3d4b02d21 100644
> --- a/configs/ls1088ardb_tfa_defconfig
> +++ b/configs/ls1088ardb_tfa_defconfig
> @@ -77,3 +77,4 @@ CONFIG_USB_ETHER_ASIX=y
> CONFIG_USB_ETHER_ASIX88179=y  CONFIG_USB_ETHER_RTL8152=y
> CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
> +CONFIG_GIC_V3_ITS=y
> --
> 2.17.1

[PATCHv2 9/9] configs: ls208xa: Enable GIC_V3_ITS config

[Wasim Khan]

> -----Original Message-----
> From: U-Boot <u-boot-bounces@lists.denx.de> On Behalf Of Zhiqiang Hou
> Sent: Tuesday, March 24, 2020 1:42 PM
> To: u-boot at lists.denx.de; Priyanka Jain <priyanka.jain@nxp.com>; Biwen Li
> <biwen.li@nxp.com>
> Cc: Z.q. Hou <zhiqiang.hou@nxp.com>
> Subject: [PATCHv2 9/9] configs: ls208xa: Enable GIC_V3_ITS config
> 
> From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>

Reviewed-by: Wasim Khan <wasim.khan@nxp.com>

> 
> Enable GIC_V3_ITS config to initialize the GIC redistributor tables.
> 
> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> ---
> V2:
>  - No change.
> 
>  configs/ls2080aqds_SECURE_BOOT_defconfig      | 1 +
>  configs/ls2080aqds_defconfig                  | 1 +
>  configs/ls2080aqds_nand_defconfig             | 1 +
>  configs/ls2080aqds_qspi_defconfig             | 1 +
>  configs/ls2080aqds_sdcard_defconfig           | 1 +
>  configs/ls2080ardb_SECURE_BOOT_defconfig      | 1 +
>  configs/ls2080ardb_defconfig                  | 1 +
>  configs/ls2080ardb_nand_defconfig             | 1 +
>  configs/ls2081ardb_defconfig                  | 1 +
>  configs/ls2088aqds_tfa_defconfig              | 1 +
>  configs/ls2088ardb_qspi_SECURE_BOOT_defconfig | 1 +
>  configs/ls2088ardb_qspi_defconfig             | 1 +
>  configs/ls2088ardb_tfa_SECURE_BOOT_defconfig  | 1 +
>  configs/ls2088ardb_tfa_defconfig              | 1 +
>  14 files changed, 14 insertions(+)
> 
> diff --git a/configs/ls2080aqds_SECURE_BOOT_defconfig
> b/configs/ls2080aqds_SECURE_BOOT_defconfig
> index 8a792e449a..9039b252c1 100644
> --- a/configs/ls2080aqds_SECURE_BOOT_defconfig
> +++ b/configs/ls2080aqds_SECURE_BOOT_defconfig
> @@ -62,3 +62,4 @@ CONFIG_USB_XHCI_DWC3=y  CONFIG_RSA=y
> CONFIG_RSA_SOFTWARE_EXP=y  CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
> +CONFIG_GIC_V3_ITS=y
> diff --git a/configs/ls2080aqds_defconfig b/configs/ls2080aqds_defconfig index
> bc4c218c21..b14b3ca5e7 100644
> --- a/configs/ls2080aqds_defconfig
> +++ b/configs/ls2080aqds_defconfig
> @@ -63,3 +63,4 @@ CONFIG_DM_USB=y
>  CONFIG_USB_XHCI_HCD=y
>  CONFIG_USB_XHCI_DWC3=y
>  CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
> +CONFIG_GIC_V3_ITS=y
> diff --git a/configs/ls2080aqds_nand_defconfig
> b/configs/ls2080aqds_nand_defconfig
> index e840cbf0ef..fac2b04068 100644
> --- a/configs/ls2080aqds_nand_defconfig
> +++ b/configs/ls2080aqds_nand_defconfig
> @@ -70,3 +70,4 @@ CONFIG_DM_USB=y
>  CONFIG_USB_XHCI_HCD=y
>  CONFIG_USB_XHCI_DWC3=y
>  CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
> +CONFIG_GIC_V3_ITS=y
> diff --git a/configs/ls2080aqds_qspi_defconfig
> b/configs/ls2080aqds_qspi_defconfig
> index 861e652f7f..343c7675e0 100644
> --- a/configs/ls2080aqds_qspi_defconfig
> +++ b/configs/ls2080aqds_qspi_defconfig
> @@ -62,3 +62,4 @@ CONFIG_DM_USB=y
>  CONFIG_USB_XHCI_HCD=y
>  CONFIG_USB_XHCI_DWC3=y
>  CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
> +CONFIG_GIC_V3_ITS=y
> diff --git a/configs/ls2080aqds_sdcard_defconfig
> b/configs/ls2080aqds_sdcard_defconfig
> index 864e70d334..dd2862ffe0 100644
> --- a/configs/ls2080aqds_sdcard_defconfig
> +++ b/configs/ls2080aqds_sdcard_defconfig
> @@ -69,3 +69,4 @@ CONFIG_DM_USB=y
>  CONFIG_USB_XHCI_HCD=y
>  CONFIG_USB_XHCI_DWC3=y
>  CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
> +CONFIG_GIC_V3_ITS=y
> diff --git a/configs/ls2080ardb_SECURE_BOOT_defconfig
> b/configs/ls2080ardb_SECURE_BOOT_defconfig
> index 4abfc64705..743e25f7b7 100644
> --- a/configs/ls2080ardb_SECURE_BOOT_defconfig
> +++ b/configs/ls2080ardb_SECURE_BOOT_defconfig
> @@ -64,3 +64,4 @@ CONFIG_USB_XHCI_DWC3=y  CONFIG_RSA=y
> CONFIG_RSA_SOFTWARE_EXP=y  CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
> +CONFIG_GIC_V3_ITS=y
> diff --git a/configs/ls2080ardb_defconfig b/configs/ls2080ardb_defconfig index
> 0102e14ecb..e9dfc3603e 100644
> --- a/configs/ls2080ardb_defconfig
> +++ b/configs/ls2080ardb_defconfig
> @@ -65,3 +65,4 @@ CONFIG_DM_USB=y
>  CONFIG_USB_XHCI_HCD=y
>  CONFIG_USB_XHCI_DWC3=y
>  CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
> +CONFIG_GIC_V3_ITS=y
> diff --git a/configs/ls2080ardb_nand_defconfig
> b/configs/ls2080ardb_nand_defconfig
> index 448e0fe58d..68ec26e405 100644
> --- a/configs/ls2080ardb_nand_defconfig
> +++ b/configs/ls2080ardb_nand_defconfig
> @@ -70,3 +70,4 @@ CONFIG_DM_USB=y
>  CONFIG_USB_XHCI_HCD=y
>  CONFIG_USB_XHCI_DWC3=y
>  CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
> +CONFIG_GIC_V3_ITS=y
> diff --git a/configs/ls2081ardb_defconfig b/configs/ls2081ardb_defconfig index
> e446a1120b..4036ed94e5 100644
> --- a/configs/ls2081ardb_defconfig
> +++ b/configs/ls2081ardb_defconfig
> @@ -62,3 +62,4 @@ CONFIG_DM_USB=y
>  CONFIG_USB_XHCI_HCD=y
>  CONFIG_USB_XHCI_DWC3=y
>  CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
> +CONFIG_GIC_V3_ITS=y
> diff --git a/configs/ls2088aqds_tfa_defconfig
> b/configs/ls2088aqds_tfa_defconfig
> index 9f49736b4f..d3ee37cabe 100644
> --- a/configs/ls2088aqds_tfa_defconfig
> +++ b/configs/ls2088aqds_tfa_defconfig
> @@ -74,3 +74,4 @@ CONFIG_DM_USB=y
>  CONFIG_USB_XHCI_HCD=y
>  CONFIG_USB_XHCI_DWC3=y
>  CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
> +CONFIG_GIC_V3_ITS=y
> diff --git a/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig
> b/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig
> index ae4a6820ff..9b06bf4257 100644
> --- a/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig
> +++ b/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig
> @@ -59,3 +59,4 @@ CONFIG_USB_XHCI_DWC3=y  CONFIG_RSA=y
> CONFIG_RSA_SOFTWARE_EXP=y  CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
> +CONFIG_GIC_V3_ITS=y
> diff --git a/configs/ls2088ardb_qspi_defconfig
> b/configs/ls2088ardb_qspi_defconfig
> index 1ad5f3b367..3203384c5b 100644
> --- a/configs/ls2088ardb_qspi_defconfig
> +++ b/configs/ls2088ardb_qspi_defconfig
> @@ -63,3 +63,4 @@ CONFIG_DM_USB=y
>  CONFIG_USB_XHCI_HCD=y
>  CONFIG_USB_XHCI_DWC3=y
>  CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
> +CONFIG_GIC_V3_ITS=y
> diff --git a/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig
> b/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig
> index c0d0a99c8a..41a2770bb9 100644
> --- a/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig
> +++ b/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig
> @@ -76,3 +76,4 @@ CONFIG_RSA=y
>  CONFIG_SPL_RSA=y
>  CONFIG_RSA_SOFTWARE_EXP=y
>  CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
> +CONFIG_GIC_V3_ITS=y
> diff --git a/configs/ls2088ardb_tfa_defconfig
> b/configs/ls2088ardb_tfa_defconfig
> index ccbaaf7a5c..b27b2c59cb 100644
> --- a/configs/ls2088ardb_tfa_defconfig
> +++ b/configs/ls2088ardb_tfa_defconfig
> @@ -81,3 +81,4 @@ CONFIG_DM_USB=y
>  CONFIG_USB_XHCI_HCD=y
>  CONFIG_USB_XHCI_DWC3=y
>  CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
> +CONFIG_GIC_V3_ITS=y
> --
> 2.17.1

[PATCHv2 8/9] configs: ls1028a: Enable GIC_V3_ITS config

[Wasim Khan]

> -----Original Message-----
> From: U-Boot <u-boot-bounces@lists.denx.de> On Behalf Of Zhiqiang Hou
> Sent: Tuesday, March 24, 2020 1:42 PM
> To: u-boot at lists.denx.de; Priyanka Jain <priyanka.jain@nxp.com>; Biwen Li
> <biwen.li@nxp.com>
> Cc: Z.q. Hou <zhiqiang.hou@nxp.com>
> Subject: [PATCHv2 8/9] configs: ls1028a: Enable GIC_V3_ITS config
> 
> From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> 
> Enable GIC_V3_ITS config to initialize the GIC redistributor tables.
> 
> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>

Reviewed-by: Wasim Khan <wasim.khan@nxp.com>

> ---
> V2:
>  - No change.
> 
>  configs/ls1028aqds_tfa_SECURE_BOOT_defconfig | 1 +
>  configs/ls1028aqds_tfa_defconfig             | 1 +
>  configs/ls1028ardb_tfa_SECURE_BOOT_defconfig | 1 +
>  configs/ls1028ardb_tfa_defconfig             | 1 +
>  4 files changed, 4 insertions(+)
> 
> diff --git a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
> b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
> index c5f0bd85da..92b944f426 100644
> --- a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
> +++ b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
> @@ -79,3 +79,4 @@ CONFIG_WDT_SP805=y
>  CONFIG_RSA=y
>  CONFIG_OF_LIBFDT_OVERLAY=y
>  CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
> +CONFIG_GIC_V3_ITS=y
> diff --git a/configs/ls1028aqds_tfa_defconfig
> b/configs/ls1028aqds_tfa_defconfig
> index 7085be77fe..66d3ee1761 100644
> --- a/configs/ls1028aqds_tfa_defconfig
> +++ b/configs/ls1028aqds_tfa_defconfig
> @@ -84,3 +84,4 @@ CONFIG_WDT=y
>  CONFIG_WDT_SP805=y
>  CONFIG_OF_LIBFDT_OVERLAY=y
>  CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
> +CONFIG_GIC_V3_ITS=y
> diff --git a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
> b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
> index 6fa14af6af..c999f3e6ef 100644
> --- a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
> +++ b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
> @@ -76,3 +76,4 @@ CONFIG_WDT_SP805=y
>  CONFIG_RSA=y
>  CONFIG_OF_LIBFDT_OVERLAY=y
>  CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
> +CONFIG_GIC_V3_ITS=y
> diff --git a/configs/ls1028ardb_tfa_defconfig
> b/configs/ls1028ardb_tfa_defconfig
> index 3ef5520969..150123bc7b 100644
> --- a/configs/ls1028ardb_tfa_defconfig
> +++ b/configs/ls1028ardb_tfa_defconfig
> @@ -86,3 +86,4 @@ CONFIG_WDT=y
>  CONFIG_WDT_SP805=y
>  CONFIG_OF_LIBFDT_OVERLAY=y
>  CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
> +CONFIG_GIC_V3_ITS=y
> --
> 2.17.1

[PATCHv2 1/9] board: lx2160a: Add header file cpu_func.h

[Z.q. Hou]

Hi Wasim,

Thanks a lot for your comments!

> -----Original Message-----
> From: Wasim Khan <wasim.khan@nxp.com>
> Sent: 2020?4?21? 13:41
> To: Z.q. Hou <zhiqiang.hou@nxp.com>; u-boot at lists.denx.de; Priyanka Jain
> <priyanka.jain@nxp.com>; Biwen Li <biwen.li@nxp.com>
> Cc: Z.q. Hou <zhiqiang.hou@nxp.com>
> Subject: RE: [PATCHv2 1/9] board: lx2160a: Add header file cpu_func.h
> 
> 
> 
> > -----Original Message-----
> > From: U-Boot <u-boot-bounces@lists.denx.de> On Behalf Of Zhiqiang Hou
> > Sent: Tuesday, March 24, 2020 1:42 PM
> > To: u-boot at lists.denx.de; Priyanka Jain <priyanka.jain@nxp.com>; Biwen
> > Li <biwen.li@nxp.com>
> > Cc: Z.q. Hou <zhiqiang.hou@nxp.com>
> > Subject: [PATCHv2 1/9] board: lx2160a: Add header file cpu_func.h
> >
> > From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> >
> > The declaration of the function cpu_numcores() has been moved to
> > cpu_func.h, so add including of the header file to avoid build error.
> >
> > Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> > ---
> > V2:
> >  - No change.
> >
> >  board/freescale/lx2160a/lx2160a.c | 1 +
> >  1 file changed, 1 insertion(+)
> >
> > diff --git a/board/freescale/lx2160a/lx2160a.c
> > b/board/freescale/lx2160a/lx2160a.c
> > index 134ae22f85..595c774b42 100644
> > --- a/board/freescale/lx2160a/lx2160a.c
> > +++ b/board/freescale/lx2160a/lx2160a.c
> > @@ -5,6 +5,7 @@
> >
> >  #include <common.h>
> >  #include <clock_legacy.h>
> > +#include <cpu_func.h>
> 
> cpu_func.h is already included in board/freescale/lx2160a/lx2160a.c.
> You can remove this patch.

Priyanka, please drop this patch if it had been there.

Thanks,
Zhiqiang

> 
> >  #include <dm.h>
> >  #include <dm/platform_data/serial_pl01x.h>  #include <i2c.h>
> > --
> > 2.17.1

[PATCHv2 2/9] arm64: fsl-layerscape: Assign addr to resv_ram if enabled RESV_RAM config

[Z.q. Hou]

Hi Wasim,

Thanks a lot for your comments!

> -----Original Message-----
> From: Wasim Khan <wasim.khan@nxp.com>
> Sent: 2020?4?21? 15:27
> To: Z.q. Hou <zhiqiang.hou@nxp.com>; u-boot at lists.denx.de; Priyanka Jain
> <priyanka.jain@nxp.com>; Biwen Li <biwen.li@nxp.com>
> Cc: Z.q. Hou <zhiqiang.hou@nxp.com>
> Subject: RE: [PATCHv2 2/9] arm64: fsl-layerscape: Assign addr to resv_ram if
> enabled RESV_RAM config
> 
> 
> 
> > -----Original Message-----
> > From: U-Boot <u-boot-bounces@lists.denx.de> On Behalf Of Zhiqiang Hou
> > Sent: Tuesday, March 24, 2020 1:42 PM
> > To: u-boot at lists.denx.de; Priyanka Jain <priyanka.jain@nxp.com>; Biwen
> > Li <biwen.li@nxp.com>
> > Cc: Z.q. Hou <zhiqiang.hou@nxp.com>
> > Subject: [PATCHv2 2/9] arm64: fsl-layerscape: Assign addr to resv_ram
> > if enabled RESV_RAM config
> >
> > From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> >
> > The initialization of gd->arch.resv_ram pointer should depend on if
> > the RESV_RAM config is enabled.
> >
> > Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> > ---
> > V2:
> >  - No change.
> >
> >  arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 8 ++++----
> >  1 file changed, 4 insertions(+), 4 deletions(-)
> >
> > diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
> > b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
> > index b443894453..1b7729c046 100644
> > --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
> > +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
> > @@ -1379,7 +1379,7 @@ static int tfa_dram_init_banksize(void)
> >  	if (i > 0)
> >  		ret = 0;
> >
> > -#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
> > +#if defined(CONFIG_RESV_RAM) && !defined(CONFIG_SPL_BUILD)
> >  	/* Assign memory for MC */
> >  #ifdef CONFIG_SYS_DDR_BLOCK3_BASE
> >  	if (gd->bd->bi_dram[2].size >=
> > @@ -1402,7 +1402,7 @@ static int tfa_dram_init_banksize(void)
> >  				board_reserve_ram_top(gd->bd-
> > >bi_dram[0].size);
> >  		}
> >  	}
> > -#endif	/* CONFIG_FSL_MC_ENET */
> > +#endif	/* CONFIG_RESV_RAM */
> >
> >  	return ret;
> >  }
> > @@ -1465,7 +1465,7 @@ int dram_init_banksize(void)
> >  	}
> >  #endif	/* CONFIG_SYS_MEM_RESERVE_SECURE */
> >
> > -#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
> > +#if defined(CONFIG_RESV_RAM) && !defined(CONFIG_SPL_BUILD)
> >  	/* Assign memory for MC */
> >  #ifdef CONFIG_SYS_DDR_BLOCK3_BASE
> >  	if (gd->bd->bi_dram[2].size >=
> > @@ -1488,7 +1488,7 @@ int dram_init_banksize(void)
> >  				board_reserve_ram_top(gd->bd-
> > >bi_dram[0].size);
> >  		}
> >  	}
> > -#endif	/* CONFIG_FSL_MC_ENET */
> > +#endif	/* CONFIG_RESV_RAM */
> >
> 
> CONFIG_FSL_MC_ENET will select the CONFIG_RESV_RAM. What benefit we
> have with this change ?
> because we are reserving memory for MC in the following code, so earlier
> check (with CONFIG_FSL_MC_ENET) looks good to be.

No benefit, but it's not the correct logic, see the change log, so correct.

Thanks,
Zhiqiang

> 
> >  #ifdef CONFIG_SYS_DP_DDR_BASE_PHY
> >  #ifdef CONFIG_SYS_DDR_BLOCK3_BASE
> > --
> > 2.17.1

[PATCHv2 3/9] board: lx2160a: Don't program the GIC RD tables if failed to reserve memory

[Z.q. Hou]

Hi Wasim,

Thanks a lot for your comments!

> -----Original Message-----
> From: Wasim Khan <wasim.khan@nxp.com>
> Sent: 2020?4?21? 15:29
> To: Z.q. Hou <zhiqiang.hou@nxp.com>; u-boot at lists.denx.de; Priyanka Jain
> <priyanka.jain@nxp.com>; Biwen Li <biwen.li@nxp.com>
> Cc: Z.q. Hou <zhiqiang.hou@nxp.com>
> Subject: RE: [PATCHv2 3/9] board: lx2160a: Don't program the GIC RD tables
> if failed to reserve memory
> 
> 
> 
> > -----Original Message-----
> > From: U-Boot <u-boot-bounces@lists.denx.de> On Behalf Of Zhiqiang Hou
> > Sent: Tuesday, March 24, 2020 1:42 PM
> > To: u-boot at lists.denx.de; Priyanka Jain <priyanka.jain@nxp.com>; Biwen
> > Li <biwen.li@nxp.com>
> > Cc: Z.q. Hou <zhiqiang.hou@nxp.com>
> > Subject: [PATCHv2 3/9] board: lx2160a: Don't program the GIC RD tables
> > if failed to reserve memory
> >
> > From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> >
> > Program the GIC redistributor tables only when succeeded to reserve
> > memory for them, otherwise kernel will lose the chance to program them
> > using allocated memory.
> >
> > Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> > ---
> > V2:
> >  - The #4 of v1 patchset.
> >
> >  board/freescale/lx2160a/lx2160a.c | 6 ++++--
> >  1 file changed, 4 insertions(+), 2 deletions(-)
> >
> > diff --git a/board/freescale/lx2160a/lx2160a.c
> > b/board/freescale/lx2160a/lx2160a.c
> > index 595c774b42..7f22110dc6 100644
> > --- a/board/freescale/lx2160a/lx2160a.c
> > +++ b/board/freescale/lx2160a/lx2160a.c
> > @@ -657,6 +657,7 @@ int ft_board_setup(void *blob, bd_t *bd)
> >  	u64 mc_memory_size = 0;
> >  	u16 total_memory_banks;
> >  	u64 gic_lpi_base;
> > +	int ret;
> >
> >  	ft_cpu_setup(blob, bd);
> >
> > @@ -678,8 +679,9 @@ int ft_board_setup(void *blob, bd_t *bd)
> >
> >  #ifdef CONFIG_GIC_V3_ITS
> >  	gic_lpi_base = gd->arch.resv_ram - GIC_LPI_SIZE;
> > -	gic_lpi_tables_init(gic_lpi_base, cpu_numcores());
> > -	fdt_fixup_gic_lpi_memory(blob, gic_lpi_base);
> > +	ret = fdt_fixup_gic_lpi_memory(blob, gic_lpi_base);
> > +	if (!ret && gic_lpi_tables_init(gic_lpi_base, cpu_numcores()))
> > +		debug("%s: failed to init gic-lpi-tables\n", __func__);
> 
> Currently till this point, fdt_fixup_gic_lpi_memory return type is void , you
> may first you need to change fdt_fixup_gic_lpi_memory() to return
> something and then you can check for the errors.
> OR, no need for this patch, as in your later patches you are already doing
> error checking .

Good catch, I lost the change of the return type of fdt_fixup_gic_lpi_memory(),
will add in v3.

Thanks,
Zhiqiang

> 
> >  #endif
> >
> >  #ifdef CONFIG_RESV_RAM
> > --
> > 2.17.1

[PATCHv2 4/9] board: lx2160a: Make sure the RD tables address align to 64KB

[Z.q. Hou]

Hi Wasim,

Thanks a lot for your review!

Regards,
Zhiqiang

> -----Original Message-----
> From: Wasim Khan <wasim.khan@nxp.com>
> Sent: 2020?4?21? 15:38
> To: Z.q. Hou <zhiqiang.hou@nxp.com>; u-boot at lists.denx.de; Priyanka Jain
> <priyanka.jain@nxp.com>; Biwen Li <biwen.li@nxp.com>
> Cc: Z.q. Hou <zhiqiang.hou@nxp.com>
> Subject: RE: [PATCHv2 4/9] board: lx2160a: Make sure the RD tables address
> align to 64KB
> 
> 
> 
> > -----Original Message-----
> > From: U-Boot <u-boot-bounces@lists.denx.de> On Behalf Of Zhiqiang Hou
> > Sent: Tuesday, March 24, 2020 1:42 PM
> > To: u-boot at lists.denx.de; Priyanka Jain <priyanka.jain@nxp.com>; Biwen
> > Li <biwen.li@nxp.com>
> > Cc: Z.q. Hou <zhiqiang.hou@nxp.com>
> > Subject: [PATCHv2 4/9] board: lx2160a: Make sure the RD tables address
> > align to 64KB
> >
> > From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> >
> > As the lower 16bit of the redistributor pending table is reserved for
> > describing the memory attributes, we must give a 64KB aligned address
> > to the GIC LPI initialization function.
> >
> > Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> 
> 
> Reviewed-by: Wasim Khan <wasim.khan@nxp.com>
> 
> > ---
> > V2:
> >  - The #5 of v1 patchset.
> >
> >  board/freescale/lx2160a/lx2160a.c | 3 ++-
> >  1 file changed, 2 insertions(+), 1 deletion(-)
> >
> > diff --git a/board/freescale/lx2160a/lx2160a.c
> > b/board/freescale/lx2160a/lx2160a.c
> > index 7f22110dc6..c8e962ce3d 100644
> > --- a/board/freescale/lx2160a/lx2160a.c
> > +++ b/board/freescale/lx2160a/lx2160a.c
> > @@ -17,6 +17,7 @@
> >  #include <asm/io.h>
> >  #include <fdt_support.h>
> >  #include <linux/libfdt.h>
> > +#include <linux/sizes.h>
> >  #include <fsl-mc/fsl_mc.h>
> >  #include <env_internal.h>
> >  #include <efi_loader.h>
> > @@ -678,7 +679,7 @@ int ft_board_setup(void *blob, bd_t *bd)
> >  	}
> >
> >  #ifdef CONFIG_GIC_V3_ITS
> > -	gic_lpi_base = gd->arch.resv_ram - GIC_LPI_SIZE;
> > +	gic_lpi_base = ALIGN(gd->arch.resv_ram - GIC_LPI_SIZE, SZ_64K);
> >  	ret = fdt_fixup_gic_lpi_memory(blob, gic_lpi_base);
> >  	if (!ret && gic_lpi_tables_init(gic_lpi_base, cpu_numcores()))
> >  		debug("%s: failed to init gic-lpi-tables\n", __func__);
> > --
> > 2.17.1

[PATCHv2 5/9] fsl-layerscape: Kconfig: Select RESV_RAM config if GIC_V3_ITS is enabled

[Z.q. Hou]

Hi Wasim,

Thanks a lot for your review!

Regards,
Zhiqiang

> -----Original Message-----
> From: Wasim Khan <wasim.khan@nxp.com>
> Sent: 2020?4?21? 15:35
> To: Z.q. Hou <zhiqiang.hou@nxp.com>; u-boot at lists.denx.de; Priyanka Jain
> <priyanka.jain@nxp.com>; Biwen Li <biwen.li@nxp.com>
> Cc: Z.q. Hou <zhiqiang.hou@nxp.com>
> Subject: RE: [PATCHv2 5/9] fsl-layerscape: Kconfig: Select RESV_RAM config
> if GIC_V3_ITS is enabled
> 
> 
> 
> > -----Original Message-----
> > From: U-Boot <u-boot-bounces@lists.denx.de> On Behalf Of Zhiqiang Hou
> > Sent: Tuesday, March 24, 2020 1:42 PM
> > To: u-boot at lists.denx.de; Priyanka Jain <priyanka.jain@nxp.com>; Biwen
> > Li <biwen.li@nxp.com>
> > Cc: Z.q. Hou <zhiqiang.hou@nxp.com>
> > Subject: [PATCHv2 5/9] fsl-layerscape: Kconfig: Select RESV_RAM config
> > if GIC_V3_ITS is enabled
> >
> > From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> >
> > The GIC redistributor tables initialization depends on RESV_RAM
> > config, so select RESV_RAM if GIC_V3_ITS is enabled.
> >
> > Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> Reviewed-by: Wasim Khan <wasim.khan@nxp.com>
> 
> <snip>

[PATCHv2 4/9] board: lx2160a: Make sure the RD tables address align to 64KB

[Z.q. Hou]

Hi Wasim,

Thanks a lot for your review!

Regards,
Zhiqiang

> -----Original Message-----
> From: Wasim Khan <wasim.khan@nxp.com>
> Sent: 2020?4?21? 15:38
> To: Z.q. Hou <zhiqiang.hou@nxp.com>; u-boot at lists.denx.de; Priyanka Jain
> <priyanka.jain@nxp.com>; Biwen Li <biwen.li@nxp.com>
> Cc: Z.q. Hou <zhiqiang.hou@nxp.com>
> Subject: RE: [PATCHv2 4/9] board: lx2160a: Make sure the RD tables address
> align to 64KB
> 
> 
> 
> > -----Original Message-----
> > From: U-Boot <u-boot-bounces@lists.denx.de> On Behalf Of Zhiqiang Hou
> > Sent: Tuesday, March 24, 2020 1:42 PM
> > To: u-boot at lists.denx.de; Priyanka Jain <priyanka.jain@nxp.com>; Biwen
> > Li <biwen.li@nxp.com>
> > Cc: Z.q. Hou <zhiqiang.hou@nxp.com>
> > Subject: [PATCHv2 4/9] board: lx2160a: Make sure the RD tables address
> > align to 64KB
> >
> > From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> >
> > As the lower 16bit of the redistributor pending table is reserved for
> > describing the memory attributes, we must give a 64KB aligned address
> > to the GIC LPI initialization function.
> >
> > Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> 
> 
> Reviewed-by: Wasim Khan <wasim.khan@nxp.com>
> 
> > ---
> > V2:
> >  - The #5 of v1 patchset.
> >
> >  board/freescale/lx2160a/lx2160a.c | 3 ++-
> >  1 file changed, 2 insertions(+), 1 deletion(-)
> >
> > diff --git a/board/freescale/lx2160a/lx2160a.c
> > b/board/freescale/lx2160a/lx2160a.c
> > index 7f22110dc6..c8e962ce3d 100644
> > --- a/board/freescale/lx2160a/lx2160a.c
> > +++ b/board/freescale/lx2160a/lx2160a.c
> > @@ -17,6 +17,7 @@
> >  #include <asm/io.h>
> >  #include <fdt_support.h>
> >  #include <linux/libfdt.h>
> > +#include <linux/sizes.h>
> >  #include <fsl-mc/fsl_mc.h>
> >  #include <env_internal.h>
> >  #include <efi_loader.h>
> > @@ -678,7 +679,7 @@ int ft_board_setup(void *blob, bd_t *bd)
> >  	}
> >
> >  #ifdef CONFIG_GIC_V3_ITS
> > -	gic_lpi_base = gd->arch.resv_ram - GIC_LPI_SIZE;
> > +	gic_lpi_base = ALIGN(gd->arch.resv_ram - GIC_LPI_SIZE, SZ_64K);
> >  	ret = fdt_fixup_gic_lpi_memory(blob, gic_lpi_base);
> >  	if (!ret && gic_lpi_tables_init(gic_lpi_base, cpu_numcores()))
> >  		debug("%s: failed to init gic-lpi-tables\n", __func__);
> > --
> > 2.17.1

[PATCHv2 6/9] arm64: layerscape: Move GIC RD tables initialization to CPU setup function

[Z.q. Hou]

Hi Wasim,

Thanks a lot for your review!

Regards,
Zhiqiang

> -----Original Message-----
> From: Wasim Khan <wasim.khan@nxp.com>
> Sent: 2020?4?21? 15:40
> To: Z.q. Hou <zhiqiang.hou@nxp.com>; u-boot at lists.denx.de; Priyanka Jain
> <priyanka.jain@nxp.com>; Biwen Li <biwen.li@nxp.com>
> Cc: Z.q. Hou <zhiqiang.hou@nxp.com>
> Subject: RE: [PATCHv2 6/9] arm64: layerscape: Move GIC RD tables
> initialization to CPU setup function
> 
> 
> 
> > -----Original Message-----
> > From: U-Boot <u-boot-bounces@lists.denx.de> On Behalf Of Zhiqiang Hou
> > Sent: Tuesday, March 24, 2020 1:42 PM
> > To: u-boot at lists.denx.de; Priyanka Jain <priyanka.jain@nxp.com>; Biwen
> > Li <biwen.li@nxp.com>
> > Cc: Z.q. Hou <zhiqiang.hou@nxp.com>
> > Subject: [PATCHv2 6/9] arm64: layerscape: Move GIC RD tables
> > initialization to CPU setup function
> >
> > From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> >
> > Move GIC redistributor tables initialization to CPU setup function.
> >
> > This patch introduces a GIC redistributor tables init function, and
> > moves the function of reserving memory for GIC redistributor tables to
> > soc.c and adds a argument for the memory size to reserve, BTW rename
> > the function so that it is more readable.
> >
> > Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> 
> Reviewed-by: Wasim Khan <wasim.khan@nxp.com>
> 
> > ---
> > V2:
> >  - New patch.
> >
> >  arch/arm/cpu/armv8/fsl-layerscape/fdt.c       |  4 ++
> >  arch/arm/cpu/armv8/fsl-layerscape/soc.c       | 44
> +++++++++++++++++++
> >  .../arm/include/asm/arch-fsl-layerscape/soc.h |  4 ++
> >  board/freescale/lx2160a/lx2160a.c             | 28 ------------
> >  4 files changed, 52 insertions(+), 28 deletions(-)
> >
> > diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
> > b/arch/arm/cpu/armv8/fsl- layerscape/fdt.c index
> > 87c3e05f45..36e0a2380e 100644
> > --- a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
> > +++ b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
> > @@ -462,6 +462,10 @@ void ft_cpu_setup(void *blob, bd_t *bd)
> >  	do_fixup_by_path_u32(blob, "/sysclk", "clock-frequency",
> >  			     CONFIG_SYS_CLK_FREQ, 1);
> >
> > +#ifdef CONFIG_GIC_V3_ITS
> > +	ls_gic_rd_tables_init(blob);
> > +#endif
> > +
> >  #if defined(CONFIG_PCIE_LAYERSCAPE) ||
> > defined(CONFIG_PCIE_LAYERSCAPE_GEN4)
> >  	ft_pci_setup(blob, bd);
> >  #endif
> > diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> > b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> > index d0e10cb007..28bb1d7401 100644
> > --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> > +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> > @@ -6,10 +6,12 @@
> >
> >  #include <common.h>
> >  #include <clock_legacy.h>
> > +#include <cpu_func.h>
> >  #include <env.h>
> >  #include <fsl_immap.h>
> >  #include <fsl_ifc.h>
> >  #include <init.h>
> > +#include <linux/sizes.h>
> >  #include <asm/arch/fsl_serdes.h>
> >  #include <asm/arch/soc.h>
> >  #include <asm/io.h>
> > @@ -17,6 +19,7 @@
> >  #include <asm/arch-fsl-layerscape/config.h>
> >  #include <asm/arch-fsl-layerscape/ns_access.h>
> >  #include <asm/arch-fsl-layerscape/fsl_icid.h>
> > +#include <asm/gic-v3.h>
> >  #ifdef CONFIG_LAYERSCAPE_NS_ACCESS
> >  #include <fsl_csu.h>
> >  #endif
> > @@ -30,9 +33,50 @@
> >  #include <fsl_immap.h>
> >  #ifdef CONFIG_TFABOOT
> >  #include <env_internal.h>
> > +#endif
> > +#if defined(CONFIG_TFABOOT) || defined(CONFIG_GIC_V3_ITS)
> >  DECLARE_GLOBAL_DATA_PTR;
> >  #endif
> >
> > +#ifdef CONFIG_GIC_V3_ITS
> > +#define PENDTABLE_MAX_SZ	ALIGN(BIT(ITS_MAX_LPI_NRBITS), SZ_64K)
> > +#define PROPTABLE_MAX_SZ	ALIGN(BIT(ITS_MAX_LPI_NRBITS) / 8,
> SZ_64K)
> > +#define GIC_LPI_SIZE		ALIGN(cpu_numcores() *
> PENDTABLE_MAX_SZ
> > + \
> > +				PROPTABLE_MAX_SZ, SZ_1M)
> > +static int fdt_add_resv_mem_gic_rd_tables(void *blob, u64 base,
> > +size_t
> > +size) {
> > +	u32 phandle;
> > +	int err;
> > +	struct fdt_memory gic_rd_tables;
> > +
> > +	gic_rd_tables.start = base;
> > +	gic_rd_tables.end = base + size - 1;
> > +	err = fdtdec_add_reserved_memory(blob, "gic-rd-tables",
> > &gic_rd_tables,
> > +					 &phandle);
> > +	if (err < 0)
> > +		debug("%s: failed to add reserved memory: %d\n", __func__,
> > err);
> > +
> > +	return err;
> > +}
> > +
> > +int ls_gic_rd_tables_init(void *blob) {
> > +	u64 gic_lpi_base;
> > +	int ret;
> > +
> > +	gic_lpi_base = ALIGN(gd->arch.resv_ram - GIC_LPI_SIZE, SZ_64K);
> > +	ret = fdt_add_resv_mem_gic_rd_tables(blob, gic_lpi_base,
> > GIC_LPI_SIZE);
> > +	if (ret)
> > +		return ret;
> > +
> > +	ret = gic_lpi_tables_init(gic_lpi_base, cpu_numcores());
> > +	if (ret)
> > +		debug("%s: failed to init gic-lpi-tables\n", __func__);
> > +
> > +	return ret;
> > +}
> > +#endif
> > +
> >  bool soc_has_dp_ddr(void)
> >  {
> >  	struct ccsr_gur __iomem *gur = (void
> *)(CONFIG_SYS_FSL_GUTS_ADDR);
> > diff --git a/arch/arm/include/asm/arch-fsl- layerscape/soc.h
> > b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
> > index c62d414aac..020548ac6c 100644
> > --- a/arch/arm/include/asm/arch-fsl-layerscape/soc.h
> > +++ b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
> > @@ -158,6 +158,10 @@ void erratum_a010315(void);
> >
> >  bool soc_has_dp_ddr(void);
> >  bool soc_has_aiop(void);
> > +
> > +#ifdef CONFIG_GIC_V3_ITS
> > +int ls_gic_rd_tables_init(void *blob); #endif
> >  #endif
> >
> >  #endif /* _ASM_ARMV8_FSL_LAYERSCAPE_SOC_H_ */ diff --git
> > a/board/freescale/lx2160a/lx2160a.c
> b/board/freescale/lx2160a/lx2160a.c
> > index c8e962ce3d..cd6a9a34ac 100644
> > --- a/board/freescale/lx2160a/lx2160a.c
> > +++ b/board/freescale/lx2160a/lx2160a.c
> > @@ -5,7 +5,6 @@
> >
> >  #include <common.h>
> >  #include <clock_legacy.h>
> > -#include <cpu_func.h>
> >  #include <dm.h>
> >  #include <dm/platform_data/serial_pl01x.h>  #include <i2c.h> @@
> -17,7 +16,6
> > @@  #include <asm/io.h>  #include <fdt_support.h>  #include
> <linux/libfdt.h> -
> > #include <linux/sizes.h>  #include <fsl-mc/fsl_mc.h>  #include
> <env_internal.h>
> > #include <efi_loader.h> @@ -31,13 +29,11 @@  #include
> "../common/vid.h"
> >  #include <fsl_immap.h>
> >  #include <asm/arch-fsl-layerscape/fsl_icid.h>
> > -#include <asm/gic-v3.h>
> >
> >  #ifdef CONFIG_EMC2305
> >  #include "../common/emc2305.h"
> >  #endif
> >
> > -#define GIC_LPI_SIZE                             0x200000
> >  #ifdef CONFIG_TARGET_LX2160AQDS
> >  #define CFG_MUX_I2C_SDHC(reg, value)		((reg & 0x3f) | value)
> >  #define SET_CFG_MUX1_SDHC1_SDHC(reg)		(reg & 0x3f)
> > @@ -631,21 +627,6 @@ void board_quiesce_devices(void)  }  #endif
> >
> > -#ifdef CONFIG_GIC_V3_ITS
> > -void fdt_fixup_gic_lpi_memory(void *blob, u64 gic_lpi_base) -{
> > -	u32 phandle;
> > -	int err;
> > -	struct fdt_memory gic_lpi;
> > -
> > -	gic_lpi.start = gic_lpi_base;
> > -	gic_lpi.end = gic_lpi_base + GIC_LPI_SIZE - 1;
> > -	err = fdtdec_add_reserved_memory(blob, "gic-lpi", &gic_lpi, &phandle);
> > -	if (err < 0)
> > -		debug("failed to add reserved memory: %d\n", err);
> > -}
> > -#endif
> > -
> >  #ifdef CONFIG_OF_BOARD_SETUP
> >  int ft_board_setup(void *blob, bd_t *bd)  { @@ -657,8 +638,6 @@ int
> > ft_board_setup(void *blob, bd_t *bd)
> >  	u64 mc_memory_base = 0;
> >  	u64 mc_memory_size = 0;
> >  	u16 total_memory_banks;
> > -	u64 gic_lpi_base;
> > -	int ret;
> >
> >  	ft_cpu_setup(blob, bd);
> >
> > @@ -678,13 +657,6 @@ int ft_board_setup(void *blob, bd_t *bd)
> >  		size[i] = gd->bd->bi_dram[i].size;
> >  	}
> >
> > -#ifdef CONFIG_GIC_V3_ITS
> > -	gic_lpi_base = ALIGN(gd->arch.resv_ram - GIC_LPI_SIZE, SZ_64K);
> > -	ret = fdt_fixup_gic_lpi_memory(blob, gic_lpi_base);
> > -	if (!ret && gic_lpi_tables_init(gic_lpi_base, cpu_numcores()))
> > -		debug("%s: failed to init gic-lpi-tables\n", __func__);
> > -#endif
> > -
> >  #ifdef CONFIG_RESV_RAM
> >  	/* reduce size if reserved memory is within this bank */
> >  	if (gd->arch.resv_ram >= base[0] &&
> > --
> > 2.17.1

[PATCHv2 7/9] configs: ls1088a: Enable GIC_V3_ITS config

[Z.q. Hou]

Hi Wasim,

Thanks a lot for your review!

Regards,
Zhiqiang

> -----Original Message-----
> From: Wasim Khan <wasim.khan@nxp.com>
> Sent: 2020?4?21? 15:41
> To: Z.q. Hou <zhiqiang.hou@nxp.com>; u-boot at lists.denx.de; Priyanka Jain
> <priyanka.jain@nxp.com>; Biwen Li <biwen.li@nxp.com>
> Cc: Z.q. Hou <zhiqiang.hou@nxp.com>
> Subject: RE: [PATCHv2 7/9] configs: ls1088a: Enable GIC_V3_ITS config
> 
> 
> 
> > -----Original Message-----
> > From: U-Boot <u-boot-bounces@lists.denx.de> On Behalf Of Zhiqiang Hou
> > Sent: Tuesday, March 24, 2020 1:42 PM
> > To: u-boot at lists.denx.de; Priyanka Jain <priyanka.jain@nxp.com>; Biwen
> > Li <biwen.li@nxp.com>
> > Cc: Z.q. Hou <zhiqiang.hou@nxp.com>
> > Subject: [PATCHv2 7/9] configs: ls1088a: Enable GIC_V3_ITS config
> >
> > From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> >
> > Enable GIC_V3_ITS config to initialize the GIC redistributor tables.
> >
> > Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> 
> Reviewed-by: Wasim Khan <wasim.khan@nxp.com>
> 
> > ---
> > V2:
> >  - No change.
> >
> >  configs/ls1088aqds_defconfig                         | 1 +
> >  configs/ls1088aqds_qspi_SECURE_BOOT_defconfig        | 1 +
> >  configs/ls1088aqds_qspi_defconfig                    | 1 +
> >  configs/ls1088aqds_sdcard_ifc_defconfig              | 1 +
> >  configs/ls1088aqds_sdcard_qspi_defconfig             | 1 +
> >  configs/ls1088aqds_tfa_defconfig                     | 1 +
> >  configs/ls1088ardb_qspi_SECURE_BOOT_defconfig        | 1 +
> >  configs/ls1088ardb_qspi_defconfig                    | 1 +
> >  configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig | 1 +
> >  configs/ls1088ardb_sdcard_qspi_defconfig             | 1 +
> >  configs/ls1088ardb_tfa_SECURE_BOOT_defconfig         | 1 +
> >  configs/ls1088ardb_tfa_defconfig                     | 1 +
> >  12 files changed, 12 insertions(+)
> >
> > diff --git a/configs/ls1088aqds_defconfig
> > b/configs/ls1088aqds_defconfig index
> > 7713e58bbe..b1b74f9af4 100644
> > --- a/configs/ls1088aqds_defconfig
> > +++ b/configs/ls1088aqds_defconfig
> > @@ -59,3 +59,4 @@ CONFIG_USB_XHCI_DWC3=y
> CONFIG_USB_DWC3=y
> > CONFIG_USB_STORAGE=y  CONFIG_USB_GADGET=y
> > +CONFIG_GIC_V3_ITS=y
> > diff --git a/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig
> > b/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig
> > index 242c40b8b5..943b914e01 100644
> > --- a/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig
> > +++ b/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig
> > @@ -60,3 +60,4 @@ CONFIG_USB_GADGET=y
> >  CONFIG_RSA=y
> >  CONFIG_RSA_SOFTWARE_EXP=y
> >  CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
> > +CONFIG_GIC_V3_ITS=y
> > diff --git a/configs/ls1088aqds_qspi_defconfig
> > b/configs/ls1088aqds_qspi_defconfig
> > index 3649b06a75..490782ebfc 100644
> > --- a/configs/ls1088aqds_qspi_defconfig
> > +++ b/configs/ls1088aqds_qspi_defconfig
> > @@ -61,3 +61,4 @@ CONFIG_USB_XHCI_DWC3=y
> CONFIG_USB_DWC3=y
> > CONFIG_USB_GADGET=y  CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
> > +CONFIG_GIC_V3_ITS=y
> > diff --git a/configs/ls1088aqds_sdcard_ifc_defconfig
> > b/configs/ls1088aqds_sdcard_ifc_defconfig
> > index 815ea5ce4a..a4c6b27a3d 100644
> > --- a/configs/ls1088aqds_sdcard_ifc_defconfig
> > +++ b/configs/ls1088aqds_sdcard_ifc_defconfig
> > @@ -67,3 +67,4 @@ CONFIG_USB_XHCI_DWC3=y
> CONFIG_USB_DWC3=y
> > CONFIG_USB_STORAGE=y  CONFIG_USB_GADGET=y
> > +CONFIG_GIC_V3_ITS=y
> > diff --git a/configs/ls1088aqds_sdcard_qspi_defconfig
> > b/configs/ls1088aqds_sdcard_qspi_defconfig
> > index 275dbf9e0e..435f704eb3 100644
> > --- a/configs/ls1088aqds_sdcard_qspi_defconfig
> > +++ b/configs/ls1088aqds_sdcard_qspi_defconfig
> > @@ -70,3 +70,4 @@ CONFIG_USB_XHCI_HCD=y
> CONFIG_USB_XHCI_DWC3=y
> > CONFIG_USB_DWC3=y  CONFIG_USB_GADGET=y
> > +CONFIG_GIC_V3_ITS=y
> > diff --git a/configs/ls1088aqds_tfa_defconfig
> > b/configs/ls1088aqds_tfa_defconfig
> > index 1144cba983..5c2a699849 100644
> > --- a/configs/ls1088aqds_tfa_defconfig
> > +++ b/configs/ls1088aqds_tfa_defconfig
> > @@ -78,3 +78,4 @@ CONFIG_USB_XHCI_DWC3=y
> CONFIG_USB_DWC3=y
> > CONFIG_USB_GADGET=y  CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
> > +CONFIG_GIC_V3_ITS=y
> > diff --git a/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig
> > b/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig
> > index 3f654e2e1d..89e9a46c4f 100644
> > --- a/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig
> > +++ b/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig
> > @@ -61,3 +61,4 @@ CONFIG_USB_GADGET=y
> >  CONFIG_RSA=y
> >  CONFIG_RSA_SOFTWARE_EXP=y
> >  CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
> > +CONFIG_GIC_V3_ITS=y
> > diff --git a/configs/ls1088ardb_qspi_defconfig
> > b/configs/ls1088ardb_qspi_defconfig
> > index 935d76b4be..3c2fda4593 100644
> > --- a/configs/ls1088ardb_qspi_defconfig
> > +++ b/configs/ls1088ardb_qspi_defconfig
> > @@ -62,3 +62,4 @@ CONFIG_USB_XHCI_DWC3=y
> CONFIG_USB_DWC3=y
> > CONFIG_USB_GADGET=y  CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
> > +CONFIG_GIC_V3_ITS=y
> > diff --git a/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig
> > b/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig
> > index 562cbdd3ab..da41ccaa29 100644
> > --- a/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig
> > +++ b/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig
> > @@ -70,3 +70,4 @@ CONFIG_USB_XHCI_DWC3=y
> CONFIG_USB_DWC3=y
> > CONFIG_RSA=y  CONFIG_SPL_RSA=y
> > +CONFIG_GIC_V3_ITS=y
> > diff --git a/configs/ls1088ardb_sdcard_qspi_defconfig
> > b/configs/ls1088ardb_sdcard_qspi_defconfig
> > index 1e6fdceca1..0483e5d8d2 100644
> > --- a/configs/ls1088ardb_sdcard_qspi_defconfig
> > +++ b/configs/ls1088ardb_sdcard_qspi_defconfig
> > @@ -71,3 +71,4 @@ CONFIG_USB_XHCI_HCD=y
> CONFIG_USB_XHCI_DWC3=y
> > CONFIG_USB_DWC3=y  CONFIG_USB_GADGET=y
> > +CONFIG_GIC_V3_ITS=y
> > diff --git a/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig
> > b/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig
> > index 0086039e52..079e6c53fb 100644
> > --- a/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig
> > +++ b/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig
> > @@ -71,3 +71,4 @@ CONFIG_RSA=y
> >  CONFIG_SPL_RSA=y
> >  CONFIG_RSA_SOFTWARE_EXP=y
> >  CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
> > +CONFIG_GIC_V3_ITS=y
> > diff --git a/configs/ls1088ardb_tfa_defconfig
> > b/configs/ls1088ardb_tfa_defconfig
> > index a7908e95b5..e3d4b02d21 100644
> > --- a/configs/ls1088ardb_tfa_defconfig
> > +++ b/configs/ls1088ardb_tfa_defconfig
> > @@ -77,3 +77,4 @@ CONFIG_USB_ETHER_ASIX=y
> CONFIG_USB_ETHER_ASIX88179=y
> > CONFIG_USB_ETHER_RTL8152=y
> CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
> > +CONFIG_GIC_V3_ITS=y
> > --
> > 2.17.1

[PATCHv2 8/9] configs: ls1028a: Enable GIC_V3_ITS config

[Z.q. Hou]

Hi Wasim,

Thanks a lot for your review!

Regards,
Zhiqiang

> -----Original Message-----
> From: Wasim Khan <wasim.khan@nxp.com>
> Sent: 2020?4?21? 16:02
> To: Z.q. Hou <zhiqiang.hou@nxp.com>; u-boot at lists.denx.de; Priyanka Jain
> <priyanka.jain@nxp.com>; Biwen Li <biwen.li@nxp.com>
> Cc: Z.q. Hou <zhiqiang.hou@nxp.com>
> Subject: RE: [PATCHv2 8/9] configs: ls1028a: Enable GIC_V3_ITS config
> 
> 
> 
> > -----Original Message-----
> > From: U-Boot <u-boot-bounces@lists.denx.de> On Behalf Of Zhiqiang Hou
> > Sent: Tuesday, March 24, 2020 1:42 PM
> > To: u-boot at lists.denx.de; Priyanka Jain <priyanka.jain@nxp.com>; Biwen
> > Li <biwen.li@nxp.com>
> > Cc: Z.q. Hou <zhiqiang.hou@nxp.com>
> > Subject: [PATCHv2 8/9] configs: ls1028a: Enable GIC_V3_ITS config
> >
> > From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> >
> > Enable GIC_V3_ITS config to initialize the GIC redistributor tables.
> >
> > Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> 
> Reviewed-by: Wasim Khan <wasim.khan@nxp.com>
> 
> > ---
> > V2:
> >  - No change.
> >
> >  configs/ls1028aqds_tfa_SECURE_BOOT_defconfig | 1 +
> >  configs/ls1028aqds_tfa_defconfig             | 1 +
> >  configs/ls1028ardb_tfa_SECURE_BOOT_defconfig | 1 +
> >  configs/ls1028ardb_tfa_defconfig             | 1 +
> >  4 files changed, 4 insertions(+)
> >
> > diff --git a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
> > b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
> > index c5f0bd85da..92b944f426 100644
> > --- a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
> > +++ b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
> > @@ -79,3 +79,4 @@ CONFIG_WDT_SP805=y
> >  CONFIG_RSA=y
> >  CONFIG_OF_LIBFDT_OVERLAY=y
> >  CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
> > +CONFIG_GIC_V3_ITS=y
> > diff --git a/configs/ls1028aqds_tfa_defconfig
> > b/configs/ls1028aqds_tfa_defconfig
> > index 7085be77fe..66d3ee1761 100644
> > --- a/configs/ls1028aqds_tfa_defconfig
> > +++ b/configs/ls1028aqds_tfa_defconfig
> > @@ -84,3 +84,4 @@ CONFIG_WDT=y
> >  CONFIG_WDT_SP805=y
> >  CONFIG_OF_LIBFDT_OVERLAY=y
> >  CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
> > +CONFIG_GIC_V3_ITS=y
> > diff --git a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
> > b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
> > index 6fa14af6af..c999f3e6ef 100644
> > --- a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
> > +++ b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
> > @@ -76,3 +76,4 @@ CONFIG_WDT_SP805=y
> >  CONFIG_RSA=y
> >  CONFIG_OF_LIBFDT_OVERLAY=y
> >  CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
> > +CONFIG_GIC_V3_ITS=y
> > diff --git a/configs/ls1028ardb_tfa_defconfig
> > b/configs/ls1028ardb_tfa_defconfig
> > index 3ef5520969..150123bc7b 100644
> > --- a/configs/ls1028ardb_tfa_defconfig
> > +++ b/configs/ls1028ardb_tfa_defconfig
> > @@ -86,3 +86,4 @@ CONFIG_WDT=y
> >  CONFIG_WDT_SP805=y
> >  CONFIG_OF_LIBFDT_OVERLAY=y
> >  CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
> > +CONFIG_GIC_V3_ITS=y
> > --
> > 2.17.1

[PATCHv2 9/9] configs: ls208xa: Enable GIC_V3_ITS config

[Z.q. Hou]

Hi Wasim,

Thanks a lot for your review!

Regards,
Zhiqiang

> -----Original Message-----
> From: Wasim Khan <wasim.khan@nxp.com>
> Sent: 2020?4?21? 15:41
> To: Z.q. Hou <zhiqiang.hou@nxp.com>; u-boot at lists.denx.de; Priyanka Jain
> <priyanka.jain@nxp.com>; Biwen Li <biwen.li@nxp.com>
> Cc: Z.q. Hou <zhiqiang.hou@nxp.com>
> Subject: RE: [PATCHv2 9/9] configs: ls208xa: Enable GIC_V3_ITS config
> 
> 
> 
> > -----Original Message-----
> > From: U-Boot <u-boot-bounces@lists.denx.de> On Behalf Of Zhiqiang Hou
> > Sent: Tuesday, March 24, 2020 1:42 PM
> > To: u-boot at lists.denx.de; Priyanka Jain <priyanka.jain@nxp.com>; Biwen
> > Li <biwen.li@nxp.com>
> > Cc: Z.q. Hou <zhiqiang.hou@nxp.com>
> > Subject: [PATCHv2 9/9] configs: ls208xa: Enable GIC_V3_ITS config
> >
> > From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> 
> Reviewed-by: Wasim Khan <wasim.khan@nxp.com>
> 
> >
> > Enable GIC_V3_ITS config to initialize the GIC redistributor tables.
> >
> > Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> > ---
> > V2:
> >  - No change.
> >
> >  configs/ls2080aqds_SECURE_BOOT_defconfig      | 1 +
> >  configs/ls2080aqds_defconfig                  | 1 +
> >  configs/ls2080aqds_nand_defconfig             | 1 +
> >  configs/ls2080aqds_qspi_defconfig             | 1 +
> >  configs/ls2080aqds_sdcard_defconfig           | 1 +
> >  configs/ls2080ardb_SECURE_BOOT_defconfig      | 1 +
> >  configs/ls2080ardb_defconfig                  | 1 +
> >  configs/ls2080ardb_nand_defconfig             | 1 +
> >  configs/ls2081ardb_defconfig                  | 1 +
> >  configs/ls2088aqds_tfa_defconfig              | 1 +
> >  configs/ls2088ardb_qspi_SECURE_BOOT_defconfig | 1 +
> >  configs/ls2088ardb_qspi_defconfig             | 1 +
> >  configs/ls2088ardb_tfa_SECURE_BOOT_defconfig  | 1 +
> >  configs/ls2088ardb_tfa_defconfig              | 1 +
> >  14 files changed, 14 insertions(+)
> >
> > diff --git a/configs/ls2080aqds_SECURE_BOOT_defconfig
> > b/configs/ls2080aqds_SECURE_BOOT_defconfig
> > index 8a792e449a..9039b252c1 100644
> > --- a/configs/ls2080aqds_SECURE_BOOT_defconfig
> > +++ b/configs/ls2080aqds_SECURE_BOOT_defconfig
> > @@ -62,3 +62,4 @@ CONFIG_USB_XHCI_DWC3=y  CONFIG_RSA=y
> > CONFIG_RSA_SOFTWARE_EXP=y
> CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
> > +CONFIG_GIC_V3_ITS=y
> > diff --git a/configs/ls2080aqds_defconfig
> > b/configs/ls2080aqds_defconfig index
> > bc4c218c21..b14b3ca5e7 100644
> > --- a/configs/ls2080aqds_defconfig
> > +++ b/configs/ls2080aqds_defconfig
> > @@ -63,3 +63,4 @@ CONFIG_DM_USB=y
> >  CONFIG_USB_XHCI_HCD=y
> >  CONFIG_USB_XHCI_DWC3=y
> >  CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
> > +CONFIG_GIC_V3_ITS=y
> > diff --git a/configs/ls2080aqds_nand_defconfig
> > b/configs/ls2080aqds_nand_defconfig
> > index e840cbf0ef..fac2b04068 100644
> > --- a/configs/ls2080aqds_nand_defconfig
> > +++ b/configs/ls2080aqds_nand_defconfig
> > @@ -70,3 +70,4 @@ CONFIG_DM_USB=y
> >  CONFIG_USB_XHCI_HCD=y
> >  CONFIG_USB_XHCI_DWC3=y
> >  CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
> > +CONFIG_GIC_V3_ITS=y
> > diff --git a/configs/ls2080aqds_qspi_defconfig
> > b/configs/ls2080aqds_qspi_defconfig
> > index 861e652f7f..343c7675e0 100644
> > --- a/configs/ls2080aqds_qspi_defconfig
> > +++ b/configs/ls2080aqds_qspi_defconfig
> > @@ -62,3 +62,4 @@ CONFIG_DM_USB=y
> >  CONFIG_USB_XHCI_HCD=y
> >  CONFIG_USB_XHCI_DWC3=y
> >  CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
> > +CONFIG_GIC_V3_ITS=y
> > diff --git a/configs/ls2080aqds_sdcard_defconfig
> > b/configs/ls2080aqds_sdcard_defconfig
> > index 864e70d334..dd2862ffe0 100644
> > --- a/configs/ls2080aqds_sdcard_defconfig
> > +++ b/configs/ls2080aqds_sdcard_defconfig
> > @@ -69,3 +69,4 @@ CONFIG_DM_USB=y
> >  CONFIG_USB_XHCI_HCD=y
> >  CONFIG_USB_XHCI_DWC3=y
> >  CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
> > +CONFIG_GIC_V3_ITS=y
> > diff --git a/configs/ls2080ardb_SECURE_BOOT_defconfig
> > b/configs/ls2080ardb_SECURE_BOOT_defconfig
> > index 4abfc64705..743e25f7b7 100644
> > --- a/configs/ls2080ardb_SECURE_BOOT_defconfig
> > +++ b/configs/ls2080ardb_SECURE_BOOT_defconfig
> > @@ -64,3 +64,4 @@ CONFIG_USB_XHCI_DWC3=y  CONFIG_RSA=y
> > CONFIG_RSA_SOFTWARE_EXP=y
> CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
> > +CONFIG_GIC_V3_ITS=y
> > diff --git a/configs/ls2080ardb_defconfig
> > b/configs/ls2080ardb_defconfig index 0102e14ecb..e9dfc3603e 100644
> > --- a/configs/ls2080ardb_defconfig
> > +++ b/configs/ls2080ardb_defconfig
> > @@ -65,3 +65,4 @@ CONFIG_DM_USB=y
> >  CONFIG_USB_XHCI_HCD=y
> >  CONFIG_USB_XHCI_DWC3=y
> >  CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
> > +CONFIG_GIC_V3_ITS=y
> > diff --git a/configs/ls2080ardb_nand_defconfig
> > b/configs/ls2080ardb_nand_defconfig
> > index 448e0fe58d..68ec26e405 100644
> > --- a/configs/ls2080ardb_nand_defconfig
> > +++ b/configs/ls2080ardb_nand_defconfig
> > @@ -70,3 +70,4 @@ CONFIG_DM_USB=y
> >  CONFIG_USB_XHCI_HCD=y
> >  CONFIG_USB_XHCI_DWC3=y
> >  CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
> > +CONFIG_GIC_V3_ITS=y
> > diff --git a/configs/ls2081ardb_defconfig
> > b/configs/ls2081ardb_defconfig index
> > e446a1120b..4036ed94e5 100644
> > --- a/configs/ls2081ardb_defconfig
> > +++ b/configs/ls2081ardb_defconfig
> > @@ -62,3 +62,4 @@ CONFIG_DM_USB=y
> >  CONFIG_USB_XHCI_HCD=y
> >  CONFIG_USB_XHCI_DWC3=y
> >  CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
> > +CONFIG_GIC_V3_ITS=y
> > diff --git a/configs/ls2088aqds_tfa_defconfig
> > b/configs/ls2088aqds_tfa_defconfig
> > index 9f49736b4f..d3ee37cabe 100644
> > --- a/configs/ls2088aqds_tfa_defconfig
> > +++ b/configs/ls2088aqds_tfa_defconfig
> > @@ -74,3 +74,4 @@ CONFIG_DM_USB=y
> >  CONFIG_USB_XHCI_HCD=y
> >  CONFIG_USB_XHCI_DWC3=y
> >  CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
> > +CONFIG_GIC_V3_ITS=y
> > diff --git a/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig
> > b/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig
> > index ae4a6820ff..9b06bf4257 100644
> > --- a/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig
> > +++ b/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig
> > @@ -59,3 +59,4 @@ CONFIG_USB_XHCI_DWC3=y  CONFIG_RSA=y
> > CONFIG_RSA_SOFTWARE_EXP=y
> CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
> > +CONFIG_GIC_V3_ITS=y
> > diff --git a/configs/ls2088ardb_qspi_defconfig
> > b/configs/ls2088ardb_qspi_defconfig
> > index 1ad5f3b367..3203384c5b 100644
> > --- a/configs/ls2088ardb_qspi_defconfig
> > +++ b/configs/ls2088ardb_qspi_defconfig
> > @@ -63,3 +63,4 @@ CONFIG_DM_USB=y
> >  CONFIG_USB_XHCI_HCD=y
> >  CONFIG_USB_XHCI_DWC3=y
> >  CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
> > +CONFIG_GIC_V3_ITS=y
> > diff --git a/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig
> > b/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig
> > index c0d0a99c8a..41a2770bb9 100644
> > --- a/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig
> > +++ b/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig
> > @@ -76,3 +76,4 @@ CONFIG_RSA=y
> >  CONFIG_SPL_RSA=y
> >  CONFIG_RSA_SOFTWARE_EXP=y
> >  CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
> > +CONFIG_GIC_V3_ITS=y
> > diff --git a/configs/ls2088ardb_tfa_defconfig
> > b/configs/ls2088ardb_tfa_defconfig
> > index ccbaaf7a5c..b27b2c59cb 100644
> > --- a/configs/ls2088ardb_tfa_defconfig
> > +++ b/configs/ls2088ardb_tfa_defconfig
> > @@ -81,3 +81,4 @@ CONFIG_DM_USB=y
> >  CONFIG_USB_XHCI_HCD=y
> >  CONFIG_USB_XHCI_DWC3=y
> >  CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
> > +CONFIG_GIC_V3_ITS=y
> > --
> > 2.17.1