From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,MENTIONS_GIT_HOSTING,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 54249C43331 for ; Tue, 24 Mar 2020 12:42:44 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 375E42080C for ; Tue, 24 Mar 2020 12:42:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727534AbgCXMmn convert rfc822-to-8bit (ORCPT ); Tue, 24 Mar 2020 08:42:43 -0400 Received: from szxga07-in.huawei.com ([45.249.212.35]:57140 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727130AbgCXMmm (ORCPT ); Tue, 24 Mar 2020 08:42:42 -0400 Received: from DGGEMS414-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id ED1D1EFA49A6818519B0; Tue, 24 Mar 2020 20:42:19 +0800 (CST) Received: from DESKTOP-KKJBAGG.china.huawei.com (10.173.220.25) by DGGEMS414-HUB.china.huawei.com (10.3.19.214) with Microsoft SMTP Server id 14.3.487.0; Tue, 24 Mar 2020 20:42:13 +0800 From: Zhenyu Ye To: CC: , , , , , , , , , , , , , , , , Subject: Re: [RFC PATCH v3 0/4] arm64: tlb: add support for TTL field Date: Tue, 24 Mar 2020 20:41:44 +0800 Message-ID: <20200324124144.1492-1-yezhenyu2@huawei.com> X-Mailer: git-send-email 2.22.0.windows.1 In-Reply-To: <4e3d42d9-7c57-3659-edbe-1e59ca5b04ea@huawei.com> References: <4e3d42d9-7c57-3659-edbe-1e59ca5b04ea@huawei.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8BIT Content-Type: text/plain X-Originating-IP: [10.173.220.25] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Zenghui, On 2020/3/24 19:31, Zenghui Yu wrote: >Hi Zhenyu, > >On 2020/3/21 20:16, Zhenyu Ye wrote: >> -- >> ChangeList: >> v3: >> use vma->vm_flags to replace mm->context.flags. >> >> v2: >> build the patch on Marc's NV series[1]. >> >> v1: >> add support for TTL field in arm64. >> >> -- >> ARMv8.4-TTL provides the TTL field in tlbi instruction to indicate >> the level of translation table walk holding the leaf entry for the >> address that is being invalidated. Hardware can use this information >> to determine if there was a risk of splintering. >> >> Marc has provided basic support for ARM64-TTL features on his >> NV series[1] patches. NV is a large feature, however, only >> patches 62[2] and 67[3] are need by this patch set. >> ** You only need read those two patches before review this patch. ** > >It'd be good if you can put the whole thing into a series, otherwise >people will have difficulty when reviewing and testing it... > >I haven't tracked the previous versions. If Marc is OK to share the >two patches below [2][3], I'd suggest you to pick them up, add them >in your series, rebase on top of mainline and resend it. > > >Thanks, >Zenghui > Thanks for your review. I'd take your suggestion and resend a new set right now. Thanks, Zhenyu >> >> Some of this patch depends on a feature powered by @Will Deacon >> two years ago, which tracking the level of page tables in mm_gather. >> See more in commit a6d60245. >> >> [1] git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git kvm-arm64/nv-5.6-rc1 >> [2] https://lore.kernel.org/linux-arm-kernel/20200211174938.27809-63-maz@kernel.org/ >> [3] https://lore.kernel.org/linux-arm-kernel/20200211174938.27809-68-maz@kernel.org/ >> >> Zhenyu Ye (4): >> arm64: Add level-hinted TLB invalidation helper to tlbi_user >> mm: Add page table level flags to vm_flags >> arm64: tlb: Use translation level hint in vm_flags >> mm: Set VM_LEVEL flags in some tlb_flush functions >> >> arch/arm64/include/asm/mmu.h | 2 ++ >> arch/arm64/include/asm/tlb.h | 12 +++++++++ >> arch/arm64/include/asm/tlbflush.h | 44 ++++++++++++++++++++++++++----- >> arch/arm64/mm/hugetlbpage.c | 4 +-- >> arch/arm64/mm/mmu.c | 14 ++++++++++ >> include/asm-generic/pgtable.h | 16 +++++++++-- >> include/linux/mm.h | 10 +++++++ >> include/trace/events/mmflags.h | 15 ++++++++++- >> mm/huge_memory.c | 8 +++++- >> 9 files changed, 113 insertions(+), 12 deletions(-) >> > From mboxrd@z Thu Jan 1 00:00:00 1970 From: Zhenyu Ye Subject: Re: [RFC PATCH v3 0/4] arm64: tlb: add support for TTL field Date: Tue, 24 Mar 2020 20:41:44 +0800 Message-ID: <20200324124144.1492-1-yezhenyu2@huawei.com> References: <4e3d42d9-7c57-3659-edbe-1e59ca5b04ea@huawei.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <4e3d42d9-7c57-3659-edbe-1e59ca5b04ea@huawei.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane-mx.org@lists.infradead.org To: yuzenghui@huawei.com Cc: linux-arch@vger.kernel.org, mark.rutland@arm.com, catalin.marinas@arm.com, arm@kernel.org, yezhenyu2@huawei.com, aneesh.kumar@linux.ibm.com, linux-kernel@vger.kernel.org, xiexiangyou@huawei.com, steven.price@arm.com, zhangshaokun@hisilicon.com, linux-mm@kvack.org, broonie@kernel.org, maz@kernel.org, prime.zeng@hisilicon.com, guohanjun@huawei.com, will@kernel.org, linux-arm-kernel@lists.infradead.org List-Id: linux-arch.vger.kernel.org Hi Zenghui, On 2020/3/24 19:31, Zenghui Yu wrote: >Hi Zhenyu, > >On 2020/3/21 20:16, Zhenyu Ye wrote: >> -- >> ChangeList: >> v3: >> use vma->vm_flags to replace mm->context.flags. >> >> v2: >> build the patch on Marc's NV series[1]. >> >> v1: >> add support for TTL field in arm64. >> >> -- >> ARMv8.4-TTL provides the TTL field in tlbi instruction to indicate >> the level of translation table walk holding the leaf entry for the >> address that is being invalidated. Hardware can use this information >> to determine if there was a risk of splintering. >> >> Marc has provided basic support for ARM64-TTL features on his >> NV series[1] patches. NV is a large feature, however, only >> patches 62[2] and 67[3] are need by this patch set. >> ** You only need read those two patches before review this patch. ** > >It'd be good if you can put the whole thing into a series, otherwise >people will have difficulty when reviewing and testing it... > >I haven't tracked the previous versions. If Marc is OK to share the >two patches below [2][3], I'd suggest you to pick them up, add them >in your series, rebase on top of mainline and resend it. > > >Thanks, >Zenghui > Thanks for your review. I'd take your suggestion and resend a new set right now. Thanks, Zhenyu >> >> Some of this patch depends on a feature powered by @Will Deacon >> two years ago, which tracking the level of page tables in mm_gather. >> See more in commit a6d60245. >> >> [1] git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git kvm-arm64/nv-5.6-rc1 >> [2] https://lore.kernel.org/linux-arm-kernel/20200211174938.27809-63-maz@kernel.org/ >> [3] https://lore.kernel.org/linux-arm-kernel/20200211174938.27809-68-maz@kernel.org/ >> >> Zhenyu Ye (4): >> arm64: Add level-hinted TLB invalidation helper to tlbi_user >> mm: Add page table level flags to vm_flags >> arm64: tlb: Use translation level hint in vm_flags >> mm: Set VM_LEVEL flags in some tlb_flush functions >> >> arch/arm64/include/asm/mmu.h | 2 ++ >> arch/arm64/include/asm/tlb.h | 12 +++++++++ >> arch/arm64/include/asm/tlbflush.h | 44 ++++++++++++++++++++++++++----- >> arch/arm64/mm/hugetlbpage.c | 4 +-- >> arch/arm64/mm/mmu.c | 14 ++++++++++ >> include/asm-generic/pgtable.h | 16 +++++++++-- >> include/linux/mm.h | 10 +++++++ >> include/trace/events/mmflags.h | 15 ++++++++++- >> mm/huge_memory.c | 8 +++++- >> 9 files changed, 113 insertions(+), 12 deletions(-) >> > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from szxga07-in.huawei.com ([45.249.212.35]:57140 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727130AbgCXMmm (ORCPT ); Tue, 24 Mar 2020 08:42:42 -0400 From: Zhenyu Ye Subject: Re: [RFC PATCH v3 0/4] arm64: tlb: add support for TTL field Date: Tue, 24 Mar 2020 20:41:44 +0800 Message-ID: <20200324124144.1492-1-yezhenyu2@huawei.com> In-Reply-To: <4e3d42d9-7c57-3659-edbe-1e59ca5b04ea@huawei.com> References: <4e3d42d9-7c57-3659-edbe-1e59ca5b04ea@huawei.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8BIT Content-Type: text/plain Sender: linux-arch-owner@vger.kernel.org List-ID: To: yuzenghui@huawei.com Cc: aneesh.kumar@linux.ibm.com, arm@kernel.org, broonie@kernel.org, catalin.marinas@arm.com, guohanjun@huawei.com, linux-arch@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mm@kvack.org, mark.rutland@arm.com, maz@kernel.org, prime.zeng@hisilicon.com, steven.price@arm.com, will@kernel.org, xiexiangyou@huawei.com, yezhenyu2@huawei.com, zhangshaokun@hisilicon.com Message-ID: <20200324124144.lFlC7tmhVpyEh0-laEHCHI2w8HP4KvThUxK0PqkoE3w@z> Hi Zenghui, On 2020/3/24 19:31, Zenghui Yu wrote: >Hi Zhenyu, > >On 2020/3/21 20:16, Zhenyu Ye wrote: >> -- >> ChangeList: >> v3: >> use vma->vm_flags to replace mm->context.flags. >> >> v2: >> build the patch on Marc's NV series[1]. >> >> v1: >> add support for TTL field in arm64. >> >> -- >> ARMv8.4-TTL provides the TTL field in tlbi instruction to indicate >> the level of translation table walk holding the leaf entry for the >> address that is being invalidated. Hardware can use this information >> to determine if there was a risk of splintering. >> >> Marc has provided basic support for ARM64-TTL features on his >> NV series[1] patches. NV is a large feature, however, only >> patches 62[2] and 67[3] are need by this patch set. >> ** You only need read those two patches before review this patch. ** > >It'd be good if you can put the whole thing into a series, otherwise >people will have difficulty when reviewing and testing it... > >I haven't tracked the previous versions. If Marc is OK to share the >two patches below [2][3], I'd suggest you to pick them up, add them >in your series, rebase on top of mainline and resend it. > > >Thanks, >Zenghui > Thanks for your review. I'd take your suggestion and resend a new set right now. Thanks, Zhenyu >> >> Some of this patch depends on a feature powered by @Will Deacon >> two years ago, which tracking the level of page tables in mm_gather. >> See more in commit a6d60245. >> >> [1] git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git kvm-arm64/nv-5.6-rc1 >> [2] https://lore.kernel.org/linux-arm-kernel/20200211174938.27809-63-maz@kernel.org/ >> [3] https://lore.kernel.org/linux-arm-kernel/20200211174938.27809-68-maz@kernel.org/ >> >> Zhenyu Ye (4): >> arm64: Add level-hinted TLB invalidation helper to tlbi_user >> mm: Add page table level flags to vm_flags >> arm64: tlb: Use translation level hint in vm_flags >> mm: Set VM_LEVEL flags in some tlb_flush functions >> >> arch/arm64/include/asm/mmu.h | 2 ++ >> arch/arm64/include/asm/tlb.h | 12 +++++++++ >> arch/arm64/include/asm/tlbflush.h | 44 ++++++++++++++++++++++++++----- >> arch/arm64/mm/hugetlbpage.c | 4 +-- >> arch/arm64/mm/mmu.c | 14 ++++++++++ >> include/asm-generic/pgtable.h | 16 +++++++++-- >> include/linux/mm.h | 10 +++++++ >> include/trace/events/mmflags.h | 15 ++++++++++- >> mm/huge_memory.c | 8 +++++- >> 9 files changed, 113 insertions(+), 12 deletions(-) >> > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,MENTIONS_GIT_HOSTING,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1B7A5C43331 for ; Tue, 24 Mar 2020 13:35:22 +0000 (UTC) Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by mail.kernel.org (Postfix) with ESMTP id 92BC3206F6 for ; Tue, 24 Mar 2020 13:35:21 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 92BC3206F6 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=huawei.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=owner-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix) id 2193D6B0005; Tue, 24 Mar 2020 09:35:21 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id 1F9826B0006; Tue, 24 Mar 2020 09:35:21 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 106246B0007; Tue, 24 Mar 2020 09:35:21 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from forelay.hostedemail.com (smtprelay0182.hostedemail.com [216.40.44.182]) by kanga.kvack.org (Postfix) with ESMTP id EA2556B0005 for ; Tue, 24 Mar 2020 09:35:20 -0400 (EDT) Received: from smtpin18.hostedemail.com (10.5.19.251.rfc1918.com [10.5.19.251]) by forelay01.hostedemail.com (Postfix) with ESMTP id CBB37180691A0 for ; Tue, 24 Mar 2020 13:35:20 +0000 (UTC) X-FDA: 76630352400.18.brick14_85dc95fa7d721 X-HE-Tag: brick14_85dc95fa7d721 X-Filterd-Recvd-Size: 4399 Received: from huawei.com (szxga07-in.huawei.com [45.249.212.35]) by imf45.hostedemail.com (Postfix) with ESMTP for ; Tue, 24 Mar 2020 13:35:19 +0000 (UTC) Received: from DGGEMS414-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id ED1D1EFA49A6818519B0; Tue, 24 Mar 2020 20:42:19 +0800 (CST) Received: from DESKTOP-KKJBAGG.china.huawei.com (10.173.220.25) by DGGEMS414-HUB.china.huawei.com (10.3.19.214) with Microsoft SMTP Server id 14.3.487.0; Tue, 24 Mar 2020 20:42:13 +0800 From: Zhenyu Ye To: CC: , , , , , , , , , , , , , , , , Subject: Re: [RFC PATCH v3 0/4] arm64: tlb: add support for TTL field Date: Tue, 24 Mar 2020 20:41:44 +0800 Message-ID: <20200324124144.1492-1-yezhenyu2@huawei.com> X-Mailer: git-send-email 2.22.0.windows.1 In-Reply-To: <4e3d42d9-7c57-3659-edbe-1e59ca5b04ea@huawei.com> References: <4e3d42d9-7c57-3659-edbe-1e59ca5b04ea@huawei.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain X-Originating-IP: [10.173.220.25] X-CFilter-Loop: Reflected X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: Hi Zenghui,=0D =0D On 2020/3/24 19:31, Zenghui Yu wrote:=0D >Hi Zhenyu,=0D >=0D >On 2020/3/21 20:16, Zhenyu Ye wrote:=0D >> --=0D >> ChangeList:=0D >> v3:=0D >> use vma->vm_flags to replace mm->context.flags.=0D >> =0D >> v2:=0D >> build the patch on Marc's NV series[1].=0D >> =0D >> v1:=0D >> add support for TTL field in arm64.=0D >> =0D >> --=0D >> ARMv8.4-TTL provides the TTL field in tlbi instruction to indicate=0D >> the level of translation table walk holding the leaf entry for the=0D >> address that is being invalidated. Hardware can use this information=0D >> to determine if there was a risk of splintering.=0D >> =0D >> Marc has provided basic support for ARM64-TTL features on his=0D >> NV series[1] patches. NV is a large feature, however, only=0D >> patches 62[2] and 67[3] are need by this patch set.=0D >> ** You only need read those two patches before review this patch. **=0D >=0D >It'd be good if you can put the whole thing into a series, otherwise=0D >people will have difficulty when reviewing and testing it...=0D >=0D >I haven't tracked the previous versions. If Marc is OK to share the=0D >two patches below [2][3], I'd suggest you to pick them up, add them=0D >in your series, rebase on top of mainline and resend it.=0D >=0D >=0D >Thanks,=0D >Zenghui=0D >=0D =0D Thanks for your review. I'd take your suggestion and resend a new set=0D right now.=0D =0D Thanks,=0D Zhenyu=0D =0D >> =0D >> Some of this patch depends on a feature powered by @Will Deacon=0D >> two years ago, which tracking the level of page tables in mm_gather.=0D >> See more in commit a6d60245.=0D >> =0D >> [1] git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git = kvm-arm64/nv-5.6-rc1=0D >> [2] https://lore.kernel.org/linux-arm-kernel/20200211174938.27809-63-maz= @kernel.org/=0D >> [3] https://lore.kernel.org/linux-arm-kernel/20200211174938.27809-68-maz= @kernel.org/=0D >> =0D >> Zhenyu Ye (4):=0D >> arm64: Add level-hinted TLB invalidation helper to tlbi_user=0D >> mm: Add page table level flags to vm_flags=0D >> arm64: tlb: Use translation level hint in vm_flags=0D >> mm: Set VM_LEVEL flags in some tlb_flush functions=0D >> =0D >> arch/arm64/include/asm/mmu.h | 2 ++=0D >> arch/arm64/include/asm/tlb.h | 12 +++++++++=0D >> arch/arm64/include/asm/tlbflush.h | 44 ++++++++++++++++++++++++++-----= =0D >> arch/arm64/mm/hugetlbpage.c | 4 +--=0D >> arch/arm64/mm/mmu.c | 14 ++++++++++=0D >> include/asm-generic/pgtable.h | 16 +++++++++--=0D >> include/linux/mm.h | 10 +++++++=0D >> include/trace/events/mmflags.h | 15 ++++++++++-=0D >> mm/huge_memory.c | 8 +++++-=0D >> 9 files changed, 113 insertions(+), 12 deletions(-)=0D >> =0D >= From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.8 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, MENTIONS_GIT_HOSTING,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BAC50C4332B for ; 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Tue, 24 Mar 2020 20:42:13 +0800 From: Zhenyu Ye To: Subject: Re: [RFC PATCH v3 0/4] arm64: tlb: add support for TTL field Date: Tue, 24 Mar 2020 20:41:44 +0800 Message-ID: <20200324124144.1492-1-yezhenyu2@huawei.com> X-Mailer: git-send-email 2.22.0.windows.1 In-Reply-To: <4e3d42d9-7c57-3659-edbe-1e59ca5b04ea@huawei.com> References: <4e3d42d9-7c57-3659-edbe-1e59ca5b04ea@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.173.220.25] X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200324_054233_091989_AC971326 X-CRM114-Status: GOOD ( 10.98 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arch@vger.kernel.org, mark.rutland@arm.com, catalin.marinas@arm.com, arm@kernel.org, yezhenyu2@huawei.com, aneesh.kumar@linux.ibm.com, linux-kernel@vger.kernel.org, xiexiangyou@huawei.com, steven.price@arm.com, zhangshaokun@hisilicon.com, linux-mm@kvack.org, broonie@kernel.org, maz@kernel.org, prime.zeng@hisilicon.com, guohanjun@huawei.com, will@kernel.org, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Zenghui, On 2020/3/24 19:31, Zenghui Yu wrote: >Hi Zhenyu, > >On 2020/3/21 20:16, Zhenyu Ye wrote: >> -- >> ChangeList: >> v3: >> use vma->vm_flags to replace mm->context.flags. >> >> v2: >> build the patch on Marc's NV series[1]. >> >> v1: >> add support for TTL field in arm64. >> >> -- >> ARMv8.4-TTL provides the TTL field in tlbi instruction to indicate >> the level of translation table walk holding the leaf entry for the >> address that is being invalidated. Hardware can use this information >> to determine if there was a risk of splintering. >> >> Marc has provided basic support for ARM64-TTL features on his >> NV series[1] patches. NV is a large feature, however, only >> patches 62[2] and 67[3] are need by this patch set. >> ** You only need read those two patches before review this patch. ** > >It'd be good if you can put the whole thing into a series, otherwise >people will have difficulty when reviewing and testing it... > >I haven't tracked the previous versions. If Marc is OK to share the >two patches below [2][3], I'd suggest you to pick them up, add them >in your series, rebase on top of mainline and resend it. > > >Thanks, >Zenghui > Thanks for your review. I'd take your suggestion and resend a new set right now. Thanks, Zhenyu >> >> Some of this patch depends on a feature powered by @Will Deacon >> two years ago, which tracking the level of page tables in mm_gather. >> See more in commit a6d60245. >> >> [1] git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git kvm-arm64/nv-5.6-rc1 >> [2] https://lore.kernel.org/linux-arm-kernel/20200211174938.27809-63-maz@kernel.org/ >> [3] https://lore.kernel.org/linux-arm-kernel/20200211174938.27809-68-maz@kernel.org/ >> >> Zhenyu Ye (4): >> arm64: Add level-hinted TLB invalidation helper to tlbi_user >> mm: Add page table level flags to vm_flags >> arm64: tlb: Use translation level hint in vm_flags >> mm: Set VM_LEVEL flags in some tlb_flush functions >> >> arch/arm64/include/asm/mmu.h | 2 ++ >> arch/arm64/include/asm/tlb.h | 12 +++++++++ >> arch/arm64/include/asm/tlbflush.h | 44 ++++++++++++++++++++++++++----- >> arch/arm64/mm/hugetlbpage.c | 4 +-- >> arch/arm64/mm/mmu.c | 14 ++++++++++ >> include/asm-generic/pgtable.h | 16 +++++++++-- >> include/linux/mm.h | 10 +++++++ >> include/trace/events/mmflags.h | 15 ++++++++++- >> mm/huge_memory.c | 8 +++++- >> 9 files changed, 113 insertions(+), 12 deletions(-) >> > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel