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Message-ID: <20200330222551.GA22743@ashkalra_ubuntu_server> References: <20191209231346.5602-1-Ashish.Kalra@amd.com> <20191220015245.GA7010@localhost.localdomain> <20200121200947.GA24884@ashkalra_ubuntu_server> <20200121205403.GC75374@Konrads-MacBook-Pro.local> <20200124230008.GA1565@ashkalra_ubuntu_server> <20200204193500.GA15564@ashkalra_ubuntu_server> <20200303170353.GC31627@char.us.oracle.com> Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20200303170353.GC31627@char.us.oracle.com> User-Agent: Mutt/1.9.4 (2018-02-28) X-ClientProxiedBy: DM6PR02CA0040.namprd02.prod.outlook.com (2603:10b6:5:177::17) To DM5PR12MB1386.namprd12.prod.outlook.com (2603:10b6:3:77::9) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from ashkalra_ubuntu_server (165.204.77.1) by DM6PR02CA0040.namprd02.prod.outlook.com (2603:10b6:5:177::17) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2856.18 via Frontend Transport; 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X-Microsoft-Antispam-Message-Info: V1eB7G48QnrtsRJcDuk9F12pAvZdUr3SiHJH+k0u1Jj+3v17+jB920DPTfx5RDvYe4EKPLcRSC4bvJQftngH6TS5KeCaNbeRg5tpOKGMzI0nPPH9GYG04A7sJJjVh4L8R7DDznNWR9v0ly/XoKlWpemISvcS9553hd6Qv3zFWt+BAk7R54B5vTBYCcTqG4gwCC53ac9+TM232gx6VQW04LPwIcd5dVe7rS/urSLie6YKPnvPnLQl5vipU9LFa2R1oXmNFDSpyqGrJeNsF6Uhw8cGh4Z8zZJ+sjd0oHdY/lQlzdllpkUqT1FaGGnz2N+bYv0rv6WFoyBCCA1RqyRG1AgVzYn7xiqwkJqRR2wyn5u/koUCRUlj3i3phcvu4g9p1+rH2qVLyqtSpJGXB5kCWbWUaTOAkf0Unz9WUdsdhKi7NwINohAHuksF5jgAQvk2 X-MS-Exchange-AntiSpam-MessageData: jFZUvw8CreeiIy9zj2r7I7MqNB/3zFI5ncg28de0/HhpBep58lvlaV1iw8f0LoKAhr4ieJo7rssJiHUDObZwTgKIMtIPDEYMNxzN3me52ri1Cj0lYoxQfYdJvf8/gL+AlLlYopHtn2ik1JzCKknRLQ== X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: 46578906-bf3a-4ed1-1fec-08d7d4f951fc X-MS-Exchange-CrossTenant-OriginalArrivalTime: 30 Mar 2020 22:25:58.6116 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: LnJbc6XInHonQTJ3JygCS0jLQj8wkU+CWOEDzPRYqWLRW36wzEwEjXgzRiXUHfh/zJn5FObg3NyesbyCeTqx1w== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM5PR12MB1529 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hello Konrad, On Tue, Mar 03, 2020 at 12:03:53PM -0500, Konrad Rzeszutek Wilk wrote: > On Tue, Feb 04, 2020 at 07:35:00PM +0000, Ashish Kalra wrote: > > Hello Konrad, > > > > Looking fwd. to your feedback regarding support of other memory > > encryption architectures such as Power, S390, etc. > > > > Thanks, > > Ashish > > > > On Fri, Jan 24, 2020 at 11:00:08PM +0000, Ashish Kalra wrote: > > > On Tue, Jan 21, 2020 at 03:54:03PM -0500, Konrad Rzeszutek Wilk wrote: > > > > > > > > > > Additional memory calculations based on # of PCI devices and > > > > > their memory ranges will make it more complicated with so > > > > > many other permutations and combinations to explore, it is > > > > > essential to keep this patch as simple as possible by > > > > > adjusting the bounce buffer size simply by determining it > > > > > from the amount of provisioned guest memory. > > > >> > > > >> Please rework the patch to: > > > >> > > > >> - Use a log solution instead of the multiplication. > > > >> Feel free to cap it at a sensible value. > > > > > > Ok. > > > > > > >> > > > >> - Also the code depends on SWIOTLB calling in to the > > > >> adjust_swiotlb_default_size which looks wrong. > > > >> > > > >> You should not adjust io_tlb_nslabs from swiotlb_size_or_default. > > > > > > >> That function's purpose is to report a value. > > > >> > > > >> - Make io_tlb_nslabs be visible outside of the SWIOTLB code. > > > >> > > > >> - Can you utilize the IOMMU_INIT APIs and have your own detect which would > > > >> modify the io_tlb_nslabs (and set swiotbl=1?). > > > > > > This seems to be a nice option, but then IOMMU_INIT APIs are > > > x86-specific and this swiotlb buffer size adjustment is also needed > > > for other memory encryption architectures like Power, S390, etc. > > Oh dear. That I hadn't considered. > > > > > > >> > > > >> Actually you seem to be piggybacking on pci_swiotlb_detect_4gb - so > > > >> perhaps add in this code ? Albeit it really should be in it's own > > > >> file, not in arch/x86/kernel/pci-swiotlb.c > > > > > > Actually, we piggyback on pci_swiotlb_detect_override which sets > > > swiotlb=1 as x86_64_start_kernel() and invocation of sme_early_init() > > > forces swiotlb on, but again this is all x86 architecture specific. > > Then it looks like the best bet is to do it from within swiotlb_init? > We really can't do it from swiotlb_size_or_default - that function > should just return a value and nothing else. > Actually, we need to do it in swiotlb_size_or_default() as this gets called by reserve_crashkernel_low() in arch/x86/kernel/setup.c and used to reserve low crashkernel memory. If we adjust swiotlb size later in swiotlb_init() which gets called later than reserve_crashkernel_low(), then any swiotlb size changes/expansion will conflict/overlap with the low memory reserved for crashkernel. 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charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: iommu-bounces@lists.linux-foundation.org Sender: "iommu" Hello Konrad, On Tue, Mar 03, 2020 at 12:03:53PM -0500, Konrad Rzeszutek Wilk wrote: > On Tue, Feb 04, 2020 at 07:35:00PM +0000, Ashish Kalra wrote: > > Hello Konrad, > > > > Looking fwd. to your feedback regarding support of other memory > > encryption architectures such as Power, S390, etc. > > > > Thanks, > > Ashish > > > > On Fri, Jan 24, 2020 at 11:00:08PM +0000, Ashish Kalra wrote: > > > On Tue, Jan 21, 2020 at 03:54:03PM -0500, Konrad Rzeszutek Wilk wrote: > > > > > > > > > > Additional memory calculations based on # of PCI devices and > > > > > their memory ranges will make it more complicated with so > > > > > many other permutations and combinations to explore, it is > > > > > essential to keep this patch as simple as possible by > > > > > adjusting the bounce buffer size simply by determining it > > > > > from the amount of provisioned guest memory. > > > >> > > > >> Please rework the patch to: > > > >> > > > >> - Use a log solution instead of the multiplication. > > > >> Feel free to cap it at a sensible value. > > > > > > Ok. > > > > > > >> > > > >> - Also the code depends on SWIOTLB calling in to the > > > >> adjust_swiotlb_default_size which looks wrong. > > > >> > > > >> You should not adjust io_tlb_nslabs from swiotlb_size_or_default. > > > > > > >> That function's purpose is to report a value. > > > >> > > > >> - Make io_tlb_nslabs be visible outside of the SWIOTLB code. > > > >> > > > >> - Can you utilize the IOMMU_INIT APIs and have your own detect which would > > > >> modify the io_tlb_nslabs (and set swiotbl=1?). > > > > > > This seems to be a nice option, but then IOMMU_INIT APIs are > > > x86-specific and this swiotlb buffer size adjustment is also needed > > > for other memory encryption architectures like Power, S390, etc. > > Oh dear. That I hadn't considered. > > > > > > >> > > > >> Actually you seem to be piggybacking on pci_swiotlb_detect_4gb - so > > > >> perhaps add in this code ? Albeit it really should be in it's own > > > >> file, not in arch/x86/kernel/pci-swiotlb.c > > > > > > Actually, we piggyback on pci_swiotlb_detect_override which sets > > > swiotlb=1 as x86_64_start_kernel() and invocation of sme_early_init() > > > forces swiotlb on, but again this is all x86 architecture specific. > > Then it looks like the best bet is to do it from within swiotlb_init? > We really can't do it from swiotlb_size_or_default - that function > should just return a value and nothing else. > Actually, we need to do it in swiotlb_size_or_default() as this gets called by reserve_crashkernel_low() in arch/x86/kernel/setup.c and used to reserve low crashkernel memory. If we adjust swiotlb size later in swiotlb_init() which gets called later than reserve_crashkernel_low(), then any swiotlb size changes/expansion will conflict/overlap with the low memory reserved for crashkernel. Thanks, Ashish _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu