From mboxrd@z Thu Jan 1 00:00:00 1970 From: Thierry Reding Date: Wed, 1 Apr 2020 17:19:31 +0200 Subject: [PATCH 3/3] ARM: tegra: p2371-2180: add I2C nodes to DT In-Reply-To: References: <1585261245-1740-1-git-send-email-tomcwarren3959@gmail.com> <1585261245-1740-4-git-send-email-tomcwarren3959@gmail.com> Message-ID: <20200401151931.GA2970936@ulmo> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Wed, Apr 01, 2020 at 02:03:09AM +0200, Tom Warren wrote: > -----Original Message----- > From: Peter Robinson > Sent: Tuesday, March 31, 2020 3:54 AM > To: tomcwarren3959 at gmail.com > Cc: u-boot at lists.denx.de; Stephen Warren ; Thierry Reding ; Jonathan Hunter ; Tom Warren ; Vishruth Jain > Subject: Re: [PATCH 3/3] ARM: tegra: p2371-2180: add I2C nodes to DT > > External email: Use caution opening links or attachments > > > > From: Stephen Warren > > > > This adds to the DT the I2C controllers that connect to the board ID > > EEPROM, camera board EEPROM, etc. With this change, you can now probe > > all I2C devices on a TX1 board. > > > > Signed-off-by: Tom Warren > > --- > > arch/arm/dts/tegra210-p2371-2180.dts | 18 ++++++++++++++++++ > > 1 file changed, 18 insertions(+) > > > > diff --git a/arch/arm/dts/tegra210-p2371-2180.dts > > b/arch/arm/dts/tegra210-p2371-2180.dts > > index c2f497c..d982b5f 100644 > > --- a/arch/arm/dts/tegra210-p2371-2180.dts > > +++ b/arch/arm/dts/tegra210-p2371-2180.dts > > @@ -12,6 +12,9 @@ > > > > aliases { > > i2c0 = "/i2c at 7000d000"; > > + i2c2 = "/i2c at 7000c400"; > > + i2c3 = "/i2c at 7000c500"; > > + i2c5 = "/i2c at 546c0c00"; > > I don't think this is correct, it doesn't show up in U-Boot with the > "i2c bus" command where the others do, looking in the tegra210.dtsi it > looks like it should be i2c at 546c0000? > [Tom] That I2C address is working in downstream (L4T) TX1 U-Boot. The > VI_I2C controller is a little weird, it's normal I2C registers are > offset from base by 0xC00. A different driver is needed, but I > haven't posted it yet upstream. I should probably drop if from the > DTS for now until I post the VI_I2C driver. I think the problem here is that the upstream U-Boot device tree doesn't contain an i2c at 546c0c00 node. Instead it has i2c at 546c0000, which we also have in the upstream kernel. My recollection is that that's also the address listed in the Tegra210 system address map of the TRM and there are some registers before the regular I2C interface at offset 0xc00. I've been carrying a patch against the upstream Linux I2C controller driver to special-case the VI/I2C to always add that 0xc00 offset when accessing registers, which allows us to reuse the existing driver and at the same time keeps all registers mapped so we can also access the VI/I2C specific registers. My recollection is that the U-Boot driver is fairly similar to the Linux driver, so I suspect something similar could be done. Thierry -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 833 bytes Desc: not available URL: