From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.2 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E0BB1C2BA2B for ; Thu, 9 Apr 2020 10:58:42 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id B1F2620BED for ; Thu, 9 Apr 2020 10:58:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725972AbgDIK6l (ORCPT ); Thu, 9 Apr 2020 06:58:41 -0400 Received: from foss.arm.com ([217.140.110.172]:48606 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726536AbgDIK6l (ORCPT ); Thu, 9 Apr 2020 06:58:41 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 9BFEE31B; Thu, 9 Apr 2020 03:58:41 -0700 (PDT) Received: from bogus (unknown [10.37.12.63]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id D94D33F73D; Thu, 9 Apr 2020 03:58:35 -0700 (PDT) Date: Thu, 9 Apr 2020 11:58:32 +0100 From: Sudeep Holla To: Jiaxun Yang Cc: linux-mips@vger.kernel.org, Thomas Bogendoerfer , Huacai Chen , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Florian Fainelli , Robert Richter , Greg Kroah-Hartman , "Rafael J. Wysocki" , Thomas Gleixner , Jason Cooper , Marc Zyngier , Paul Burton , Allison Randal , Enrico Weigelt , Kate Stewart , Vladimir Kondratiev , Richard Fontana , Paul Cercueil , Zhou Yanjie , =?UTF-8?B?5ZGo55Cw5p2wIChaaG91IFlhbmppZSk=?=@bogus Subject: Re: [PATCH 05/12] MIPS: Switch to arch_topology Message-ID: <20200409105832.GF25948@bogus> References: <20200408113505.2528103-1-jiaxun.yang@flygoat.com> <20200408113505.2528103-6-jiaxun.yang@flygoat.com> <20200409103121.GD25948@bogus> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: User-Agent: Mutt/1.9.4 (2018-02-28) Sender: linux-mips-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org On Thu, Apr 09, 2020 at 06:35:21PM +0800, Jiaxun Yang wrote: > > > 于 2020年4月9日 GMT+08:00 下午6:31:21, Sudeep Holla 写到: > >On Wed, Apr 08, 2020 at 07:34:15PM +0800, Jiaxun Yang wrote: > >> Previously, MIPS is using self-defined "globalnumber" in struct > >> mips_cpuinfo to store topology information. However, it's not > >friendly > >> to DeviceTree based systems and lack of cpu_capacity related feature > >> which can take advantage of multi-cluster system. > >> > >> Here, we enabled arch_topology for MIPS and adapted some functions > >> to fit arch_topology structure. > >> Also, we implmented smp_store_cpu_info to probe CPU's topology > >information > >> by "globalnumber" registers in VP ASE or Ebase.CPUNum for legacy > >systems. > >> > >> Signed-off-by: Jiaxun Yang > >> --- > >> arch/mips/Kconfig | 1 + > >> arch/mips/include/asm/cpu-info.h | 49 ---------------------------- > >> arch/mips/include/asm/smp.h | 2 -- > >> arch/mips/include/asm/topology.h | 48 +++++++++++++++++++++++++--- > >> arch/mips/kernel/cpu-probe.c | 43 ------------------------- > >> arch/mips/kernel/setup.c | 1 + > >> arch/mips/kernel/smp.c | 55 > >++++---------------------------- > >> arch/mips/kernel/topology.c | 42 ++++++++++++++++++++++++ > >> 8 files changed, 93 insertions(+), 148 deletions(-) > >> > > > >[...] > > > >> diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c > >> index 8a418783a6bb..b9fefc5dc702 100644 > >> --- a/arch/mips/kernel/setup.c > >> +++ b/arch/mips/kernel/setup.c > >> @@ -784,6 +784,7 @@ void __init setup_arch(char **cmdline_p) > >> dmi_setup(); > >> > >> resource_init(); > >> + init_cpu_topology(); > >> plat_smp_setup(); > >> > > > >Continuing my reply on previous patch, I see possible_cpu_mask being > >set up in plat_smp_setup. Why not reverse the order above. Further I > >see > >that the logical->physical CPU mapping is done in plat_smp_setup which > >is required to store/save any topology information. > > Some plat_smp_setup is touching topology so we must reset before that. > Can you elaborate on this ? What gets overwritten if init_cpu_topology is called after plat_smp_setup. I don't see any plat_smp_setup setting up sibling masks. -- Regards, Sudeep