From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail.linutronix.de (193.142.43.55:993) by crypto-ml.lab.linutronix.de with IMAP4-SSL for ; 14 Apr 2020 20:02:48 -0000 Received: from us-smtp-delivery-1.mimecast.com ([207.211.31.120] helo=us-smtp-1.mimecast.com) by Galois.linutronix.de with esmtps (TLS1.2:DHE_RSA_AES_256_CBC_SHA256:256) (Exim 4.80) (envelope-from ) id 1jORlf-0002zD-7z for speck@linutronix.de; Tue, 14 Apr 2020 22:02:47 +0200 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 6E5C91926DA1 for ; Tue, 14 Apr 2020 20:02:40 +0000 (UTC) Received: from treble (ovpn-116-146.rdu2.redhat.com [10.10.116.146]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 04F235C1B2 for ; Tue, 14 Apr 2020 20:02:39 +0000 (UTC) Date: Tue, 14 Apr 2020 15:02:37 -0500 From: Josh Poimboeuf Subject: [MODERATED] Re: [PATCH 3/4] V7 more sampling fun 3 Message-ID: <20200414200237.useaxfticfc4skqm@treble> References: =?utf-8?q?=3C8fbdb?= =?utf-8?q?e0dbc619f8c9d5f4cf7a1d2d4c8642f2ff3=2E1586801416=2Egit=2Emgro?= =?utf-8?q?ss=40linux=2Eintel=2Ecom=3E?= MIME-Version: 1.0 In-Reply-To: =?utf-8?q?=3C8fbdbe0dbc619f8c9d5f4cf7a1d2d4c8642f2ff3=2E15868?= =?utf-8?q?01416=2Egit=2Emgross=40linux=2Eintel=2Ecom=3E?= Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit To: speck@linutronix.de List-ID: On Thu, Jan 16, 2020 at 02:16:07PM -0800, speck for mark gross wrote: > +enum srbds_mitigations { > + SRBDS_MITIGATION_OFF, > + SRBDS_MITIGATION_UCODE_NEEDED, > + SRBDS_MITIGATION_FULL, > + SRBDS_MITIGATION_NOT_AFFECTED_TSX_OFF, > + SRBDS_MITIGATION_HYPERVISOR, > +}; > + > +static enum srbds_mitigations srbds_mitigation __ro_after_init = SRBDS_MITIGATION_FULL; > +static const char * const srbds_strings[] = { > + [SRBDS_MITIGATION_OFF] = "Vulnerable", > + [SRBDS_MITIGATION_UCODE_NEEDED] = "Vulnerable: No microcode", > + [SRBDS_MITIGATION_FULL] = "Mitigated: Microcode", s/Mitigated/Mitigation/ for consistency with other issues > + [SRBDS_MITIGATION_NOT_AFFECTED_TSX_OFF] = "Not affected (TSX disabled)", The CPU *is* affected, it just happens to be mitigated, right? Shouldn't it be SRBDS_MITIGATION_TSX_OFF and "Mitigation: TSX disabled"? > @@ -1142,6 +1166,34 @@ static void __init cpu_set_bug_bits(struct cpuinfo_x86 *c) > (ia32_cap & ARCH_CAP_TSX_CTRL_MSR))) > setup_force_cpu_bug(X86_BUG_TAA); > > + if (cpu_matches(SRBDS|SRBDS_IF_TSX, cpu_vuln_blacklist)) { > + /* > + * Some parts on the list don't have RDRAND or RDSEED. Make sure > + * they show as "Not affected". > + */ > + if (!cpu_has(c, X86_FEATURE_RDRAND) && > + !cpu_has(c, X86_FEATURE_RDSEED)) > + goto srbds_not_affected; > + /* > + * Parts in the blacklist that enumerate MDS_NO are only > + * vulneralbe if TSX can be used. To handle cases where TSX "vulnerable" > + * gets fused off check to see if TSX is fused off and thus not > + * affected. > + * > + * When running with up to day microcode TSX_CTRL is only "up-to-date" > + * enumerated on parts where TSX fused on. where TSX *is* fused on. > + * When running with microcode not supporting TSX_CTRL we check > + * for RTM Missing period > + */ > + if ((ia32_cap & ARCH_CAP_MDS_NO) && > + !((ia32_cap & ARCH_CAP_TSX_CTRL_MSR) || > + cpu_has(c, X86_FEATURE_RTM))) > + goto srbds_not_affected; > + > + setup_force_cpu_bug(X86_BUG_SRBDS); > + } > +srbds_not_affected: > + > if (cpu_matches(NO_MELTDOWN, cpu_vuln_whitelist)) > return; I'm thinking it would be more readable to have the newline between the bracket and the 'if', instead of between the label and the 'if'. -- Josh