From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 83A47C2BB55 for ; Thu, 16 Apr 2020 13:59:24 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5695122203 for ; Thu, 16 Apr 2020 13:59:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1587045564; bh=aXAtVK+3azr1DoaYGy80vAEztDOR8O4VG7NpPABhYWg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=z/L9kn4S5zOiQltjbujpNBRgXBGg5FMsQn9CzOHw5ORTGkj22dPdplh7i7r1Z1NEu K8hNXWdOKRxndoWzeiDKqTDWMA40w8723yPhv+0pkce0qjgu/3nBmVCWWeZfSL3ml3 YXv2veE18593BGvjbHW8MEyXtpfISd6wccMcOBsU= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2898861AbgDPN7W (ORCPT ); Thu, 16 Apr 2020 09:59:22 -0400 Received: from mail.kernel.org ([198.145.29.99]:52512 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2898032AbgDPNkA (ORCPT ); Thu, 16 Apr 2020 09:40:00 -0400 Received: from localhost (83-86-89-107.cable.dynamic.v4.ziggo.nl [83.86.89.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 5D468218AC; Thu, 16 Apr 2020 13:39:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1587044399; bh=aXAtVK+3azr1DoaYGy80vAEztDOR8O4VG7NpPABhYWg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=baKMh1coucDXqOT5HiQp57zZDSA67OPzkF1i06qgXgM2XWGj1542ae6eq1nMiT0wR 47E1xXtZTbLc9t1FmegMF8WlQ4KRlaQCsv4AqKsJT20G+hlzsi1fUsXdTu74H9WmXb vQ55T3wdTjGRJHiNnY9zoPlvpl2Yv5czN2/7PagM= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Dave Gerlach , Roger Quadros , stable@kernel.org, Tero Kristo Subject: [PATCH 5.5 200/257] arm64: dts: ti: k3-am65: Add clocks to dwc3 nodes Date: Thu, 16 Apr 2020 15:24:11 +0200 Message-Id: <20200416131351.113959638@linuxfoundation.org> X-Mailer: git-send-email 2.26.1 In-Reply-To: <20200416131325.891903893@linuxfoundation.org> References: <20200416131325.891903893@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Dave Gerlach commit a81e5442d796ccfa2cc97d205a5477053264d978 upstream. The TI sci-clk driver can scan the DT for all clocks provided by system firmware and does this by checking the clocks property of all nodes, so we must add this to the dwc3 nodes so USB clocks are available. Without this USB does not work with latest system firmware i.e. [ 1.714662] clk: couldn't get parent clock 0 for /interconnect@100000/dwc3@4020000 Fixes: cc54a99464ccd ("arm64: dts: ti: k3-am6: add USB suppor") Signed-off-by: Dave Gerlach Signed-off-by: Roger Quadros Cc: stable@kernel.org Signed-off-by: Tero Kristo Signed-off-by: Greg Kroah-Hartman --- arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 2 ++ 1 file changed, 2 insertions(+) --- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi @@ -307,6 +307,7 @@ interrupts = ; dma-coherent; power-domains = <&k3_pds 151 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 151 2>, <&k3_clks 151 7>; assigned-clocks = <&k3_clks 151 2>, <&k3_clks 151 7>; assigned-clock-parents = <&k3_clks 151 4>, /* set REF_CLK to 20MHz i.e. PER0_PLL/48 */ <&k3_clks 151 9>; /* set PIPE3_TXB_CLK to CLK_12M_RC/256 (for HS only) */ @@ -346,6 +347,7 @@ interrupts = ; dma-coherent; power-domains = <&k3_pds 152 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 152 2>; assigned-clocks = <&k3_clks 152 2>; assigned-clock-parents = <&k3_clks 152 4>; /* set REF_CLK to 20MHz i.e. PER0_PLL/48 */