From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.2 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_2 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 82C0FC2BB55 for ; Thu, 16 Apr 2020 11:58:51 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 65A8921D7F for ; Thu, 16 Apr 2020 11:58:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2634680AbgDPL6r (ORCPT ); Thu, 16 Apr 2020 07:58:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41614 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2634515AbgDPL5Q (ORCPT ); Thu, 16 Apr 2020 07:57:16 -0400 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e3e3]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 27E91C061A0C; Thu, 16 Apr 2020 04:57:16 -0700 (PDT) Received: from localhost (unknown [IPv6:2a01:e0a:2c:6930:5cf4:84a1:2763:fe0d]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: bbrezillon) by bhuna.collabora.co.uk (Postfix) with ESMTPSA id 0630D2A0A54; Thu, 16 Apr 2020 12:57:13 +0100 (BST) Date: Thu, 16 Apr 2020 13:57:11 +0200 From: Boris Brezillon To: "Ramuthevar, Vadivel MuruganX" Cc: Martin Blumenstingl , anders.roxell@linaro.org, andriy.shevchenko@intel.com, arnd@arndb.de, brendanhiggins@google.com, cheol.yong.kim@intel.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, masonccyang@mxic.com.tw, miquel.raynal@bootlin.com, piotrs@cadence.com, qi-ming.wu@intel.com, richard@nod.at, robh+dt@kernel.org, tglx@linutronix.de, vigneshr@ti.com Subject: Re: [PATCH v1 2/2] mtd: rawnand: Add NAND controller support on Intel LGM SoC Message-ID: <20200416135711.039ba85c@collabora.com> In-Reply-To: References: <20200414022433.36622-3-vadivel.muruganx.ramuthevar@linux.intel.com> <20200415220533.733834-1-martin.blumenstingl@googlemail.com> <20200416113822.2ef326cb@collabora.com> <18568cf6-2955-472e-7b68-eb35e654a906@linux.intel.com> <20200416122619.2c481792@collabora.com> <20200416131725.51259573@collabora.com> Organization: Collabora X-Mailer: Claws Mail 3.17.5 (GTK+ 2.24.32; x86_64-redhat-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, 16 Apr 2020 19:38:03 +0800 "Ramuthevar, Vadivel MuruganX" wrote: > On 16/4/2020 7:17 pm, Boris Brezillon wrote: > > On Thu, 16 Apr 2020 18:40:53 +0800 > > "Ramuthevar, Vadivel MuruganX" > > wrote: > > > >>>>> we'll be happy to have one more of the existing driver converted to > >>>>> ->exec_op() ;-). > >>>> I have completely adapted to ->exec_op() hook up to replace the legacy > >>>> call-back. > >>> I suspect porting what you've done to the xway driver shouldn't be too > >>> complicated. > >> Not ported from xway_nand.c driver , we have developed from the scratch > >> to make it work on > >> Intel LGM SoC , it's new x86 ATOM based SoC, IP itself completely > >> different and most of the registers won't match. > >> if we port then it would be ugly and also what are the problem may occur > >> we do not know. > > Sorry but IMO they look similar enough to try to merge them. > > Thanks! Boris, need suggestion from you since you are maintainer and > also expertise on mtd-subsystem. I *was* the maintainer :). > > There are different features involved and lines of code is more, if we > add new driver patches over xway-nand driver How about retro-fitting the xway logic into your driver then? I mean, adding a 100 lines of code to your driver to get rid of the 500+ lines we have in xway_nand.c is still a win. > > is completely looks ugly and it may disturb the existing functionality > as well since we don't have platform to validate:'(. How ugly? Can you show us? Maybe we can come with a solution to make it less ugly. As for the testing part, there are 4 scenarios: 1/ Your changes work perfectly fine on older platforms. Yay \o/! 2/ You break the xway driver and existing users notice it before this series gets merged. Now you found someone to validate your changes. 3/ You break the xway driver and none of the existing users notice it before the driver is merged, but they notice it afterwards. Too bad this happened after we've merged the driver, but now you've found someone to help you fix the problem :P. 4/ You break things for old platforms but no one ever complains about it, either because there's no users left or because they never update their kernels. In any case, that's no longer your problem. Someone will remove those old platforms one day and get rid of the unneeded code in the NAND driver. What's more likely to happen is #3 or #4, and I think the NAND maintainer would be fine with both. Note that the NAND subsystem is full of unmaintained legacy drivers, so every time we see someone who could help us get rid or update one of them we have to take this opportunity. From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.3 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,USER_AGENT_SANE_2 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1D99EC2BB55 for ; Thu, 16 Apr 2020 11:58:09 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C1D7921D7F for ; Thu, 16 Apr 2020 11:58:08 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="cjmvbc2M" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org C1D7921D7F Authentication-Results: mail.kernel.org; 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Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jP39Y-0001Bd-Jg; Thu, 16 Apr 2020 11:57:56 +0000 Received: from bhuna.collabora.co.uk ([46.235.227.227]) by bombadil.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1jP38u-0000X2-Ch for linux-mtd@lists.infradead.org; Thu, 16 Apr 2020 11:57:18 +0000 Received: from localhost (unknown [IPv6:2a01:e0a:2c:6930:5cf4:84a1:2763:fe0d]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: bbrezillon) by bhuna.collabora.co.uk (Postfix) with ESMTPSA id 0630D2A0A54; Thu, 16 Apr 2020 12:57:13 +0100 (BST) Date: Thu, 16 Apr 2020 13:57:11 +0200 From: Boris Brezillon To: "Ramuthevar, Vadivel MuruganX" Subject: Re: [PATCH v1 2/2] mtd: rawnand: Add NAND controller support on Intel LGM SoC Message-ID: <20200416135711.039ba85c@collabora.com> In-Reply-To: References: <20200414022433.36622-3-vadivel.muruganx.ramuthevar@linux.intel.com> <20200415220533.733834-1-martin.blumenstingl@googlemail.com> <20200416113822.2ef326cb@collabora.com> <18568cf6-2955-472e-7b68-eb35e654a906@linux.intel.com> <20200416122619.2c481792@collabora.com> <20200416131725.51259573@collabora.com> Organization: Collabora X-Mailer: Claws Mail 3.17.5 (GTK+ 2.24.32; x86_64-redhat-linux-gnu) MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200416_045716_586207_A0B469DF X-CRM114-Status: GOOD ( 18.76 ) X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: cheol.yong.kim@intel.com, devicetree@vger.kernel.org, qi-ming.wu@intel.com, anders.roxell@linaro.org, andriy.shevchenko@intel.com, arnd@arndb.de, Martin Blumenstingl , richard@nod.at, brendanhiggins@google.com, linux-kernel@vger.kernel.org, vigneshr@ti.com, robh+dt@kernel.org, linux-mtd@lists.infradead.org, miquel.raynal@bootlin.com, tglx@linutronix.de, masonccyang@mxic.com.tw, piotrs@cadence.com Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-mtd" Errors-To: linux-mtd-bounces+linux-mtd=archiver.kernel.org@lists.infradead.org On Thu, 16 Apr 2020 19:38:03 +0800 "Ramuthevar, Vadivel MuruganX" wrote: > On 16/4/2020 7:17 pm, Boris Brezillon wrote: > > On Thu, 16 Apr 2020 18:40:53 +0800 > > "Ramuthevar, Vadivel MuruganX" > > wrote: > > > >>>>> we'll be happy to have one more of the existing driver converted to > >>>>> ->exec_op() ;-). > >>>> I have completely adapted to ->exec_op() hook up to replace the legacy > >>>> call-back. > >>> I suspect porting what you've done to the xway driver shouldn't be too > >>> complicated. > >> Not ported from xway_nand.c driver , we have developed from the scratch > >> to make it work on > >> Intel LGM SoC , it's new x86 ATOM based SoC, IP itself completely > >> different and most of the registers won't match. > >> if we port then it would be ugly and also what are the problem may occur > >> we do not know. > > Sorry but IMO they look similar enough to try to merge them. > > Thanks! Boris, need suggestion from you since you are maintainer and > also expertise on mtd-subsystem. I *was* the maintainer :). > > There are different features involved and lines of code is more, if we > add new driver patches over xway-nand driver How about retro-fitting the xway logic into your driver then? I mean, adding a 100 lines of code to your driver to get rid of the 500+ lines we have in xway_nand.c is still a win. > > is completely looks ugly and it may disturb the existing functionality > as well since we don't have platform to validate:'(. How ugly? Can you show us? Maybe we can come with a solution to make it less ugly. As for the testing part, there are 4 scenarios: 1/ Your changes work perfectly fine on older platforms. Yay \o/! 2/ You break the xway driver and existing users notice it before this series gets merged. Now you found someone to validate your changes. 3/ You break the xway driver and none of the existing users notice it before the driver is merged, but they notice it afterwards. Too bad this happened after we've merged the driver, but now you've found someone to help you fix the problem :P. 4/ You break things for old platforms but no one ever complains about it, either because there's no users left or because they never update their kernels. In any case, that's no longer your problem. Someone will remove those old platforms one day and get rid of the unneeded code in the NAND driver. What's more likely to happen is #3 or #4, and I think the NAND maintainer would be fine with both. Note that the NAND subsystem is full of unmaintained legacy drivers, so every time we see someone who could help us get rid or update one of them we have to take this opportunity. ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/