From: <yhchuang@realtek.com>
To: <kvalo@codeaurora.org>
Cc: <pkshih@realtek.com>, <linux-wireless@vger.kernel.org>,
<briannorris@chromium.org>, <kevin_yang@realtek.com>
Subject: [PATCH 22/40] rtw88: 8723d: Add chip_ops::false_alarm_statistics
Date: Fri, 17 Apr 2020 15:46:35 +0800 [thread overview]
Message-ID: <20200417074653.15591-23-yhchuang@realtek.com> (raw)
In-Reply-To: <20200417074653.15591-1-yhchuang@realtek.com>
From: Ping-Ke Shih <pkshih@realtek.com>
This ops is used to do statistics of false alarm periodically, and then
fine tune RX initial gain to adaptive different circumstance.
There are three steps, hold/get/reset counter, to retrieve false alarm
counters that consist of CCK and OFDM. In addition to false alarm
counters, it also collects CRC ok/error counters of CCK, OFDM and HT.
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Yan-Hsuan Chuang <yhchuang@realtek.com>
---
drivers/net/wireless/realtek/rtw88/rtw8723d.c | 65 +++++++++++++++++++
drivers/net/wireless/realtek/rtw88/rtw8723d.h | 41 ++++++++++++
2 files changed, 106 insertions(+)
diff --git a/drivers/net/wireless/realtek/rtw88/rtw8723d.c b/drivers/net/wireless/realtek/rtw88/rtw8723d.c
index c619ee289561..df78d3b4b07a 100644
--- a/drivers/net/wireless/realtek/rtw88/rtw8723d.c
+++ b/drivers/net/wireless/realtek/rtw88/rtw8723d.c
@@ -563,6 +563,70 @@ static void rtw8723d_efuse_grant(struct rtw_dev *rtwdev, bool on)
}
}
+static void rtw8723d_false_alarm_statistics(struct rtw_dev *rtwdev)
+{
+ struct rtw_dm_info *dm_info = &rtwdev->dm_info;
+ u32 cck_fa_cnt;
+ u32 ofdm_fa_cnt;
+ u32 crc32_cnt;
+ u32 val32;
+
+ /* hold counter */
+ rtw_write32_mask(rtwdev, REG_OFDM_FA_HOLDC_11N, BIT_MASK_OFDM_FA_KEEP, 1);
+ rtw_write32_mask(rtwdev, REG_OFDM_FA_RSTD_11N, BIT_MASK_OFDM_FA_KEEP1, 1);
+ rtw_write32_mask(rtwdev, REG_CCK_FA_RST_11N, BIT_MASK_CCK_CNT_KEEP, 1);
+ rtw_write32_mask(rtwdev, REG_CCK_FA_RST_11N, BIT_MASK_CCK_FA_KEEP, 1);
+
+ cck_fa_cnt = rtw_read32_mask(rtwdev, REG_CCK_FA_LSB_11N, MASKBYTE0);
+ cck_fa_cnt += rtw_read32_mask(rtwdev, REG_CCK_FA_MSB_11N, MASKBYTE3) << 8;
+
+ val32 = rtw_read32(rtwdev, REG_OFDM_FA_TYPE1_11N);
+ ofdm_fa_cnt = u32_get_bits(val32, BIT_MASK_OFDM_FF_CNT);
+ ofdm_fa_cnt += u32_get_bits(val32, BIT_MASK_OFDM_SF_CNT);
+ val32 = rtw_read32(rtwdev, REG_OFDM_FA_TYPE2_11N);
+ dm_info->ofdm_cca_cnt = u32_get_bits(val32, BIT_MASK_OFDM_CCA_CNT);
+ ofdm_fa_cnt += u32_get_bits(val32, BIT_MASK_OFDM_PF_CNT);
+ val32 = rtw_read32(rtwdev, REG_OFDM_FA_TYPE3_11N);
+ ofdm_fa_cnt += u32_get_bits(val32, BIT_MASK_OFDM_RI_CNT);
+ ofdm_fa_cnt += u32_get_bits(val32, BIT_MASK_OFDM_CRC_CNT);
+ val32 = rtw_read32(rtwdev, REG_OFDM_FA_TYPE4_11N);
+ ofdm_fa_cnt += u32_get_bits(val32, BIT_MASK_OFDM_MNS_CNT);
+
+ dm_info->cck_fa_cnt = cck_fa_cnt;
+ dm_info->ofdm_fa_cnt = ofdm_fa_cnt;
+ dm_info->total_fa_cnt = cck_fa_cnt + ofdm_fa_cnt;
+
+ dm_info->cck_err_cnt = rtw_read32(rtwdev, REG_IGI_C_11N);
+ dm_info->cck_ok_cnt = rtw_read32(rtwdev, REG_IGI_D_11N);
+ crc32_cnt = rtw_read32(rtwdev, REG_OFDM_CRC32_CNT_11N);
+ dm_info->ofdm_err_cnt = u32_get_bits(crc32_cnt, BIT_MASK_OFDM_LCRC_ERR);
+ dm_info->ofdm_ok_cnt = u32_get_bits(crc32_cnt, BIT_MASK_OFDM_LCRC_OK);
+ crc32_cnt = rtw_read32(rtwdev, REG_HT_CRC32_CNT_11N);
+ dm_info->ht_err_cnt = u32_get_bits(crc32_cnt, BIT_MASK_HT_CRC_ERR);
+ dm_info->ht_ok_cnt = u32_get_bits(crc32_cnt, BIT_MASK_HT_CRC_OK);
+ dm_info->vht_err_cnt = 0;
+ dm_info->vht_ok_cnt = 0;
+
+ val32 = rtw_read32(rtwdev, REG_CCK_CCA_CNT_11N);
+ dm_info->cck_cca_cnt = (u32_get_bits(val32, BIT_MASK_CCK_FA_MSB) << 8) |
+ u32_get_bits(val32, BIT_MASK_CCK_FA_LSB);
+ dm_info->total_cca_cnt = dm_info->cck_cca_cnt + dm_info->ofdm_cca_cnt;
+
+ /* reset counter */
+ rtw_write32_mask(rtwdev, REG_OFDM_FA_RSTC_11N, BIT_MASK_OFDM_FA_RST, 1);
+ rtw_write32_mask(rtwdev, REG_OFDM_FA_RSTC_11N, BIT_MASK_OFDM_FA_RST, 0);
+ rtw_write32_mask(rtwdev, REG_OFDM_FA_RSTD_11N, BIT_MASK_OFDM_FA_RST1, 1);
+ rtw_write32_mask(rtwdev, REG_OFDM_FA_RSTD_11N, BIT_MASK_OFDM_FA_RST1, 0);
+ rtw_write32_mask(rtwdev, REG_OFDM_FA_HOLDC_11N, BIT_MASK_OFDM_FA_KEEP, 0);
+ rtw_write32_mask(rtwdev, REG_OFDM_FA_RSTD_11N, BIT_MASK_OFDM_FA_KEEP1, 0);
+ rtw_write32_mask(rtwdev, REG_CCK_FA_RST_11N, BIT_MASK_CCK_CNT_KPEN, 0);
+ rtw_write32_mask(rtwdev, REG_CCK_FA_RST_11N, BIT_MASK_CCK_CNT_KPEN, 2);
+ rtw_write32_mask(rtwdev, REG_CCK_FA_RST_11N, BIT_MASK_CCK_FA_KPEN, 0);
+ rtw_write32_mask(rtwdev, REG_CCK_FA_RST_11N, BIT_MASK_CCK_FA_KPEN, 2);
+ rtw_write32_mask(rtwdev, REG_PAGE_F_RST_11N, BIT_MASK_F_RST_ALL, 1);
+ rtw_write32_mask(rtwdev, REG_PAGE_F_RST_11N, BIT_MASK_F_RST_ALL, 0);
+}
+
static struct rtw_chip_ops rtw8723d_ops = {
.phy_set_param = rtw8723d_phy_set_param,
.read_efuse = rtw8723d_read_efuse,
@@ -575,6 +639,7 @@ static struct rtw_chip_ops rtw8723d_ops = {
.set_antenna = NULL,
.cfg_ldo25 = rtw8723d_cfg_ldo25,
.efuse_grant = rtw8723d_efuse_grant,
+ .false_alarm_statistics = rtw8723d_false_alarm_statistics,
.config_bfee = NULL,
.set_gid_table = NULL,
.cfg_csi_rate = NULL,
diff --git a/drivers/net/wireless/realtek/rtw88/rtw8723d.h b/drivers/net/wireless/realtek/rtw88/rtw8723d.h
index c08c351ba657..b5b7fc9cd1c8 100644
--- a/drivers/net/wireless/realtek/rtw88/rtw8723d.h
+++ b/drivers/net/wireless/realtek/rtw88/rtw8723d.h
@@ -72,13 +72,54 @@ struct rtw8723d_efuse {
#define REG_FPGA1_RFMOD 0x0900
#define REG_BBRX_DFIR 0x0954
#define REG_CCK0_SYS 0x0a00
+#define REG_CCK_FA_RST_11N 0x0a2c
+#define BIT_MASK_CCK_CNT_KEEP BIT(12)
+#define BIT_MASK_CCK_CNT_EN BIT(13)
+#define BIT_MASK_CCK_CNT_KPEN (BIT_MASK_CCK_CNT_KEEP | BIT_MASK_CCK_CNT_EN)
+#define BIT_MASK_CCK_FA_KEEP BIT(14)
+#define BIT_MASK_CCK_FA_EN BIT(15)
+#define BIT_MASK_CCK_FA_KPEN (BIT_MASK_CCK_FA_KEEP | BIT_MASK_CCK_FA_EN)
+#define REG_CCK_FA_LSB_11N 0x0a5c
+#define REG_CCK_FA_MSB_11N 0x0a58
+#define REG_CCK_CCA_CNT_11N 0x0a60
+#define BIT_MASK_CCK_FA_MSB GENMASK(7, 0)
+#define BIT_MASK_CCK_FA_LSB GENMASK(15, 8)
+#define REG_OFDM_FA_HOLDC_11N 0x0c00
+#define BIT_MASK_OFDM_FA_KEEP BIT(31)
+#define REG_OFDM_FA_RSTC_11N 0x0c0c
+#define BIT_MASK_OFDM_FA_RST BIT(31)
#define REG_OFDM0_RXDSP 0x0c40
#define REG_OFDM0_XAAGC1 0x0c50
#define REG_OFDM0_XBAGC1 0x0c58
+#define REG_OFDM_FA_TYPE1_11N 0x0cf0
+#define BIT_MASK_OFDM_FF_CNT GENMASK(15, 0)
+#define BIT_MASK_OFDM_SF_CNT GENMASK(31, 16)
+#define REG_OFDM_FA_RSTD_11N 0x0d00
+#define BIT_MASK_OFDM_FA_RST1 BIT(27)
+#define BIT_MASK_OFDM_FA_KEEP1 BIT(31)
#define REG_OFDM1_CFOTRK 0x0d2c
#define REG_OFDM1_CSI1 0x0d40
#define REG_OFDM1_CSI2 0x0d44
#define REG_OFDM1_CSI3 0x0d48
#define REG_OFDM1_CSI4 0x0d4c
+#define REG_OFDM_FA_TYPE2_11N 0x0da0
+#define BIT_MASK_OFDM_CCA_CNT GENMASK(15, 0)
+#define BIT_MASK_OFDM_PF_CNT GENMASK(31, 16)
+#define REG_OFDM_FA_TYPE3_11N 0x0da4
+#define BIT_MASK_OFDM_RI_CNT GENMASK(15, 0)
+#define BIT_MASK_OFDM_CRC_CNT GENMASK(31, 16)
+#define REG_OFDM_FA_TYPE4_11N 0x0da8
+#define BIT_MASK_OFDM_MNS_CNT GENMASK(15, 0)
+#define REG_PAGE_F_RST_11N 0x0f14
+#define BIT_MASK_F_RST_ALL BIT(16)
+#define REG_IGI_C_11N 0x0f84
+#define REG_IGI_D_11N 0x0f88
+#define REG_HT_CRC32_CNT_11N 0x0f90
+#define BIT_MASK_HT_CRC_OK GENMASK(15, 0)
+#define BIT_MASK_HT_CRC_ERR GENMASK(31, 16)
+#define REG_OFDM_CRC32_CNT_11N 0x0f94
+#define BIT_MASK_OFDM_LCRC_OK GENMASK(15, 0)
+#define BIT_MASK_OFDM_LCRC_ERR GENMASK(31, 16)
+#define REG_HT_CRC32_CNT_11N_AGG 0x0fb8
#endif
--
2.17.1
next prev parent reply other threads:[~2020-04-17 7:47 UTC|newest]
Thread overview: 57+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-17 7:46 [PATCH 00/40] rtw88: add support for 802.11n RTL8723DE devices yhchuang
2020-04-17 7:46 ` [PATCH 01/40] rtw88: 8723d: Add basic chip capabilities yhchuang
2020-04-17 7:46 ` [PATCH 02/40] rtw88: 8723d: add beamform wrapper functions yhchuang
2020-04-17 7:46 ` [PATCH 03/40] rtw88: 8723d: Add power sequence yhchuang
2020-04-17 7:46 ` [PATCH 04/40] rtw88: 8723d: Add RF read/write ops yhchuang
2020-04-17 7:46 ` [PATCH 05/40] rtw88: 8723d: Add mac/bb/rf/agc/power_limit tables yhchuang
2020-04-17 7:46 ` [PATCH 06/40] rtw88: 8723d: Add cfg_ldo25 to control LDO25 yhchuang
2020-04-17 7:46 ` [PATCH 07/40] rtw88: 8723d: Add new chip op efuse_grant() to control efuse access yhchuang
2020-04-17 7:46 ` [PATCH 08/40] rtw88: 8723d: Add read_efuse to recognize efuse info from map yhchuang
2020-04-17 7:46 ` [PATCH 09/40] rtw88: add legacy firmware download for 8723D devices yhchuang
2020-04-17 7:46 ` [PATCH 10/40] rtw88: no need to send additional information to legacy firmware yhchuang
2020-04-17 7:46 ` [PATCH 11/40] rtw88: 8723d: Add mac power-on/-off function yhchuang
2020-04-17 7:46 ` [PATCH 12/40] rtw88: decompose while(1) loop of power sequence polling command yhchuang
2020-04-17 7:46 ` [PATCH 13/40] rtw88: 8723d: 11N chips don't support H2C queue yhchuang
2020-04-17 7:46 ` [PATCH 14/40] rtw88: 8723d: implement set_tx_power_index ops yhchuang
2020-04-17 7:46 ` [PATCH 15/40] rtw88: 8723d: Organize chip TX/RX FIFO yhchuang
2020-04-17 7:46 ` [PATCH 16/40] rtw88: 8723d: initialize mac/bb/rf basic functions yhchuang
2020-04-17 7:46 ` [PATCH 17/40] rtw88: 8723d: Add DIG parameter yhchuang
2020-04-17 7:46 ` [PATCH 18/40] rtw88: 8723d: Add query_rx_desc yhchuang
2020-04-17 7:46 ` [PATCH 19/40] rtw88: 8723d: Add set_channel yhchuang
2020-04-17 7:46 ` [PATCH 20/40] rtw88: handle C2H_CCX_TX_RPT to know if packet TX'ed successfully yhchuang
2020-04-17 7:46 ` [PATCH 21/40] rtw88: 8723d: 11N chips don't support LDPC yhchuang
2020-04-17 7:46 ` yhchuang [this message]
2020-04-17 7:46 ` [PATCH 23/40] rtw88: 8723d: Set IG register for CCK rate yhchuang
2020-04-17 7:46 ` [PATCH 24/40] rtw88: 8723d: add interface configurations table yhchuang
2020-04-17 7:46 ` [PATCH 25/40] rtw88: 8723d: Add LC calibration yhchuang
2020-04-30 13:57 ` Sebastian Andrzej Siewior
2020-05-04 8:40 ` Tony Chuang
2020-04-17 7:46 ` [PATCH 26/40] rtw88: 8723d: add IQ calibration yhchuang
2020-04-30 15:02 ` Sebastian Andrzej Siewior
2020-05-04 9:45 ` Tony Chuang
2020-05-05 11:42 ` Sebastian Andrzej Siewior
2020-04-17 7:46 ` [PATCH 27/40] rtw88: 8723d: Add power tracking yhchuang
2020-04-17 7:46 ` [PATCH 28/40] rtw88: 8723d: Add shutdown callback to disable BT USB suspend yhchuang
2020-05-05 14:14 ` Sebastian Andrzej Siewior
2020-05-06 2:35 ` Tony Chuang
2020-05-06 20:01 ` Sebastian Andrzej Siewior
2020-05-07 4:26 ` Tony Chuang
2020-05-10 21:54 ` Sebastian Andrzej Siewior
2020-05-11 6:43 ` Pkshih
2020-04-17 7:46 ` [PATCH 29/40] rtw88: 8723d: implement flush queue yhchuang
2020-04-17 7:46 ` [PATCH 30/40] rtw88: 8723d: set ltecoex register address in chip_info yhchuang
2020-04-17 7:46 ` [PATCH 31/40] rtw88: 8723d: Add coex support yhchuang
2020-04-17 7:46 ` [PATCH 32/40] rtw88: fill zeros to words 0x06 and 0x07 of security cam entry yhchuang
2020-04-17 7:46 ` [PATCH 33/40] rtw88: 8723d: Add 8723DE to Kconfig and Makefile yhchuang
2020-04-17 7:46 ` [PATCH 34/40] rtw88: extract: export symbols used in chip functionalities yhchuang
2020-04-17 7:46 ` [PATCH 35/40] rtw88: extract: export symbols about pci interface yhchuang
2020-04-17 7:46 ` [PATCH 36/40] rtw88: extract: make 8822c an individual kernel module yhchuang
2020-04-17 7:46 ` [PATCH 37/40] rtw88: extract: make 8822b " yhchuang
2020-04-17 7:46 ` [PATCH 38/40] rtw88: extract: make 8723d " yhchuang
2020-04-17 7:46 ` [PATCH 39/40] rtw88: extract: remove the unused after extracting yhchuang
2020-04-17 7:46 ` [PATCH 40/40] rtw88: rename rtw88.ko/rtwpci.ko to rtw88_core.ko/rtw88_pci.ko yhchuang
2020-04-17 8:19 ` [PATCH 00/40] rtw88: add support for 802.11n RTL8723DE devices Kalle Valo
2020-04-17 8:26 ` Kalle Valo
2020-04-17 9:03 ` Tony Chuang
2020-04-17 14:47 ` Stefan Schmidt
2020-04-21 8:23 ` Kalle Valo
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