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[79.183.51.3]) by smtp.gmail.com with ESMTPSA id k8sm1486711wrm.52.2020.04.20.08.02.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Apr 2020 08:02:25 -0700 (PDT) Date: Mon, 20 Apr 2020 11:02:22 -0400 From: "Michael S. Tsirkin" To: Daniel =?iso-8859-1?Q?P=2E_Berrang=E9?= Subject: Re: [PATCH] Add a new PIIX option to control PCI hot unplugging of devices on non-root buses Message-ID: <20200420105936-mutt-send-email-mst@kernel.org> References: <1587136411-200885-1-git-send-email-ani.sinha@nutanix.com> <20200417112620-mutt-send-email-mst@kernel.org> <2A13ACCD-BD24-41FB-B6EA-2804F7C1FF1D@nutanix.com> <20200417120732-mutt-send-email-mst@kernel.org> <20200420092459.GF346737@redhat.com> MIME-Version: 1.0 In-Reply-To: <20200420092459.GF346737@redhat.com> X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=iso-8859-1 Content-Transfer-Encoding: quoted-printable Content-Disposition: inline Received-SPF: pass client-ip=205.139.110.120; envelope-from=mst@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs1p.gnu.org: First seen = 2020/04/20 04:32:42 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] X-Received-From: 205.139.110.120 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Ani Sinha , Eduardo Habkost , "qemu-devel@nongnu.org" , Igor Mammedov , Marcel Apfelbaum , Paolo Bonzini , Richard Henderson Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Mon, Apr 20, 2020 at 10:24:59AM +0100, Daniel P. Berrang=E9 wrote: > On Fri, Apr 17, 2020 at 12:09:00PM -0400, Michael S. Tsirkin wrote: > > On Fri, Apr 17, 2020 at 03:36:14PM +0000, Ani Sinha wrote: > > >=20 > > >=20 > > > > On Apr 17, 2020, at 8:57 PM, Michael S. Tsirkin wr= ote: > > > >=20 > > > > Is there a real reason to do this? Can't we just limit the > > > > hotplug control to pcie ports? At some point I'd like us to > > > > start leaving piix alone.. > > >=20 > > > Yes we really need this feature as want to be able to hot plug device= s into the guest but prevent customers from hot unplugging them from say Wi= ndows system tray. > > >=20 > > > ani > >=20 > > Problem is, I think this is not something we can support with pcie or s= hpc. > > I'm reluctant to add features that only ACPI can support, > > we are trying to phase that out. >=20 > >From the upstream POV, there's been no decision / agreement to phase > out PIIX, Phase out now. But I for one would like to focus on keeping PIIX stable and focus development on q35. Not bloating PIIX with lots of new features is IMHO a good way to do that. > this is purely a RHEL downstream decision & plan. If other > distros / users have a different POV, and find the feature useful, we > should accept the patch if it meets the normal QEMU patch requirements. >=20 > Regards, > Daniel Orthogonality of features is important. It is tough to navigate our feature matrix as it is. Figuring things out if random features depend on other random features becomes impossible. > --=20 > |: https://berrange.com -o- https://www.flickr.com/photos/dberran= ge :| > |: https://libvirt.org -o- https://fstop138.berrange.c= om :| > |: https://entangle-photo.org -o- https://www.instagram.com/dberran= ge :|