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From: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 1/1] drm/i915: Apply Wa_1406680159 as a clk_gating workaround
Date: Wed, 22 Apr 2020 05:30:37 -0700	[thread overview]
Message-ID: <20200422123037.25414-2-radhakrishna.sripada@intel.com> (raw)
In-Reply-To: <20200422123037.25414-1-radhakrishna.sripada@intel.com>

The workaround is moved from render engine context to intel_pm
clk gating functions like the previous platforms.

Closes: https://gitlab.freedesktop.org/drm/intel/issues/1222
Fixes: fb899dd8ea9c ("drm/i915: Apply Wa_1406680159:icl,ehl as an engine workaround")
Cc: Matt Atwood <matthew.s.atwood@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_workarounds.c | 5 -----
 drivers/gpu/drm/i915/intel_pm.c             | 4 ++++
 2 files changed, 4 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index adddc5c93b48..a9a75e9b670d 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -1486,11 +1486,6 @@ rcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal)
 		wa_write_or(wal, UNSLICE_UNIT_LEVEL_CLKGATE2,
 			    PSDUNIT_CLKGATE_DIS);
 
-		/* Wa_1406680159:icl,ehl */
-		wa_write_or(wal,
-			    SUBSLICE_UNIT_LEVEL_CLKGATE,
-			    GWUNIT_CLKGATE_DIS);
-
 		/*
 		 * Wa_1408767742:icl[a2..forever],ehl[all]
 		 * Wa_1605460711:icl[a0..c0]
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 6f40bfee7304..19293ac001e2 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -6859,6 +6859,10 @@ static void icl_init_clock_gating(struct drm_i915_private *dev_priv)
 	/*Wa_14010594013:icl, ehl */
 	intel_uncore_rmw(&dev_priv->uncore, GEN8_CHICKEN_DCPR_1,
 			 0, CNL_DELAY_PMRSP);
+
+	/* Wa_1406680159:icl,ehl */
+	I915_WRITE(SUBSLICE_UNIT_LEVEL_CLKGATE,
+		   I915_READ(SUBSLICE_UNIT_LEVEL_CLKGATE) | GWUNIT_CLKGATE_DIS);
 }
 
 static void tgl_init_clock_gating(struct drm_i915_private *dev_priv)
-- 
2.20.1

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  reply	other threads:[~2020-04-22 12:29 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-04-22 12:30 [Intel-gfx] [PATCH 0/1] Apply Wa_1406680159 as a clk_gating workaround Radhakrishna Sripada
2020-04-22 12:30 ` Radhakrishna Sripada [this message]
2020-04-22 17:12   ` [Intel-gfx] [PATCH 1/1] drm/i915: " Chris Wilson
2020-04-25  0:27   ` Matt Roper
2020-04-22 13:14 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
2020-04-22 17:08 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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