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From: Sean Anderson <seanga2@gmail.com>
To: u-boot@lists.denx.de
Subject: [PATCH v9 02/21] clk: Check that ops of composite clock components exist before calling
Date: Wed, 22 Apr 2020 22:33:01 -0400	[thread overview]
Message-ID: <20200423023320.1380090-3-seanga2@gmail.com> (raw)
In-Reply-To: <20200423023320.1380090-1-seanga2@gmail.com>

clk_composite_ops was shared between all devices in the composite clock
driver.  If one clock had a feature (such as supporting set_parent) which
another clock did not, it could call a null pointer dereference.

This patch does three things
1. It adds null-pointer checks to all composite clock functions.
2. It makes clk_composite_ops const and sets its functions at compile-time.
3. It adds some basic sanity checks to num_parents.

The combined effect of these changes is that any of mux, rate, or gate can
be NULL, and composite clocks will still function normally. Previously, at
least mux had to exist, since clk_composite_get_parent was used to
determine the parent for clk_register.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Acked-by: Lukasz Majewski <lukma@denx.de>
---

Changes in v4:
- Return ENOTSUPP not ENOSYS with no set_parent

Changes in v3:
- Don't return an error code where a no-op would be fine

 drivers/clk/clk-composite.c | 57 +++++++++++++++++++++++--------------
 1 file changed, 35 insertions(+), 22 deletions(-)

diff --git a/drivers/clk/clk-composite.c b/drivers/clk/clk-composite.c
index 2ff1d6b47f..819bfca2fc 100644
--- a/drivers/clk/clk-composite.c
+++ b/drivers/clk/clk-composite.c
@@ -24,7 +24,10 @@ static u8 clk_composite_get_parent(struct clk *clk)
 		(struct clk *)dev_get_clk_ptr(clk->dev) : clk);
 	struct clk *mux = composite->mux;
 
-	return clk_mux_get_parent(mux);
+	if (mux)
+		return clk_mux_get_parent(mux);
+	else
+		return 0;
 }
 
 static int clk_composite_set_parent(struct clk *clk, struct clk *parent)
@@ -34,7 +37,10 @@ static int clk_composite_set_parent(struct clk *clk, struct clk *parent)
 	const struct clk_ops *mux_ops = composite->mux_ops;
 	struct clk *mux = composite->mux;
 
-	return mux_ops->set_parent(mux, parent);
+	if (mux && mux_ops)
+		return mux_ops->set_parent(mux, parent);
+	else
+		return -ENOTSUPP;
 }
 
 static unsigned long clk_composite_recalc_rate(struct clk *clk)
@@ -44,7 +50,10 @@ static unsigned long clk_composite_recalc_rate(struct clk *clk)
 	const struct clk_ops *rate_ops = composite->rate_ops;
 	struct clk *rate = composite->rate;
 
-	return rate_ops->get_rate(rate);
+	if (rate && rate_ops)
+		return rate_ops->get_rate(rate);
+	else
+		return clk_get_parent_rate(clk);
 }
 
 static ulong clk_composite_set_rate(struct clk *clk, unsigned long rate)
@@ -54,7 +63,10 @@ static ulong clk_composite_set_rate(struct clk *clk, unsigned long rate)
 	const struct clk_ops *rate_ops = composite->rate_ops;
 	struct clk *clk_rate = composite->rate;
 
-	return rate_ops->set_rate(clk_rate, rate);
+	if (rate && rate_ops)
+		return rate_ops->set_rate(clk_rate, rate);
+	else
+		return clk_get_rate(clk);
 }
 
 static int clk_composite_enable(struct clk *clk)
@@ -64,7 +76,10 @@ static int clk_composite_enable(struct clk *clk)
 	const struct clk_ops *gate_ops = composite->gate_ops;
 	struct clk *gate = composite->gate;
 
-	return gate_ops->enable(gate);
+	if (gate && gate_ops)
+		return gate_ops->enable(gate);
+	else
+		return 0;
 }
 
 static int clk_composite_disable(struct clk *clk)
@@ -74,15 +89,12 @@ static int clk_composite_disable(struct clk *clk)
 	const struct clk_ops *gate_ops = composite->gate_ops;
 	struct clk *gate = composite->gate;
 
-	gate_ops->disable(gate);
-
-	return 0;
+	if (gate && gate_ops)
+		return gate_ops->disable(gate);
+	else
+		return 0;
 }
 
-struct clk_ops clk_composite_ops = {
-	/* This will be set according to clk_register_composite */
-};
-
 struct clk *clk_register_composite(struct device *dev, const char *name,
 				   const char * const *parent_names,
 				   int num_parents, struct clk *mux,
@@ -96,7 +108,9 @@ struct clk *clk_register_composite(struct device *dev, const char *name,
 	struct clk *clk;
 	struct clk_composite *composite;
 	int ret;
-	struct clk_ops *composite_ops = &clk_composite_ops;
+
+	if (!num_parents || (num_parents != 1 && !mux))
+		return ERR_PTR(-EINVAL);
 
 	composite = kzalloc(sizeof(*composite), GFP_KERNEL);
 	if (!composite)
@@ -105,8 +119,6 @@ struct clk *clk_register_composite(struct device *dev, const char *name,
 	if (mux && mux_ops) {
 		composite->mux = mux;
 		composite->mux_ops = mux_ops;
-		if (mux_ops->set_parent)
-			composite_ops->set_parent = clk_composite_set_parent;
 		mux->data = (ulong)composite;
 	}
 
@@ -115,11 +127,6 @@ struct clk *clk_register_composite(struct device *dev, const char *name,
 			clk = ERR_PTR(-EINVAL);
 			goto err;
 		}
-		composite_ops->get_rate = clk_composite_recalc_rate;
-
-		/* .set_rate requires either .round_rate or .determine_rate */
-		if (rate_ops->set_rate)
-			composite_ops->set_rate = clk_composite_set_rate;
 
 		composite->rate = rate;
 		composite->rate_ops = rate_ops;
@@ -134,8 +141,6 @@ struct clk *clk_register_composite(struct device *dev, const char *name,
 
 		composite->gate = gate;
 		composite->gate_ops = gate_ops;
-		composite_ops->enable = clk_composite_enable;
-		composite_ops->disable = clk_composite_disable;
 		gate->data = (ulong)composite;
 	}
 
@@ -161,6 +166,14 @@ err:
 	return clk;
 }
 
+static const struct clk_ops clk_composite_ops = {
+	.set_parent = clk_composite_set_parent,
+	.get_rate = clk_composite_recalc_rate,
+	.set_rate = clk_composite_set_rate,
+	.enable = clk_composite_enable,
+	.disable = clk_composite_disable,
+};
+
 U_BOOT_DRIVER(clk_composite) = {
 	.name	= UBOOT_DM_CLK_COMPOSITE,
 	.id	= UCLASS_CLK,
-- 
2.25.1

  parent reply	other threads:[~2020-04-23  2:33 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-04-23  2:32 [PATCH v9 00/21] riscv: Add Sipeed Maix support Sean Anderson
2020-04-23  2:33 ` [PATCH v9 01/21] clk: Always use the supplied struct clk Sean Anderson
2020-04-23  2:33 ` Sean Anderson [this message]
2020-04-23  2:33 ` [PATCH v9 03/21] clk: Unconditionally recursively en-/dis-able clocks Sean Anderson
2020-04-23  2:33 ` [PATCH v9 04/21] clk: Fix clk_get_by_* handling of index Sean Anderson
2020-04-23  2:33 ` [PATCH v9 05/21] clk: Add K210 pll support Sean Anderson
2020-04-23  2:33 ` [PATCH v9 06/21] clk: Add a bypass clock for K210 Sean Anderson
2020-04-23  2:33 ` [PATCH v9 07/21] clk: Add K210 clock support Sean Anderson
2020-04-23  2:33 ` [PATCH v9 08/21] dm: Add support for simple-pm-bus Sean Anderson
2020-04-23  2:33 ` [PATCH v9 09/21] dm: Fix error handling for dev_read_addr_ptr Sean Anderson
2020-04-23  2:33 ` [PATCH v9 10/21] reset: Add generic reset driver Sean Anderson
2020-04-23  2:33 ` [PATCH v9 11/21] lib: Always set errno in hcreate_r Sean Anderson
2020-04-23  2:33 ` [PATCH v9 12/21] riscv: Add headers for asm/global_data.h Sean Anderson
2020-04-23  2:33 ` [PATCH v9 13/21] riscv: Clear pending interrupts before enabling IPIs Sean Anderson
2020-04-23  2:33 ` [PATCH v9 14/21] riscv: Clean up IPI initialization code Sean Anderson
2020-04-23  2:33 ` [PATCH v9 15/21] riscv: Add option to support RISC-V privileged spec 1.9 Sean Anderson
2020-04-23  2:33 ` [PATCH v9 16/21] riscv: Allow use of reset drivers Sean Anderson
2020-04-23  2:33 ` [PATCH v9 17/21] riscv: Try to get cpu frequency from a "clocks" node if it exists Sean Anderson
2020-04-23  2:33 ` [PATCH v9 18/21] riscv: Enable cpu clock if it is present Sean Anderson
2020-04-25  7:54   ` Pragnesh Patel
2020-05-03  2:34     ` Sean Anderson
2020-04-23  2:33 ` [PATCH v9 19/21] riscv: Add device tree for K210 and Sipeed Maix BitM Sean Anderson
2020-04-23  2:33 ` [PATCH v9 20/21] doc: riscv: Add documentation for Sipeed Maix Bit Sean Anderson
2020-04-23  2:33 ` [PATCH v9 21/21] riscv: Add Sipeed Maix support Sean Anderson
2020-05-03  2:35 [PATCH v9 00/21] " Sean Anderson
2020-05-03  2:35 ` [PATCH v9 02/21] clk: Check that ops of composite clock components exist before calling Sean Anderson

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