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Wed, 29 Apr 2020 00:29:11 +0000 Date: Tue, 28 Apr 2020 20:29:06 -0400 From: Rodrigo Siqueira To: Arnd Bergmann Cc: Harry Wentland , Leo Li , Alex Deucher , Christian =?utf-8?B?S8O2bmln?= , "David (ChunMing) Zhou" , David Airlie , Daniel Vetter , Nicholas Kazlauskas , Bhawanpreet Lakha , amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] amdgpu: fix gcc-4.8 build warnings Message-ID: <20200429002906.3bor7udoifo7q56h@outlook.office365.com> References: <20200428215541.4144749-1-arnd@arndb.de> Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="m2374edgitgx3mth" Content-Disposition: inline In-Reply-To: <20200428215541.4144749-1-arnd@arndb.de> X-ClientProxiedBy: YTXPR0101CA0070.CANPRD01.PROD.OUTLOOK.COM (2603:10b6:b00:1::47) To MW2PR12MB2524.namprd12.prod.outlook.com (2603:10b6:907:9::27) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from outlook.office365.com (2607:fea8:56a0:11a1::4) by YTXPR0101CA0070.CANPRD01.PROD.OUTLOOK.COM (2603:10b6:b00:1::47) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2937.13 via Frontend Transport; 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charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Thanks for your patch. Reviewed-by: Rodrigo Siqueira On 04/28, Arnd Bergmann wrote: > Older compilers warn about initializers with incorrect curly > braces: >=20 > drivers/gpu/drm/drm_dp_mst_topology.c: In function 'drm_dp_mst_dsc_aux_fo= r_port': > drivers/gpu/drm/drm_dp_mst_topology.c:5497:9: error: missing braces aroun= d initializer [-Werror=3Dmissing-braces] > struct drm_dp_desc desc =3D { 0 }; > ^ >=20 > Change all instances in the amd gpu driver to using the GNU empty > initializer extension. >=20 > Signed-off-by: Arnd Bergmann > --- > drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 +- > drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c | 2 +- > drivers/gpu/drm/amd/display/dc/bios/command_table2.c | 4 ++-- > drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c | 2 +- > drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c | 6 +++--- > drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c | 6 +++--- > drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c | 2 +- > drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubp.c | 8 ++++---- > 8 files changed, 16 insertions(+), 16 deletions(-) >=20 > diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/= gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c > index 7f4417981bff..81ce3103d751 100644 > --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c > +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c > @@ -8695,7 +8695,7 @@ bool amdgpu_dm_psr_enable(struct dc_stream_state *s= tream) > { > struct dc_link *link =3D stream->link; > unsigned int vsync_rate_hz =3D 0; > - struct dc_static_screen_params params =3D {0}; > + struct dc_static_screen_params params =3D { }; > /* Calculate number of static frames before generating interrupt to > * enter PSR. > */ > diff --git a/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c b/drivers= /gpu/drm/amd/display/dc/bios/bios_parser2.c > index 37fa7b48250e..5484a316eaa8 100644 > --- a/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c > +++ b/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c > @@ -294,7 +294,7 @@ static enum bp_result bios_parser_get_i2c_info(struct= dc_bios *dcb, > struct atom_display_object_path_v2 *object; > struct atom_common_record_header *header; > struct atom_i2c_record *record; > - struct atom_i2c_record dummy_record =3D {0}; > + struct atom_i2c_record dummy_record =3D { }; > struct bios_parser *bp =3D BP_FROM_DCB(dcb); > =20 > if (!info) > diff --git a/drivers/gpu/drm/amd/display/dc/bios/command_table2.c b/drive= rs/gpu/drm/amd/display/dc/bios/command_table2.c > index 8edc2506d49e..5e186c135921 100644 > --- a/drivers/gpu/drm/amd/display/dc/bios/command_table2.c > +++ b/drivers/gpu/drm/amd/display/dc/bios/command_table2.c > @@ -113,7 +113,7 @@ static void encoder_control_dmcub( > struct dc_dmub_srv *dmcub, > struct dig_encoder_stream_setup_parameters_v1_5 *dig) > { > - struct dmub_rb_cmd_digx_encoder_control encoder_control =3D { 0 }; > + struct dmub_rb_cmd_digx_encoder_control encoder_control =3D { }; > =20 > encoder_control.header.type =3D DMUB_CMD__VBIOS; > encoder_control.header.sub_type =3D DMUB_CMD__VBIOS_DIGX_ENCODER_CONTRO= L; > @@ -339,7 +339,7 @@ static void set_pixel_clock_dmcub( > struct dc_dmub_srv *dmcub, > struct set_pixel_clock_parameter_v1_7 *clk) > { > - struct dmub_rb_cmd_set_pixel_clock pixel_clock =3D { 0 }; > + struct dmub_rb_cmd_set_pixel_clock pixel_clock =3D { }; > =20 > pixel_clock.header.type =3D DMUB_CMD__VBIOS; > pixel_clock.header.sub_type =3D DMUB_CMD__VBIOS_SET_PIXEL_CLOCK; > diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c b/= drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c > index 24c5765890fa..ee3ef5094fd1 100644 > --- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c > +++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c > @@ -698,7 +698,7 @@ void rn_clk_mgr_construct( > struct dccg *dccg) > { > struct dc_debug_options *debug =3D &ctx->dc->debug; > - struct dpm_clocks clock_table =3D { 0 }; > + struct dpm_clocks clock_table =3D { }; > =20 > clk_mgr->base.ctx =3D ctx; > clk_mgr->base.funcs =3D &dcn21_funcs; > diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c b/drivers/g= pu/drm/amd/display/dc/core/dc_link_dp.c > index 9ef9e50a34fa..7cbfe740a947 100644 > --- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c > +++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c > @@ -2683,9 +2683,9 @@ static void dp_test_send_link_test_pattern(struct d= c_link *link) > =20 > static void dp_test_get_audio_test_data(struct dc_link *link, bool disab= le_video) > { > - union audio_test_mode dpcd_test_mode =3D {0}; > - struct audio_test_pattern_type dpcd_pattern_type =3D {0}; > - union audio_test_pattern_period dpcd_pattern_period[AUDIO_CHANNELS_COU= NT] =3D {0}; > + union audio_test_mode dpcd_test_mode =3D { }; > + struct audio_test_pattern_type dpcd_pattern_type =3D { }; > + union audio_test_pattern_period dpcd_pattern_period[AUDIO_CHANNELS_COU= NT] =3D { }; > enum dp_test_pattern test_pattern =3D DP_TEST_PATTERN_AUDIO_OPERATOR_DE= FINED; > =20 > struct pipe_ctx *pipes =3D link->dc->current_state->res_ctx.pipe_ctx; > diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c b/drivers/= gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c > index 84d7ac5dd206..dfa541f0b0d3 100644 > --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c > +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c > @@ -1253,9 +1253,9 @@ void hubp2_validate_dml_output(struct hubp *hubp, > struct _vcs_dpi_display_ttu_regs_st *dml_ttu_attr) > { > struct dcn20_hubp *hubp2 =3D TO_DCN20_HUBP(hubp); > - struct _vcs_dpi_display_rq_regs_st rq_regs =3D {0}; > - struct _vcs_dpi_display_dlg_regs_st dlg_attr =3D {0}; > - struct _vcs_dpi_display_ttu_regs_st ttu_attr =3D {0}; > + struct _vcs_dpi_display_rq_regs_st rq_regs =3D { }; > + struct _vcs_dpi_display_dlg_regs_st dlg_attr =3D { }; > + struct _vcs_dpi_display_ttu_regs_st ttu_attr =3D { }; > DC_LOGGER_INIT(ctx->logger); > DC_LOG_DEBUG("DML Validation | Running Validation"); > =20 > diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c b/driv= ers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c > index 63044ae06327..509b07c24758 100644 > --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c > +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c > @@ -449,7 +449,7 @@ struct _vcs_dpi_soc_bounding_box_st dcn2_0_nv14_soc = =3D { > .use_urgent_burst_bw =3D 0 > }; > =20 > -struct _vcs_dpi_soc_bounding_box_st dcn2_0_nv12_soc =3D { 0 }; > +struct _vcs_dpi_soc_bounding_box_st dcn2_0_nv12_soc =3D { }; > =20 > #ifndef mmDP0_DP_DPHY_INTERNAL_CTRL > #define mmDP0_DP_DPHY_INTERNAL_CTRL 0x210f > diff --git a/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubp.c b/drivers/= gpu/drm/amd/display/dc/dcn21/dcn21_hubp.c > index d285ba622d61..654ea81b8ad6 100644 > --- a/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubp.c > +++ b/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubp.c > @@ -365,9 +365,9 @@ void hubp21_validate_dml_output(struct hubp *hubp, > struct _vcs_dpi_display_ttu_regs_st *dml_ttu_attr) > { > struct dcn21_hubp *hubp21 =3D TO_DCN21_HUBP(hubp); > - struct _vcs_dpi_display_rq_regs_st rq_regs =3D {0}; > - struct _vcs_dpi_display_dlg_regs_st dlg_attr =3D {0}; > - struct _vcs_dpi_display_ttu_regs_st ttu_attr =3D {0}; > + struct _vcs_dpi_display_rq_regs_st rq_regs =3D { }; > + struct _vcs_dpi_display_dlg_regs_st dlg_attr =3D { }; > + struct _vcs_dpi_display_ttu_regs_st ttu_attr =3D { }; > DC_LOGGER_INIT(ctx->logger); > DC_LOG_DEBUG("DML Validation | Running Validation"); > =20 > @@ -778,7 +778,7 @@ void dmcub_PLAT_54186_wa(struct hubp *hubp, struct su= rface_flip_registers *flip_ > { > struct dc_dmub_srv *dmcub =3D hubp->ctx->dmub_srv; > struct dcn21_hubp *hubp21 =3D TO_DCN21_HUBP(hubp); > - struct dmub_rb_cmd_PLAT_54186_wa PLAT_54186_wa =3D { 0 }; > + struct dmub_rb_cmd_PLAT_54186_wa PLAT_54186_wa =3D { }; > =20 > PLAT_54186_wa.header.type =3D DMUB_CMD__PLAT_54186_WA; > PLAT_54186_wa.flip.DCSURF_PRIMARY_SURFACE_ADDRESS =3D flip_regs->DCSURF= _PRIMARY_SURFACE_ADDRESS; > --=20 > 2.26.0 >=20 --=20 Rodrigo Siqueira https://siqueira.tech --m2374edgitgx3mth Content-Type: application/pgp-signature; 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boundary="===============0704995590==" Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" --===============0704995590== Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="m2374edgitgx3mth" Content-Disposition: inline --m2374edgitgx3mth Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Thanks for your patch. Reviewed-by: Rodrigo Siqueira On 04/28, Arnd Bergmann wrote: > Older compilers warn about initializers with incorrect curly > braces: >=20 > drivers/gpu/drm/drm_dp_mst_topology.c: In function 'drm_dp_mst_dsc_aux_fo= r_port': > drivers/gpu/drm/drm_dp_mst_topology.c:5497:9: error: missing braces aroun= d initializer [-Werror=3Dmissing-braces] > struct drm_dp_desc desc =3D { 0 }; > ^ >=20 > Change all instances in the amd gpu driver to using the GNU empty > initializer extension. >=20 > Signed-off-by: Arnd Bergmann > --- > drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 +- > drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c | 2 +- > drivers/gpu/drm/amd/display/dc/bios/command_table2.c | 4 ++-- > drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c | 2 +- > drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c | 6 +++--- > drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c | 6 +++--- > drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c | 2 +- > drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubp.c | 8 ++++---- > 8 files changed, 16 insertions(+), 16 deletions(-) >=20 > diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/= gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c > index 7f4417981bff..81ce3103d751 100644 > --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c > +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c > @@ -8695,7 +8695,7 @@ bool amdgpu_dm_psr_enable(struct dc_stream_state *s= tream) > { > struct dc_link *link =3D stream->link; > unsigned int vsync_rate_hz =3D 0; > - struct dc_static_screen_params params =3D {0}; > + struct dc_static_screen_params params =3D { }; > /* Calculate number of static frames before generating interrupt to > * enter PSR. > */ > diff --git a/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c b/drivers= /gpu/drm/amd/display/dc/bios/bios_parser2.c > index 37fa7b48250e..5484a316eaa8 100644 > --- a/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c > +++ b/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c > @@ -294,7 +294,7 @@ static enum bp_result bios_parser_get_i2c_info(struct= dc_bios *dcb, > struct atom_display_object_path_v2 *object; > struct atom_common_record_header *header; > struct atom_i2c_record *record; > - struct atom_i2c_record dummy_record =3D {0}; > + struct atom_i2c_record dummy_record =3D { }; > struct bios_parser *bp =3D BP_FROM_DCB(dcb); > =20 > if (!info) > diff --git a/drivers/gpu/drm/amd/display/dc/bios/command_table2.c b/drive= rs/gpu/drm/amd/display/dc/bios/command_table2.c > index 8edc2506d49e..5e186c135921 100644 > --- a/drivers/gpu/drm/amd/display/dc/bios/command_table2.c > +++ b/drivers/gpu/drm/amd/display/dc/bios/command_table2.c > @@ -113,7 +113,7 @@ static void encoder_control_dmcub( > struct dc_dmub_srv *dmcub, > struct dig_encoder_stream_setup_parameters_v1_5 *dig) > { > - struct dmub_rb_cmd_digx_encoder_control encoder_control =3D { 0 }; > + struct dmub_rb_cmd_digx_encoder_control encoder_control =3D { }; > =20 > encoder_control.header.type =3D DMUB_CMD__VBIOS; > encoder_control.header.sub_type =3D DMUB_CMD__VBIOS_DIGX_ENCODER_CONTRO= L; > @@ -339,7 +339,7 @@ static void set_pixel_clock_dmcub( > struct dc_dmub_srv *dmcub, > struct set_pixel_clock_parameter_v1_7 *clk) > { > - struct dmub_rb_cmd_set_pixel_clock pixel_clock =3D { 0 }; > + struct dmub_rb_cmd_set_pixel_clock pixel_clock =3D { }; > =20 > pixel_clock.header.type =3D DMUB_CMD__VBIOS; > pixel_clock.header.sub_type =3D DMUB_CMD__VBIOS_SET_PIXEL_CLOCK; > diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c b/= drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c > index 24c5765890fa..ee3ef5094fd1 100644 > --- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c > +++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c > @@ -698,7 +698,7 @@ void rn_clk_mgr_construct( > struct dccg *dccg) > { > struct dc_debug_options *debug =3D &ctx->dc->debug; > - struct dpm_clocks clock_table =3D { 0 }; > + struct dpm_clocks clock_table =3D { }; > =20 > clk_mgr->base.ctx =3D ctx; > clk_mgr->base.funcs =3D &dcn21_funcs; > diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c b/drivers/g= pu/drm/amd/display/dc/core/dc_link_dp.c > index 9ef9e50a34fa..7cbfe740a947 100644 > --- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c > +++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c > @@ -2683,9 +2683,9 @@ static void dp_test_send_link_test_pattern(struct d= c_link *link) > =20 > static void dp_test_get_audio_test_data(struct dc_link *link, bool disab= le_video) > { > - union audio_test_mode dpcd_test_mode =3D {0}; > - struct audio_test_pattern_type dpcd_pattern_type =3D {0}; > - union audio_test_pattern_period dpcd_pattern_period[AUDIO_CHANNELS_COU= NT] =3D {0}; > + union audio_test_mode dpcd_test_mode =3D { }; > + struct audio_test_pattern_type dpcd_pattern_type =3D { }; > + union audio_test_pattern_period dpcd_pattern_period[AUDIO_CHANNELS_COU= NT] =3D { }; > enum dp_test_pattern test_pattern =3D DP_TEST_PATTERN_AUDIO_OPERATOR_DE= FINED; > =20 > struct pipe_ctx *pipes =3D link->dc->current_state->res_ctx.pipe_ctx; > diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c b/drivers/= gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c > index 84d7ac5dd206..dfa541f0b0d3 100644 > --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c > +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c > @@ -1253,9 +1253,9 @@ void hubp2_validate_dml_output(struct hubp *hubp, > struct _vcs_dpi_display_ttu_regs_st *dml_ttu_attr) > { > struct dcn20_hubp *hubp2 =3D TO_DCN20_HUBP(hubp); > - struct _vcs_dpi_display_rq_regs_st rq_regs =3D {0}; > - struct _vcs_dpi_display_dlg_regs_st dlg_attr =3D {0}; > - struct _vcs_dpi_display_ttu_regs_st ttu_attr =3D {0}; > + struct _vcs_dpi_display_rq_regs_st rq_regs =3D { }; > + struct _vcs_dpi_display_dlg_regs_st dlg_attr =3D { }; > + struct _vcs_dpi_display_ttu_regs_st ttu_attr =3D { }; > DC_LOGGER_INIT(ctx->logger); > DC_LOG_DEBUG("DML Validation | Running Validation"); > =20 > diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c b/driv= ers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c > index 63044ae06327..509b07c24758 100644 > --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c > +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c > @@ -449,7 +449,7 @@ struct _vcs_dpi_soc_bounding_box_st dcn2_0_nv14_soc = =3D { > .use_urgent_burst_bw =3D 0 > }; > =20 > -struct _vcs_dpi_soc_bounding_box_st dcn2_0_nv12_soc =3D { 0 }; > +struct _vcs_dpi_soc_bounding_box_st dcn2_0_nv12_soc =3D { }; > =20 > #ifndef mmDP0_DP_DPHY_INTERNAL_CTRL > #define mmDP0_DP_DPHY_INTERNAL_CTRL 0x210f > diff --git a/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubp.c b/drivers/= gpu/drm/amd/display/dc/dcn21/dcn21_hubp.c > index d285ba622d61..654ea81b8ad6 100644 > --- a/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubp.c > +++ b/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubp.c > @@ -365,9 +365,9 @@ void hubp21_validate_dml_output(struct hubp *hubp, > struct _vcs_dpi_display_ttu_regs_st *dml_ttu_attr) > { > struct dcn21_hubp *hubp21 =3D TO_DCN21_HUBP(hubp); > - struct _vcs_dpi_display_rq_regs_st rq_regs =3D {0}; > - struct _vcs_dpi_display_dlg_regs_st dlg_attr =3D {0}; > - struct _vcs_dpi_display_ttu_regs_st ttu_attr =3D {0}; > + struct _vcs_dpi_display_rq_regs_st rq_regs =3D { }; > + struct _vcs_dpi_display_dlg_regs_st dlg_attr =3D { }; > + struct _vcs_dpi_display_ttu_regs_st ttu_attr =3D { }; > DC_LOGGER_INIT(ctx->logger); > DC_LOG_DEBUG("DML Validation | Running Validation"); > =20 > @@ -778,7 +778,7 @@ void dmcub_PLAT_54186_wa(struct hubp *hubp, struct su= rface_flip_registers *flip_ > { > struct dc_dmub_srv *dmcub =3D hubp->ctx->dmub_srv; > struct dcn21_hubp *hubp21 =3D TO_DCN21_HUBP(hubp); > - struct dmub_rb_cmd_PLAT_54186_wa PLAT_54186_wa =3D { 0 }; > + struct dmub_rb_cmd_PLAT_54186_wa PLAT_54186_wa =3D { }; > =20 > PLAT_54186_wa.header.type =3D DMUB_CMD__PLAT_54186_WA; > PLAT_54186_wa.flip.DCSURF_PRIMARY_SURFACE_ADDRESS =3D flip_regs->DCSURF= _PRIMARY_SURFACE_ADDRESS; > --=20 > 2.26.0 >=20 --=20 Rodrigo Siqueira https://siqueira.tech --m2374edgitgx3mth Content-Type: application/pgp-signature; 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Wed, 29 Apr 2020 00:29:11 +0000 Date: Tue, 28 Apr 2020 20:29:06 -0400 From: Rodrigo Siqueira To: Arnd Bergmann Subject: Re: [PATCH] amdgpu: fix gcc-4.8 build warnings Message-ID: <20200429002906.3bor7udoifo7q56h@outlook.office365.com> References: <20200428215541.4144749-1-arnd@arndb.de> In-Reply-To: <20200428215541.4144749-1-arnd@arndb.de> X-ClientProxiedBy: YTXPR0101CA0070.CANPRD01.PROD.OUTLOOK.COM (2603:10b6:b00:1::47) To MW2PR12MB2524.namprd12.prod.outlook.com (2603:10b6:907:9::27) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from outlook.office365.com (2607:fea8:56a0:11a1::4) by YTXPR0101CA0070.CANPRD01.PROD.OUTLOOK.COM (2603:10b6:b00:1::47) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2937.13 via Frontend Transport; Wed, 29 Apr 2020 00:29:10 +0000 X-Originating-IP: [2607:fea8:56a0:11a1::4] X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-HT: Tenant X-MS-Office365-Filtering-Correlation-Id: 0fd3c673-1226-4a2a-1a14-08d7ebd45659 X-MS-TrafficTypeDiagnostic: MW2PR12MB2458:|MW2PR12MB2458: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:8273; 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boundary="===============1863779374==" Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" --===============1863779374== Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="m2374edgitgx3mth" Content-Disposition: inline --m2374edgitgx3mth Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Thanks for your patch. Reviewed-by: Rodrigo Siqueira On 04/28, Arnd Bergmann wrote: > Older compilers warn about initializers with incorrect curly > braces: >=20 > drivers/gpu/drm/drm_dp_mst_topology.c: In function 'drm_dp_mst_dsc_aux_fo= r_port': > drivers/gpu/drm/drm_dp_mst_topology.c:5497:9: error: missing braces aroun= d initializer [-Werror=3Dmissing-braces] > struct drm_dp_desc desc =3D { 0 }; > ^ >=20 > Change all instances in the amd gpu driver to using the GNU empty > initializer extension. >=20 > Signed-off-by: Arnd Bergmann > --- > drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 +- > drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c | 2 +- > drivers/gpu/drm/amd/display/dc/bios/command_table2.c | 4 ++-- > drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c | 2 +- > drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c | 6 +++--- > drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c | 6 +++--- > drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c | 2 +- > drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubp.c | 8 ++++---- > 8 files changed, 16 insertions(+), 16 deletions(-) >=20 > diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/= gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c > index 7f4417981bff..81ce3103d751 100644 > --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c > +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c > @@ -8695,7 +8695,7 @@ bool amdgpu_dm_psr_enable(struct dc_stream_state *s= tream) > { > struct dc_link *link =3D stream->link; > unsigned int vsync_rate_hz =3D 0; > - struct dc_static_screen_params params =3D {0}; > + struct dc_static_screen_params params =3D { }; > /* Calculate number of static frames before generating interrupt to > * enter PSR. > */ > diff --git a/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c b/drivers= /gpu/drm/amd/display/dc/bios/bios_parser2.c > index 37fa7b48250e..5484a316eaa8 100644 > --- a/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c > +++ b/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c > @@ -294,7 +294,7 @@ static enum bp_result bios_parser_get_i2c_info(struct= dc_bios *dcb, > struct atom_display_object_path_v2 *object; > struct atom_common_record_header *header; > struct atom_i2c_record *record; > - struct atom_i2c_record dummy_record =3D {0}; > + struct atom_i2c_record dummy_record =3D { }; > struct bios_parser *bp =3D BP_FROM_DCB(dcb); > =20 > if (!info) > diff --git a/drivers/gpu/drm/amd/display/dc/bios/command_table2.c b/drive= rs/gpu/drm/amd/display/dc/bios/command_table2.c > index 8edc2506d49e..5e186c135921 100644 > --- a/drivers/gpu/drm/amd/display/dc/bios/command_table2.c > +++ b/drivers/gpu/drm/amd/display/dc/bios/command_table2.c > @@ -113,7 +113,7 @@ static void encoder_control_dmcub( > struct dc_dmub_srv *dmcub, > struct dig_encoder_stream_setup_parameters_v1_5 *dig) > { > - struct dmub_rb_cmd_digx_encoder_control encoder_control =3D { 0 }; > + struct dmub_rb_cmd_digx_encoder_control encoder_control =3D { }; > =20 > encoder_control.header.type =3D DMUB_CMD__VBIOS; > encoder_control.header.sub_type =3D DMUB_CMD__VBIOS_DIGX_ENCODER_CONTRO= L; > @@ -339,7 +339,7 @@ static void set_pixel_clock_dmcub( > struct dc_dmub_srv *dmcub, > struct set_pixel_clock_parameter_v1_7 *clk) > { > - struct dmub_rb_cmd_set_pixel_clock pixel_clock =3D { 0 }; > + struct dmub_rb_cmd_set_pixel_clock pixel_clock =3D { }; > =20 > pixel_clock.header.type =3D DMUB_CMD__VBIOS; > pixel_clock.header.sub_type =3D DMUB_CMD__VBIOS_SET_PIXEL_CLOCK; > diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c b/= drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c > index 24c5765890fa..ee3ef5094fd1 100644 > --- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c > +++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c > @@ -698,7 +698,7 @@ void rn_clk_mgr_construct( > struct dccg *dccg) > { > struct dc_debug_options *debug =3D &ctx->dc->debug; > - struct dpm_clocks clock_table =3D { 0 }; > + struct dpm_clocks clock_table =3D { }; > =20 > clk_mgr->base.ctx =3D ctx; > clk_mgr->base.funcs =3D &dcn21_funcs; > diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c b/drivers/g= pu/drm/amd/display/dc/core/dc_link_dp.c > index 9ef9e50a34fa..7cbfe740a947 100644 > --- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c > +++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c > @@ -2683,9 +2683,9 @@ static void dp_test_send_link_test_pattern(struct d= c_link *link) > =20 > static void dp_test_get_audio_test_data(struct dc_link *link, bool disab= le_video) > { > - union audio_test_mode dpcd_test_mode =3D {0}; > - struct audio_test_pattern_type dpcd_pattern_type =3D {0}; > - union audio_test_pattern_period dpcd_pattern_period[AUDIO_CHANNELS_COU= NT] =3D {0}; > + union audio_test_mode dpcd_test_mode =3D { }; > + struct audio_test_pattern_type dpcd_pattern_type =3D { }; > + union audio_test_pattern_period dpcd_pattern_period[AUDIO_CHANNELS_COU= NT] =3D { }; > enum dp_test_pattern test_pattern =3D DP_TEST_PATTERN_AUDIO_OPERATOR_DE= FINED; > =20 > struct pipe_ctx *pipes =3D link->dc->current_state->res_ctx.pipe_ctx; > diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c b/drivers/= gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c > index 84d7ac5dd206..dfa541f0b0d3 100644 > --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c > +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c > @@ -1253,9 +1253,9 @@ void hubp2_validate_dml_output(struct hubp *hubp, > struct _vcs_dpi_display_ttu_regs_st *dml_ttu_attr) > { > struct dcn20_hubp *hubp2 =3D TO_DCN20_HUBP(hubp); > - struct _vcs_dpi_display_rq_regs_st rq_regs =3D {0}; > - struct _vcs_dpi_display_dlg_regs_st dlg_attr =3D {0}; > - struct _vcs_dpi_display_ttu_regs_st ttu_attr =3D {0}; > + struct _vcs_dpi_display_rq_regs_st rq_regs =3D { }; > + struct _vcs_dpi_display_dlg_regs_st dlg_attr =3D { }; > + struct _vcs_dpi_display_ttu_regs_st ttu_attr =3D { }; > DC_LOGGER_INIT(ctx->logger); > DC_LOG_DEBUG("DML Validation | Running Validation"); > =20 > diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c b/driv= ers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c > index 63044ae06327..509b07c24758 100644 > --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c > +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c > @@ -449,7 +449,7 @@ struct _vcs_dpi_soc_bounding_box_st dcn2_0_nv14_soc = =3D { > .use_urgent_burst_bw =3D 0 > }; > =20 > -struct _vcs_dpi_soc_bounding_box_st dcn2_0_nv12_soc =3D { 0 }; > +struct _vcs_dpi_soc_bounding_box_st dcn2_0_nv12_soc =3D { }; > =20 > #ifndef mmDP0_DP_DPHY_INTERNAL_CTRL > #define mmDP0_DP_DPHY_INTERNAL_CTRL 0x210f > diff --git a/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubp.c b/drivers/= gpu/drm/amd/display/dc/dcn21/dcn21_hubp.c > index d285ba622d61..654ea81b8ad6 100644 > --- a/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubp.c > +++ b/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubp.c > @@ -365,9 +365,9 @@ void hubp21_validate_dml_output(struct hubp *hubp, > struct _vcs_dpi_display_ttu_regs_st *dml_ttu_attr) > { > struct dcn21_hubp *hubp21 =3D TO_DCN21_HUBP(hubp); > - struct _vcs_dpi_display_rq_regs_st rq_regs =3D {0}; > - struct _vcs_dpi_display_dlg_regs_st dlg_attr =3D {0}; > - struct _vcs_dpi_display_ttu_regs_st ttu_attr =3D {0}; > + struct _vcs_dpi_display_rq_regs_st rq_regs =3D { }; > + struct _vcs_dpi_display_dlg_regs_st dlg_attr =3D { }; > + struct _vcs_dpi_display_ttu_regs_st ttu_attr =3D { }; > DC_LOGGER_INIT(ctx->logger); > DC_LOG_DEBUG("DML Validation | Running Validation"); > =20 > @@ -778,7 +778,7 @@ void dmcub_PLAT_54186_wa(struct hubp *hubp, struct su= rface_flip_registers *flip_ > { > struct dc_dmub_srv *dmcub =3D hubp->ctx->dmub_srv; > struct dcn21_hubp *hubp21 =3D TO_DCN21_HUBP(hubp); > - struct dmub_rb_cmd_PLAT_54186_wa PLAT_54186_wa =3D { 0 }; > + struct dmub_rb_cmd_PLAT_54186_wa PLAT_54186_wa =3D { }; > =20 > PLAT_54186_wa.header.type =3D DMUB_CMD__PLAT_54186_WA; > PLAT_54186_wa.flip.DCSURF_PRIMARY_SURFACE_ADDRESS =3D flip_regs->DCSURF= _PRIMARY_SURFACE_ADDRESS; > --=20 > 2.26.0 >=20 --=20 Rodrigo Siqueira https://siqueira.tech --m2374edgitgx3mth Content-Type: application/pgp-signature; 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