From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 910F1C83007 for ; Wed, 29 Apr 2020 09:02:56 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7170F2076B for ; Wed, 29 Apr 2020 09:02:56 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 7170F2076B Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 222726EC4D; Wed, 29 Apr 2020 09:02:56 +0000 (UTC) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTPS id 4EC526EC4D for ; Wed, 29 Apr 2020 09:02:53 +0000 (UTC) IronPort-SDR: WOIgnb3jlbtCneAzjCB+q17jEfLo7wVzW7yMP7S7WDxNURP0eL+/79BshoiXKubrFdU5SJAw4M iFbF+V3SCsVw== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Apr 2020 02:02:53 -0700 IronPort-SDR: odrBaWs4SgWQn8B9ezJz5c98mMWya05mJz6YrCDgfi0NoHv3iQD7Y4V8rFlMMiTThywW6uCwqv 6byybjxXPO/Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.73,331,1583222400"; d="scan'208";a="246784868" Received: from unknown (HELO delly.ger.corp.intel.com) ([10.252.38.205]) by orsmga007.jf.intel.com with ESMTP; 29 Apr 2020 02:02:51 -0700 From: Lionel Landwerlin To: intel-gfx@lists.freedesktop.org Date: Wed, 29 Apr 2020 12:02:42 +0300 Message-Id: <20200429090242.978170-5-lionel.g.landwerlin@intel.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200429090242.978170-1-lionel.g.landwerlin@intel.com> References: <20200429090242.978170-1-lionel.g.landwerlin@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v9 4/4] drm/i915/perf: enable filtering on multiple contexts X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: chris@chris-wilson.co.uk Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Add 2 new properties to the i915-perf open ioctl to specify an array of GEM context handles as well as the length of the array. This can be used by drivers using multiple GEM contexts to implement a single GL context. Signed-off-by: Lionel Landwerlin --- drivers/gpu/drm/i915/i915_perf.c | 58 ++++++++++++++++++++++++++++++-- include/uapi/drm/i915_drm.h | 21 ++++++++++++ 2 files changed, 76 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c index eb9aa3e3f804..c1dcb7a4b7aa 100644 --- a/drivers/gpu/drm/i915/i915_perf.c +++ b/drivers/gpu/drm/i915/i915_perf.c @@ -3711,7 +3711,8 @@ static int read_properties_unlocked(struct i915_perf *perf, struct perf_open_properties *props) { u64 __user *uprop = uprops; - u32 i; + u32 __user *uctx_handles = NULL; + u32 i, n_uctx_handles = 0; int err; memset(props, 0, sizeof(struct perf_open_properties)); @@ -3762,7 +3763,7 @@ static int read_properties_unlocked(struct i915_perf *perf, switch ((enum drm_i915_perf_property_id)id) { case DRM_I915_PERF_PROP_CTX_HANDLE: - if (props->n_ctx_handles > 0) { + if (props->n_ctx_handles > 0 || n_uctx_handles > 0) { DRM_DEBUG("Context handle specified multiple times\n"); err = -EINVAL; goto error; @@ -3876,6 +3877,38 @@ static int read_properties_unlocked(struct i915_perf *perf, } props->poll_oa_period = value; break; + case DRM_I915_PERF_PROP_CTX_HANDLE_ARRAY: + /* HSW can only filter in HW and only on a single + * context. + */ + if (IS_HASWELL(perf->i915)) { + DRM_DEBUG("Multi context filter not supported on HSW\n"); + err = -ENODEV; + goto error; + } + uctx_handles = u64_to_user_ptr(value); + break; + case DRM_I915_PERF_PROP_CTX_HANDLE_ARRAY_LENGTH: + if (IS_HASWELL(perf->i915)) { + DRM_DEBUG("Multi context filter not supported on HSW\n"); + err = -ENODEV; + goto error; + } + if (props->n_ctx_handles > 0 || n_uctx_handles > 0) { + DRM_DEBUG("Context handle specified multiple times\n"); + err = -EINVAL; + goto error; + } + props->ctx_handles = + kmalloc_array(value, + sizeof(*props->ctx_handles), + GFP_KERNEL); + if (!props->ctx_handles) { + err = -ENOMEM; + goto error; + } + n_uctx_handles = value; + break; case DRM_I915_PERF_PROP_MAX: MISSING_CASE(id); err = -EINVAL; @@ -3885,6 +3918,21 @@ static int read_properties_unlocked(struct i915_perf *perf, uprop += 2; } + if (n_uctx_handles > 0 && props->n_ctx_handles > 0) { + DRM_DEBUG("Context handle specified multiple times\n"); + err = -EINVAL; + goto error; + } + + for (i = 0; i < n_uctx_handles; i++) { + err = get_user(props->ctx_handles[i], uctx_handles); + if (err) + goto error; + + uctx_handles++; + props->n_ctx_handles++; + } + return 0; error: @@ -4668,8 +4716,12 @@ int i915_perf_ioctl_version(void) * * 5: Add DRM_I915_PERF_PROP_POLL_OA_PERIOD parameter that controls the * interval for the hrtimer used to check for OA data. + * + * 6: Add DRM_I915_PERF_PROP_CTX_HANDLE_ARRAY & + * DRM_I915_PERF_PROP_CTX_HANDLE_ARRAY_LENGTH to allow an + * application monitor/pin multiple contexts. */ - return 5; + return 6; } #if IS_ENABLED(CONFIG_DRM_I915_SELFTEST) diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h index 14b67cd6b54b..f80e7932d728 100644 --- a/include/uapi/drm/i915_drm.h +++ b/include/uapi/drm/i915_drm.h @@ -1993,6 +1993,27 @@ enum drm_i915_perf_property_id { */ DRM_I915_PERF_PROP_POLL_OA_PERIOD, + /** + * Specifies an array of u32 GEM context handles to filter reports + * with. + * + * Using this parameter is incompatible with using + * DRM_I915_PERF_PROP_CTX_HANDLE. + * + * This property is available in perf revision 6. + */ + DRM_I915_PERF_PROP_CTX_HANDLE_ARRAY, + + /** + * Specifies the length of the array specified with + * DRM_I915_PERF_PROP_CTX_HANDLE_ARRAY. + * + * The length must be in the range [1, 4]. + * + * This property is available in perf revision 6. + */ + DRM_I915_PERF_PROP_CTX_HANDLE_ARRAY_LENGTH, + DRM_I915_PERF_PROP_MAX /* non-ABI */ }; -- 2.26.2 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx