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From: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
To: Huacai Chen <chenhc@lemote.com>
Cc: linux-mips@vger.kernel.org, Fuxin Zhang <zhangfx@lemote.com>,
	Zhangjin Wu <wuzhangjin@gmail.com>,
	Huacai Chen <chenhuacai@gmail.com>,
	Jiaxun Yang <jiaxun.yang@flygoat.com>
Subject: Re: [PATCH V2] MIPS: perf: Add hardware perf events support for new Loongson-3
Date: Wed, 29 Apr 2020 20:22:32 +0200	[thread overview]
Message-ID: <20200429182231.GA21158@alpha.franken.de> (raw)
In-Reply-To: <1588145170-9451-1-git-send-email-chenhc@lemote.com>

On Wed, Apr 29, 2020 at 03:26:10PM +0800, Huacai Chen wrote:
> New Loongson-3 means Loongson-3A R2 (Loongson-3A2000) and newer CPUs.
> Loongson-3 processors have three types of PMU types (so there are three
> event maps): Loongson-3A1000/Loonngson-3B1000/Loongson-3B1500 is Type-1,
> Loongson-3A2000/Loongson-3A3000 is Type-2, Loongson-3A4000+ is Type-3.
> 
> Signed-off-by: Huacai Chen <chenhc@lemote.com>
> ---
>  .../asm/mach-loongson64/cpu-feature-overrides.h    |   1 +
>  arch/mips/kernel/perf_event_mipsxx.c               | 358 +++++++++++++++++++--

checkpatch warns about missing break/fallthrough statement and indention
problems, could please look at this ? And as all the new code is only
usefull for loongsoon CPUs could you try to only compile it in, if it's
enabled for the image ?

Thomas.

-- 
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea.                                                [ RFC1925, 2.3 ]

  reply	other threads:[~2020-04-29 18:33 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-04-29  7:26 [PATCH V2] MIPS: perf: Add hardware perf events support for new Loongson-3 Huacai Chen
2020-04-29 18:22 ` Thomas Bogendoerfer [this message]
2020-04-30  7:30   ` Huacai Chen
2020-04-30  8:13     ` Thomas Bogendoerfer
2020-04-30  9:42       ` Huacai Chen
2020-04-30 15:10         ` Thomas Bogendoerfer

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