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X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: DX3TiNaBit1WJJ2IXHpRrlj7Nd31Z1lPJ1raNJu2gIc6JU82PrMjhq51XuOYRe+0iZ4GjGZj2jJvYBMqYmG+mmrglnrtBy1wtwdW2BlJwHIfZQBnZgvq9Ftt2JQF/n6TWgEckqZUxrAmA6XD5yKgzhQl7blZQeTNg4LxvYhtbXRpPKPgEZg9uLOoWS4psciqKOrGzJTXACKCulZe20YMz+8opqPIMy/6B7lxdTVcy++VuJFFWzV/26CxpM9ypp1GUu/pDA/BZTULb/okncLd9yKkvYugMNCMb9Q9QeR3+M8zYn0/BZDtHjAErWsDF6n1jBTP1YQIM32xTR9nUlsDk/1Fg4yuuWAqeem2KKb3wEvhvqQwkrFDDaZ354HSV6oruM5W0FagDXusY+9ySixWPkhM3Vu9GXTgzX3oQps6fnW2DKMWaUqXqWxL9pv5HogJPNF3mKMZbMRFI390M5nRFhbAmu/eG1MLJPlxILgCRAtuHWIbm2JsjQKyMt73wtP3ZeOrQlzyupVJxhC8B3FrQQ== X-MS-Exchange-AntiSpam-MessageData: iEUx9eNooNBJ6sjBqjD9ozxAY8wF6MY0uFEzIFRj4ehBotD/fig16HGWIlIcmO8kUFH45SbFd/73nziuav3fkx0USv+Z1JKyMtI/awHICoHRTPDnp9WHmQrD60dKkuMytmIbkFlxYY1Dpv6jaeatHVYq2OuqNnXox5yElhys7EnWpRMmNN2/5QydMmwwWsVWS8yqJ6QEVUJmo74IQpCjWJeTMLUpnKvQ5XisYtm6Z8tAejLdgofkl2Ha3wR3woS3svpjXQCOGn7eydykACvdLZrYFhfP+jfyfZ5AYDRJHv05oJqRTGpbjaA7ulvVC257my3lXsofVnvNYgYnlyVxVffbjWUHyz4gwLt8S3VPtYK9DsLzMfreM0vfv4WAFVWQg4pEBZdsTHs6yMBiP8E989mB7dwkC3uchPTHornV9e8NIW4iupZp0BZP9RFT/AzaDqZJqaAEstGfrGmw1yM2Dvp7e1HO8UckJg/m1zulowRGru1/ZB+U0ZcEaGQKfNH/iG8oxBgUwEmyfuC2u17JBwTgXKVlTxy37CmBphfvj5nQOJFV1IeNLW6n/leWSNqc4XRJuyKI/zdjqxF2HpF6AYB2HdN7ErasV7Wl8rwzP/biubIeg0VXr8YcL1vRslZqeB/ibqadWEB6/rxgBGzogXqVOIj/U9nAyDXrkySVZwqG+UjiKqOT2c5ei04Y0wQPbEDb7XpmDSRQPAKWo5G3ec/cxAtrH9Oe+2MIy7uFDHG05Dy2zZOkYumy1xQaTP+xCSL+HdTK95SneazfDHki1bKlaxnvOkG4N2t+xGKMj07C14WwEW0gn/WRB0gRY1hj X-OriginatorOrg: analogixsemi.com X-MS-Exchange-CrossTenant-Network-Message-Id: bb8a6d22-0e4c-44f9-033e-08d7ed0ea2c0 X-MS-Exchange-CrossTenant-OriginalArrivalTime: 30 Apr 2020 13:59:01.4192 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: b099b0b4-f26c-4cf5-9a0f-d5be9acab205 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: PtTwQUkPtDVHLz+5lBzeay7bHLZ4w04qm1Vseg1ReJOkm1MMDOJBQHoWlgqbNW739+iHG6g9ekYzw8zLzz8S+A== X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY5PR04MB7105 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Apr 30, 2020 at 03:54:38PM +0200, Daniel Vetter wrote: > On Thu, Apr 30, 2020 at 09:47:46PM +0800, Xin Ji wrote: > > Hi Daniel, > > > > On Thu, Apr 30, 2020 at 03:38:39PM +0200, Daniel Vetter wrote: > > > On Thu, Apr 30, 2020 at 03:37:31PM +0200, Daniel Vetter wrote: > > > > On Thu, Apr 30, 2020 at 11:36:14AM +0800, Xin Ji wrote: > > > > > On Tue, Apr 28, 2020 at 12:05:08PM +0200, Daniel Vetter wrote: > > > > > > On Fri, Apr 24, 2020 at 08:12:04PM +0800, Nicolas Boichat wrote: > > > > > > > On Fri, Apr 24, 2020 at 2:51 PM Xin Ji wrote: > > > > > > > > > > > > > > > > On Thu, Apr 23, 2020 at 07:55:15PM +0800, Nicolas Boichat wrote: > > > > > > > > > Hi, > > > > > > > > > > > > > > > > > > Just commenting on the mode_fixup function that was added in v7. > > > > > > > > > > > > > > > > > [snip] > > > > > > > > > > + /* > > > > > > > > > > + * once illegal timing detected, use default HFP, HSYNC, HBP > > > > > > > > > > + */ > > > > > > > > > > + if (hblanking < HBLANKING_MIN || (hfp < HP_MIN && hbp < HP_MIN)) { > > > > > > > > > > > > > > > > > > should this be adj_hblanking/adj_hfp/adj_hbp? > > > > > > > > NO, need check original HFP and HBP, if they are not legal, driver need > > > > > > > > set default value to adj_hsync, adj_hfp, adj_hbp. > > > > > > > > > > > > > > > > > > > + adj_hsync = SYNC_LEN_DEF; > > > > > > > > > > + adj_hfp = HFP_HBP_DEF; > > > > > > > > > > + adj_hbp = HFP_HBP_DEF; > > > > > > > > > > + vref = adj->clock * 1000 / (adj->htotal * adj->vtotal); > > > > > > > > > > + if (hblanking < HBLANKING_MIN) { > > > > > > > > > > + delta_adj = HBLANKING_MIN - hblanking; > > > > > > > > > > + adj_clock = vref * delta_adj * adj->vtotal; > > > > > > > > > > + adj->clock += DIV_ROUND_UP(adj_clock, 1000); > > > > > > > > > > + } else { > > > > > > > > > > + delta_adj = hblanking - HBLANKING_MIN; > > > > > > > > > > + adj_clock = vref * delta_adj * adj->vtotal; > > > > > > > > > > + adj->clock -= DIV_ROUND_UP(adj_clock, 1000); > > > > > > > > > > + } > > > > > > > > > > + > > > > > > > > > > + DRM_WARN("illegal hblanking timing, use default.\n"); > > > > > > > > > > + DRM_WARN("hfp(%d),hbp(%d),hsync(%d).\n", hfp, hbp, hsync); > > > > > > > > > > > > > > > > > > How likely is it that this mode is going to work? Can you just return > > > > > > > > > false here to reject the mode? > > > > > > > > We want to set the default minimal Hblancking value, then it may display, > > > > > > > > otherwise. If we just return false, there is no display for sure. > > > > > > > > > > > > > > Right, understand your argument. I'm pondering if it's not just better > > > > > > > to reject the mode rather than trying a timing that is definitely > > > > > > > quite different from what the monitor was asking for. No super strong > > > > > > > opinion, I'll let other people on the list weigh in. > > > > > > > > > > > > Yeah mode_fixup is supposed to be used to adjust the mode in intermediate > > > > > > stages (e.g. if you go from progressive to interlaced only at the end of > > > > > > your pipeline or something like that). It's not meant for adjusting the > > > > > > mode yout actually put out through a hdmi or dp connector. For fixed > > > > > > panels adjusting modes to fit the panel is also fairly common, but not for > > > > > > external outputs. > > > > > > > > > > > > Since this is a DP bridge I'd say no adjusting, just reject what doesn't > > > > > > fit. > > > > > We have found some panel which HBP less than 8, if we reject to adjust > > > > > video timing, then there is no display. The customer does not accept it, > > > > > they push us to fix it, the only resolve way is to adjust timing. > > > > > > > > Are we talking about external DP screen here, or some built-in panel? For > > > > the later case we do a lot of mode adjusting in many drivers ... > > > > > > > > I haven't checked, by if our connector type is eDP then this should be all > > > > fine. > > > > > > Ok I read the patch now, you seem to support both. Would it work if we > > > make this adjustement conditional on it being an internal panel only? I > > > think that would be perfect. > > > -Daniel > > > -- > > > Daniel Vetter > > > Software Engineer, Intel Corporation > > Based on comments of V8, only keeped eDP built-in panel in V9 version, > > removed external DP screen support. > > Ah even better. Then the above adjusting has my: > > Acked-by: Daniel Vetter > > Maybe add a comment to the code summarizing the discussion. Definitely > needs to be covered in the commit message. OK, I'll add it in the next serial. Thanks, Xin > > Thanks, Daniel > -- > Daniel Vetter > Software Engineer, Intel Corporation > http://blog.ffwll.ch From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.0 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,MSGID_FROM_MTA_HEADER, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7CB7FC47259 for ; Fri, 1 May 2020 07:24:07 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 52867214D8 for ; Fri, 1 May 2020 07:24:07 +0000 (UTC) Authentication-Results: mail.kernel.org; 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charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" On Thu, Apr 30, 2020 at 03:54:38PM +0200, Daniel Vetter wrote: > On Thu, Apr 30, 2020 at 09:47:46PM +0800, Xin Ji wrote: > > Hi Daniel, > > > > On Thu, Apr 30, 2020 at 03:38:39PM +0200, Daniel Vetter wrote: > > > On Thu, Apr 30, 2020 at 03:37:31PM +0200, Daniel Vetter wrote: > > > > On Thu, Apr 30, 2020 at 11:36:14AM +0800, Xin Ji wrote: > > > > > On Tue, Apr 28, 2020 at 12:05:08PM +0200, Daniel Vetter wrote: > > > > > > On Fri, Apr 24, 2020 at 08:12:04PM +0800, Nicolas Boichat wrote: > > > > > > > On Fri, Apr 24, 2020 at 2:51 PM Xin Ji wrote: > > > > > > > > > > > > > > > > On Thu, Apr 23, 2020 at 07:55:15PM +0800, Nicolas Boichat wrote: > > > > > > > > > Hi, > > > > > > > > > > > > > > > > > > Just commenting on the mode_fixup function that was added in v7. > > > > > > > > > > > > > > > > > [snip] > > > > > > > > > > + /* > > > > > > > > > > + * once illegal timing detected, use default HFP, HSYNC, HBP > > > > > > > > > > + */ > > > > > > > > > > + if (hblanking < HBLANKING_MIN || (hfp < HP_MIN && hbp < HP_MIN)) { > > > > > > > > > > > > > > > > > > should this be adj_hblanking/adj_hfp/adj_hbp? > > > > > > > > NO, need check original HFP and HBP, if they are not legal, driver need > > > > > > > > set default value to adj_hsync, adj_hfp, adj_hbp. > > > > > > > > > > > > > > > > > > > + adj_hsync = SYNC_LEN_DEF; > > > > > > > > > > + adj_hfp = HFP_HBP_DEF; > > > > > > > > > > + adj_hbp = HFP_HBP_DEF; > > > > > > > > > > + vref = adj->clock * 1000 / (adj->htotal * adj->vtotal); > > > > > > > > > > + if (hblanking < HBLANKING_MIN) { > > > > > > > > > > + delta_adj = HBLANKING_MIN - hblanking; > > > > > > > > > > + adj_clock = vref * delta_adj * adj->vtotal; > > > > > > > > > > + adj->clock += DIV_ROUND_UP(adj_clock, 1000); > > > > > > > > > > + } else { > > > > > > > > > > + delta_adj = hblanking - HBLANKING_MIN; > > > > > > > > > > + adj_clock = vref * delta_adj * adj->vtotal; > > > > > > > > > > + adj->clock -= DIV_ROUND_UP(adj_clock, 1000); > > > > > > > > > > + } > > > > > > > > > > + > > > > > > > > > > + DRM_WARN("illegal hblanking timing, use default.\n"); > > > > > > > > > > + DRM_WARN("hfp(%d),hbp(%d),hsync(%d).\n", hfp, hbp, hsync); > > > > > > > > > > > > > > > > > > How likely is it that this mode is going to work? Can you just return > > > > > > > > > false here to reject the mode? > > > > > > > > We want to set the default minimal Hblancking value, then it may display, > > > > > > > > otherwise. If we just return false, there is no display for sure. > > > > > > > > > > > > > > Right, understand your argument. I'm pondering if it's not just better > > > > > > > to reject the mode rather than trying a timing that is definitely > > > > > > > quite different from what the monitor was asking for. No super strong > > > > > > > opinion, I'll let other people on the list weigh in. > > > > > > > > > > > > Yeah mode_fixup is supposed to be used to adjust the mode in intermediate > > > > > > stages (e.g. if you go from progressive to interlaced only at the end of > > > > > > your pipeline or something like that). It's not meant for adjusting the > > > > > > mode yout actually put out through a hdmi or dp connector. For fixed > > > > > > panels adjusting modes to fit the panel is also fairly common, but not for > > > > > > external outputs. > > > > > > > > > > > > Since this is a DP bridge I'd say no adjusting, just reject what doesn't > > > > > > fit. > > > > > We have found some panel which HBP less than 8, if we reject to adjust > > > > > video timing, then there is no display. The customer does not accept it, > > > > > they push us to fix it, the only resolve way is to adjust timing. > > > > > > > > Are we talking about external DP screen here, or some built-in panel? For > > > > the later case we do a lot of mode adjusting in many drivers ... > > > > > > > > I haven't checked, by if our connector type is eDP then this should be all > > > > fine. > > > > > > Ok I read the patch now, you seem to support both. Would it work if we > > > make this adjustement conditional on it being an internal panel only? I > > > think that would be perfect. > > > -Daniel > > > -- > > > Daniel Vetter > > > Software Engineer, Intel Corporation > > Based on comments of V8, only keeped eDP built-in panel in V9 version, > > removed external DP screen support. > > Ah even better. Then the above adjusting has my: > > Acked-by: Daniel Vetter > > Maybe add a comment to the code summarizing the discussion. Definitely > needs to be covered in the commit message. OK, I'll add it in the next serial. Thanks, Xin > > Thanks, Daniel > -- > Daniel Vetter > Software Engineer, Intel Corporation > http://blog.ffwll.ch _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel