From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.6 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4EEC9C47254 for ; Tue, 5 May 2020 15:53:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 22DE9207DD for ; Tue, 5 May 2020 15:53:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1588693998; bh=So3dphj430fGwwjdsofxgM6YB/R/oxc1hD/OFKcyzz8=; h=Date:From:To:Cc:Subject:References:In-Reply-To:List-ID:From; b=mWtJhJSmMzJXqovxAePxQNVW67eI3GdlMaJSXI/8dKxt0FH2YK+v43PsC3QKTpu2Z atkYnnP1QdZlrHPY+y4uDjNRVMN9T0LHpR0pj7Oka8AYE7rC6/h+dJ4eP9ZrPPzGBB duj/FKGP3IogLBvcVbLO2j0wBZ2HTxdrqlkRNOII= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729877AbgEEPxR (ORCPT ); Tue, 5 May 2020 11:53:17 -0400 Received: from mail-oo1-f65.google.com ([209.85.161.65]:43259 "EHLO mail-oo1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729317AbgEEPxR (ORCPT ); Tue, 5 May 2020 11:53:17 -0400 Received: by mail-oo1-f65.google.com with SMTP id u190so647437ooa.10; Tue, 05 May 2020 08:53:15 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=lfV1gzGImb5y9zDagXhYeAWYcO3glmlW0YzZP/45Hw8=; b=I7SOBHt00MZeueuFe0vg9eVg4OPj4uA6QqufWUQHZgV381aulzNlIgrRQyAGsDG2HL 8k/n/emfA7LA4/nM6SeOQ3EDgM8edjQyYU9BJ3GYuKwGAK0JUNEkH2FJe/NqxZoKf4wG DBKcnjGUSFP6n/rnPiwZSnAqmqzHrLJjlEoaIEP0qW+Js3eHv6XVI+q+VZhJjofiXGAk vu0A0XLtWF20d3ZTQrnbnka7Ek3zUH2W4g98aPvdEE8iUUYziWmkRX3xYc+Cz8uXj2AB AF2LdXDqO2DZAteK3KlJnbenzh9aCGBr5sL29xQOMTQhwuGtm7O5MzYByKMS3owMrbXN Fzeg== X-Gm-Message-State: AGi0PuZeM19s9cwYbCe0pTqIFgK8OZQyR3Oh7Kb3zn9ZMgfUz/Vua+An U47OwE892aDiBMXgB+apgg== X-Google-Smtp-Source: APiQypLtIV8ak24vn6ZNq3eBD5EyBjX4NVkzOn+K6qenA30N/hf35pu91WLQRD5MnvXauIX1IuWX8g== X-Received: by 2002:a4a:3402:: with SMTP id b2mr464231ooa.86.1588693994014; Tue, 05 May 2020 08:53:14 -0700 (PDT) Received: from rob-hp-laptop (24-155-109-49.dyn.grandenetworks.net. [24.155.109.49]) by smtp.gmail.com with ESMTPSA id s73sm652032oih.14.2020.05.05.08.53.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 05 May 2020 08:53:13 -0700 (PDT) Received: (nullmailer pid 23489 invoked by uid 1000); Tue, 05 May 2020 15:53:11 -0000 Date: Tue, 5 May 2020 10:53:11 -0500 From: Rob Herring To: "H. Nikolaus Schaller" Cc: David Airlie , Daniel Vetter , Mark Rutland , =?iso-8859-1?Q?Beno=EEt?= Cousson , Tony Lindgren , Paul Cercueil , Ralf Baechle , Paul Burton , James Hogan , Kukjin Kim , Krzysztof Kozlowski , Maxime Ripard , Chen-Yu Tsai , Thomas Bogendoerfer , Jonathan Bakker , Philipp Rossak , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-omap@vger.kernel.org, openpvrsgx-devgroup@letux.org, letux-kernel@openphoenux.org, kernel@pyra-handheld.com, linux-mips@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Subject: Re: [PATCH v7 01/12] dt-bindings: add img,pvrsgx.yaml for Imagination GPUs Message-ID: <20200505155311.GA18025@bogus> References: <3a451e360fed84bc40287678b4d6be13821cfbc0.1587760454.git.hns@goldelico.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <3a451e360fed84bc40287678b4d6be13821cfbc0.1587760454.git.hns@goldelico.com> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Apr 24, 2020 at 10:34:04PM +0200, H. Nikolaus Schaller wrote: > The Imagination PVR/SGX GPU is part of several SoC from > multiple vendors, e.g. TI OMAP, Ingenic JZ4780, Intel Poulsbo, > Allwinner A83 and others. > > With this binding, we describe how the SGX processor is > interfaced to the SoC (registers and interrupt). > > The interface also consists of clocks, reset, power but > information from data sheets is vague and some SoC integrators > (TI) deciced to use a PRCM wrapper (ti,sysc) which does > all clock, reset and power-management through registers > outside of the sgx register block. > > Therefore all these properties are optional. > > Tested by make dt_binding_check > > Signed-off-by: H. Nikolaus Schaller > --- > .../devicetree/bindings/gpu/img,pvrsgx.yaml | 150 ++++++++++++++++++ > 1 file changed, 150 insertions(+) > create mode 100644 Documentation/devicetree/bindings/gpu/img,pvrsgx.yaml > > diff --git a/Documentation/devicetree/bindings/gpu/img,pvrsgx.yaml b/Documentation/devicetree/bindings/gpu/img,pvrsgx.yaml > new file mode 100644 > index 000000000000..33a9c4c6e784 > --- /dev/null > +++ b/Documentation/devicetree/bindings/gpu/img,pvrsgx.yaml > @@ -0,0 +1,150 @@ > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/gpu/img,pvrsgx.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Imagination PVR/SGX GPU > + > +maintainers: > + - H. Nikolaus Schaller > + > +description: |+ > + This binding describes the Imagination SGX5 series of 3D accelerators which > + are found in several different SoC like TI OMAP, Sitara, Ingenic JZ4780, > + Allwinner A83, and Intel Poulsbo and CedarView and more. > + > + For an extensive list see: https://en.wikipedia.org/wiki/PowerVR#Implementations > + > + The SGX node is usually a child node of some DT node belonging to the SoC > + which handles clocks, reset and general address space mapping of the SGX > + register area. If not, an optional clock can be specified here. > + > +properties: > + $nodename: > + pattern: '^gpu@[a-f0-9]+$' > + compatible: > + oneOf: > + - description: SGX530-121 based SoC > + items: > + - enum: > + - ti,omap3-sgx530-121 # BeagleBoard A/B/C, OpenPandora 600MHz and similar Should be indented 2 more here and elsewhere where you have a list under a list. > + - const: img,sgx530-121 > + - const: img,sgx530 > + > + - description: SGX530-125 based SoC > + items: > + - enum: > + - ti,am3352-sgx530-125 # BeagleBone Black > + - ti,am3517-sgx530-125 > + - ti,am4-sgx530-125 > + - ti,omap3-sgx530-125 # BeagleBoard XM, GTA04, OpenPandora 1GHz and similar > + - ti,ti81xx-sgx530-125 > + - const: ti,omap3-sgx530-125 > + - const: img,sgx530-125 > + - const: img,sgx530 > + > + - description: SGX535-116 based SoC > + items: > + - const: intel,poulsbo-gma500-sgx535 # Atom Z5xx > + - const: img,sgx535-116 > + - const: img,sgx535 > + > + - description: SGX540-116 based SoC > + items: > + - const: intel,medfield-gma-sgx540 # Atom Z24xx > + - const: img,sgx540-116 > + - const: img,sgx540 > + > + - description: SGX540-120 based SoC > + items: > + - enum: > + - samsung,s5pv210-sgx540-120 > + - ti,omap4-sgx540-120 # Pandaboard, Pandaboard ES and similar > + - const: img,sgx540-120 > + - const: img,sgx540 > + > + - description: SGX540-130 based SoC > + items: > + - enum: > + - ingenic,jz4780-sgx540-130 # CI20 > + - const: img,sgx540-130 > + - const: img,sgx540 > + > + - description: SGX544-112 based SoC > + items: > + - const: ti,omap4470-sgx544-112 > + - const: img,sgx544-112 > + - const: img,sgx544 > + > + - description: SGX544-115 based SoC > + items: > + - enum: > + - allwinner,sun8i-a31-sgx544-115 > + - allwinner,sun8i-a31s-sgx544-115 > + - allwinner,sun8i-a83t-sgx544-115 # Banana-Pi-M3 (Allwinner A83T) and similar > + - const: img,sgx544-115 > + - const: img,sgx544 > + > + - description: SGX544-116 based SoC > + items: > + - enum: > + - ti,dra7-sgx544-116 # DRA7 > + - ti,omap5-sgx544-116 # OMAP5 UEVM, Pyra Handheld and similar > + - const: img,sgx544-116 > + - const: img,sgx544 > + > + - description: SGX545 based SoC > + items: > + - const: intel,cedarview-gma3600-sgx545 # Atom N2600, D2500 > + - const: img,sgx545-116 > + - const: img,sgx545 > + > + reg: > + maxItems: 1 > + > + interrupts: > + maxItems: 1 > + > + interrupt-names: > + maxItems: 1 > + items: > + - const: sgx > + > + clocks: > + maxItems: 4 > + > + clock-names: > + maxItems: 4 > + items: > + - const: core > + - const: sys > + - const: mem > + - const: hyd > + > + sgx-supply: true > + > + power-domains: > + maxItems: 1 > + > + resets: > + maxItems: 1 > + > +required: > + - compatible > + - reg > + - interrupts > + > +additionalProperties: false > + > +examples: > + - |+ > + #include > + > + gpu: gpu@fe00 { > + compatible = "ti,omap5-sgx544-116", "img,sgx544-116", "img,sgx544"; > + reg = <0xfe00 0x200>; > + interrupts = ; > + }; > + > +... > -- > 2.25.1 > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.5 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B05FDC4725B for ; Tue, 5 May 2020 15:53:19 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 865392495A for ; Tue, 5 May 2020 15:53:19 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="kHsP4Y8r" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 865392495A Authentication-Results: mail.kernel.org; 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[24.155.109.49]) by smtp.gmail.com with ESMTPSA id s73sm652032oih.14.2020.05.05.08.53.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 05 May 2020 08:53:13 -0700 (PDT) Received: (nullmailer pid 23489 invoked by uid 1000); Tue, 05 May 2020 15:53:11 -0000 Date: Tue, 5 May 2020 10:53:11 -0500 From: Rob Herring To: "H. Nikolaus Schaller" Subject: Re: [PATCH v7 01/12] dt-bindings: add img,pvrsgx.yaml for Imagination GPUs Message-ID: <20200505155311.GA18025@bogus> References: <3a451e360fed84bc40287678b4d6be13821cfbc0.1587760454.git.hns@goldelico.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <3a451e360fed84bc40287678b4d6be13821cfbc0.1587760454.git.hns@goldelico.com> User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200505_085316_477522_CFAD44A3 X-CRM114-Status: GOOD ( 20.22 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , David Airlie , James Hogan , Jonathan Bakker , dri-devel@lists.freedesktop.org, linux-mips@vger.kernel.org, Paul Cercueil , linux-omap@vger.kernel.org, Paul Burton , Krzysztof Kozlowski , Tony Lindgren , Chen-Yu Tsai , Kukjin Kim , devicetree@vger.kernel.org, =?iso-8859-1?Q?Beno=EEt?= Cousson , Maxime Ripard , linux-samsung-soc@vger.kernel.org, letux-kernel@openphoenux.org, linux-arm-kernel@lists.infradead.org, Thomas Bogendoerfer , Philipp Rossak , openpvrsgx-devgroup@letux.org, linux-kernel@vger.kernel.org, Ralf Baechle , Daniel Vetter , kernel@pyra-handheld.com Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, Apr 24, 2020 at 10:34:04PM +0200, H. Nikolaus Schaller wrote: > The Imagination PVR/SGX GPU is part of several SoC from > multiple vendors, e.g. TI OMAP, Ingenic JZ4780, Intel Poulsbo, > Allwinner A83 and others. > > With this binding, we describe how the SGX processor is > interfaced to the SoC (registers and interrupt). > > The interface also consists of clocks, reset, power but > information from data sheets is vague and some SoC integrators > (TI) deciced to use a PRCM wrapper (ti,sysc) which does > all clock, reset and power-management through registers > outside of the sgx register block. > > Therefore all these properties are optional. > > Tested by make dt_binding_check > > Signed-off-by: H. Nikolaus Schaller > --- > .../devicetree/bindings/gpu/img,pvrsgx.yaml | 150 ++++++++++++++++++ > 1 file changed, 150 insertions(+) > create mode 100644 Documentation/devicetree/bindings/gpu/img,pvrsgx.yaml > > diff --git a/Documentation/devicetree/bindings/gpu/img,pvrsgx.yaml b/Documentation/devicetree/bindings/gpu/img,pvrsgx.yaml > new file mode 100644 > index 000000000000..33a9c4c6e784 > --- /dev/null > +++ b/Documentation/devicetree/bindings/gpu/img,pvrsgx.yaml > @@ -0,0 +1,150 @@ > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/gpu/img,pvrsgx.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Imagination PVR/SGX GPU > + > +maintainers: > + - H. Nikolaus Schaller > + > +description: |+ > + This binding describes the Imagination SGX5 series of 3D accelerators which > + are found in several different SoC like TI OMAP, Sitara, Ingenic JZ4780, > + Allwinner A83, and Intel Poulsbo and CedarView and more. > + > + For an extensive list see: https://en.wikipedia.org/wiki/PowerVR#Implementations > + > + The SGX node is usually a child node of some DT node belonging to the SoC > + which handles clocks, reset and general address space mapping of the SGX > + register area. If not, an optional clock can be specified here. > + > +properties: > + $nodename: > + pattern: '^gpu@[a-f0-9]+$' > + compatible: > + oneOf: > + - description: SGX530-121 based SoC > + items: > + - enum: > + - ti,omap3-sgx530-121 # BeagleBoard A/B/C, OpenPandora 600MHz and similar Should be indented 2 more here and elsewhere where you have a list under a list. > + - const: img,sgx530-121 > + - const: img,sgx530 > + > + - description: SGX530-125 based SoC > + items: > + - enum: > + - ti,am3352-sgx530-125 # BeagleBone Black > + - ti,am3517-sgx530-125 > + - ti,am4-sgx530-125 > + - ti,omap3-sgx530-125 # BeagleBoard XM, GTA04, OpenPandora 1GHz and similar > + - ti,ti81xx-sgx530-125 > + - const: ti,omap3-sgx530-125 > + - const: img,sgx530-125 > + - const: img,sgx530 > + > + - description: SGX535-116 based SoC > + items: > + - const: intel,poulsbo-gma500-sgx535 # Atom Z5xx > + - const: img,sgx535-116 > + - const: img,sgx535 > + > + - description: SGX540-116 based SoC > + items: > + - const: intel,medfield-gma-sgx540 # Atom Z24xx > + - const: img,sgx540-116 > + - const: img,sgx540 > + > + - description: SGX540-120 based SoC > + items: > + - enum: > + - samsung,s5pv210-sgx540-120 > + - ti,omap4-sgx540-120 # Pandaboard, Pandaboard ES and similar > + - const: img,sgx540-120 > + - const: img,sgx540 > + > + - description: SGX540-130 based SoC > + items: > + - enum: > + - ingenic,jz4780-sgx540-130 # CI20 > + - const: img,sgx540-130 > + - const: img,sgx540 > + > + - description: SGX544-112 based SoC > + items: > + - const: ti,omap4470-sgx544-112 > + - const: img,sgx544-112 > + - const: img,sgx544 > + > + - description: SGX544-115 based SoC > + items: > + - enum: > + - allwinner,sun8i-a31-sgx544-115 > + - allwinner,sun8i-a31s-sgx544-115 > + - allwinner,sun8i-a83t-sgx544-115 # Banana-Pi-M3 (Allwinner A83T) and similar > + - const: img,sgx544-115 > + - const: img,sgx544 > + > + - description: SGX544-116 based SoC > + items: > + - enum: > + - ti,dra7-sgx544-116 # DRA7 > + - ti,omap5-sgx544-116 # OMAP5 UEVM, Pyra Handheld and similar > + - const: img,sgx544-116 > + - const: img,sgx544 > + > + - description: SGX545 based SoC > + items: > + - const: intel,cedarview-gma3600-sgx545 # Atom N2600, D2500 > + - const: img,sgx545-116 > + - const: img,sgx545 > + > + reg: > + maxItems: 1 > + > + interrupts: > + maxItems: 1 > + > + interrupt-names: > + maxItems: 1 > + items: > + - const: sgx > + > + clocks: > + maxItems: 4 > + > + clock-names: > + maxItems: 4 > + items: > + - const: core > + - const: sys > + - const: mem > + - const: hyd > + > + sgx-supply: true > + > + power-domains: > + maxItems: 1 > + > + resets: > + maxItems: 1 > + > +required: > + - compatible > + - reg > + - interrupts > + > +additionalProperties: false > + > +examples: > + - |+ > + #include > + > + gpu: gpu@fe00 { > + compatible = "ti,omap5-sgx544-116", "img,sgx544-116", "img,sgx544"; > + reg = <0xfe00 0x200>; > + interrupts = ; > + }; > + > +... > -- > 2.25.1 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.5 required=3.0 tests=INCLUDES_PATCH, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 115FBC47257 for ; Tue, 5 May 2020 15:53:18 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E5616207DD for ; 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[24.155.109.49]) by smtp.gmail.com with ESMTPSA id s73sm652032oih.14.2020.05.05.08.53.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 05 May 2020 08:53:13 -0700 (PDT) Received: (nullmailer pid 23489 invoked by uid 1000); Tue, 05 May 2020 15:53:11 -0000 Date: Tue, 5 May 2020 10:53:11 -0500 From: Rob Herring To: "H. Nikolaus Schaller" Subject: Re: [PATCH v7 01/12] dt-bindings: add img,pvrsgx.yaml for Imagination GPUs Message-ID: <20200505155311.GA18025@bogus> References: <3a451e360fed84bc40287678b4d6be13821cfbc0.1587760454.git.hns@goldelico.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <3a451e360fed84bc40287678b4d6be13821cfbc0.1587760454.git.hns@goldelico.com> User-Agent: Mutt/1.10.1 (2018-07-13) X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , David Airlie , James Hogan , Jonathan Bakker , dri-devel@lists.freedesktop.org, linux-mips@vger.kernel.org, Paul Cercueil , linux-omap@vger.kernel.org, Paul Burton , Krzysztof Kozlowski , Tony Lindgren , Chen-Yu Tsai , Kukjin Kim , devicetree@vger.kernel.org, =?iso-8859-1?Q?Beno=EEt?= Cousson , linux-samsung-soc@vger.kernel.org, letux-kernel@openphoenux.org, linux-arm-kernel@lists.infradead.org, Thomas Bogendoerfer , Philipp Rossak , openpvrsgx-devgroup@letux.org, linux-kernel@vger.kernel.org, Ralf Baechle , kernel@pyra-handheld.com Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" On Fri, Apr 24, 2020 at 10:34:04PM +0200, H. Nikolaus Schaller wrote: > The Imagination PVR/SGX GPU is part of several SoC from > multiple vendors, e.g. TI OMAP, Ingenic JZ4780, Intel Poulsbo, > Allwinner A83 and others. > > With this binding, we describe how the SGX processor is > interfaced to the SoC (registers and interrupt). > > The interface also consists of clocks, reset, power but > information from data sheets is vague and some SoC integrators > (TI) deciced to use a PRCM wrapper (ti,sysc) which does > all clock, reset and power-management through registers > outside of the sgx register block. > > Therefore all these properties are optional. > > Tested by make dt_binding_check > > Signed-off-by: H. Nikolaus Schaller > --- > .../devicetree/bindings/gpu/img,pvrsgx.yaml | 150 ++++++++++++++++++ > 1 file changed, 150 insertions(+) > create mode 100644 Documentation/devicetree/bindings/gpu/img,pvrsgx.yaml > > diff --git a/Documentation/devicetree/bindings/gpu/img,pvrsgx.yaml b/Documentation/devicetree/bindings/gpu/img,pvrsgx.yaml > new file mode 100644 > index 000000000000..33a9c4c6e784 > --- /dev/null > +++ b/Documentation/devicetree/bindings/gpu/img,pvrsgx.yaml > @@ -0,0 +1,150 @@ > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/gpu/img,pvrsgx.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Imagination PVR/SGX GPU > + > +maintainers: > + - H. Nikolaus Schaller > + > +description: |+ > + This binding describes the Imagination SGX5 series of 3D accelerators which > + are found in several different SoC like TI OMAP, Sitara, Ingenic JZ4780, > + Allwinner A83, and Intel Poulsbo and CedarView and more. > + > + For an extensive list see: https://en.wikipedia.org/wiki/PowerVR#Implementations > + > + The SGX node is usually a child node of some DT node belonging to the SoC > + which handles clocks, reset and general address space mapping of the SGX > + register area. If not, an optional clock can be specified here. > + > +properties: > + $nodename: > + pattern: '^gpu@[a-f0-9]+$' > + compatible: > + oneOf: > + - description: SGX530-121 based SoC > + items: > + - enum: > + - ti,omap3-sgx530-121 # BeagleBoard A/B/C, OpenPandora 600MHz and similar Should be indented 2 more here and elsewhere where you have a list under a list. > + - const: img,sgx530-121 > + - const: img,sgx530 > + > + - description: SGX530-125 based SoC > + items: > + - enum: > + - ti,am3352-sgx530-125 # BeagleBone Black > + - ti,am3517-sgx530-125 > + - ti,am4-sgx530-125 > + - ti,omap3-sgx530-125 # BeagleBoard XM, GTA04, OpenPandora 1GHz and similar > + - ti,ti81xx-sgx530-125 > + - const: ti,omap3-sgx530-125 > + - const: img,sgx530-125 > + - const: img,sgx530 > + > + - description: SGX535-116 based SoC > + items: > + - const: intel,poulsbo-gma500-sgx535 # Atom Z5xx > + - const: img,sgx535-116 > + - const: img,sgx535 > + > + - description: SGX540-116 based SoC > + items: > + - const: intel,medfield-gma-sgx540 # Atom Z24xx > + - const: img,sgx540-116 > + - const: img,sgx540 > + > + - description: SGX540-120 based SoC > + items: > + - enum: > + - samsung,s5pv210-sgx540-120 > + - ti,omap4-sgx540-120 # Pandaboard, Pandaboard ES and similar > + - const: img,sgx540-120 > + - const: img,sgx540 > + > + - description: SGX540-130 based SoC > + items: > + - enum: > + - ingenic,jz4780-sgx540-130 # CI20 > + - const: img,sgx540-130 > + - const: img,sgx540 > + > + - description: SGX544-112 based SoC > + items: > + - const: ti,omap4470-sgx544-112 > + - const: img,sgx544-112 > + - const: img,sgx544 > + > + - description: SGX544-115 based SoC > + items: > + - enum: > + - allwinner,sun8i-a31-sgx544-115 > + - allwinner,sun8i-a31s-sgx544-115 > + - allwinner,sun8i-a83t-sgx544-115 # Banana-Pi-M3 (Allwinner A83T) and similar > + - const: img,sgx544-115 > + - const: img,sgx544 > + > + - description: SGX544-116 based SoC > + items: > + - enum: > + - ti,dra7-sgx544-116 # DRA7 > + - ti,omap5-sgx544-116 # OMAP5 UEVM, Pyra Handheld and similar > + - const: img,sgx544-116 > + - const: img,sgx544 > + > + - description: SGX545 based SoC > + items: > + - const: intel,cedarview-gma3600-sgx545 # Atom N2600, D2500 > + - const: img,sgx545-116 > + - const: img,sgx545 > + > + reg: > + maxItems: 1 > + > + interrupts: > + maxItems: 1 > + > + interrupt-names: > + maxItems: 1 > + items: > + - const: sgx > + > + clocks: > + maxItems: 4 > + > + clock-names: > + maxItems: 4 > + items: > + - const: core > + - const: sys > + - const: mem > + - const: hyd > + > + sgx-supply: true > + > + power-domains: > + maxItems: 1 > + > + resets: > + maxItems: 1 > + > +required: > + - compatible > + - reg > + - interrupts > + > +additionalProperties: false > + > +examples: > + - |+ > + #include > + > + gpu: gpu@fe00 { > + compatible = "ti,omap5-sgx544-116", "img,sgx544-116", "img,sgx544"; > + reg = <0xfe00 0x200>; > + interrupts = ; > + }; > + > +... > -- > 2.25.1 > _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel