From df6284b9a7a7ef5ca3200a794d2abaa5cb88c9d9 Mon Sep 17 00:00:00 2001 From: Mathias Nyman Date: Thu, 7 May 2020 19:18:15 +0300 Subject: [PATCH] msi tracing for tglx --- arch/x86/kernel/apic/msi.c | 17 ++++++++++++++++- drivers/pci/msi.c | 2 ++ drivers/usb/host/xhci-ring.c | 1 + 3 files changed, 19 insertions(+), 1 deletion(-) diff --git a/arch/x86/kernel/apic/msi.c b/arch/x86/kernel/apic/msi.c index 159bd0cb8548..0feb2613fdd5 100644 --- a/arch/x86/kernel/apic/msi.c +++ b/arch/x86/kernel/apic/msi.c @@ -63,17 +63,20 @@ msi_set_affinity(struct irq_data *irqd, const struct cpumask *mask, bool force) { struct irq_cfg old_cfg, *cfg = irqd_cfg(irqd); struct irq_data *parent = irqd->parent_data; - unsigned int cpu; + unsigned int cpu, this_apic; int ret; /* Save the current configuration */ cpu = cpumask_first(irq_data_get_effective_affinity_mask(irqd)); old_cfg = *cfg; + this_apic = apic->cpu_present_to_apicid(cpu); /* Allocate a new target vector */ ret = parent->chip->irq_set_affinity(parent, mask, force); if (ret < 0 || ret == IRQ_SET_MASK_OK_DONE) return ret; + trace_printk("quirk[%d] new vector allocated, new apic = %d vector = %d this apic = %d\n", + irqd_msi_nomask_quirk(irqd), cfg->dest_apicid, cfg->vector, this_apic); /* * For non-maskable and non-remapped MSI interrupts the migration @@ -93,6 +96,9 @@ msi_set_affinity(struct irq_data *irqd, const struct cpumask *mask, bool force) old_cfg.vector == MANAGED_IRQ_SHUTDOWN_VECTOR || cfg->dest_apicid == old_cfg.dest_apicid) { irq_msi_update_msg(irqd, cfg); + trace_printk("Direct Update: irq %d Ovec=%d Oapic %d " + "Nvec %d Napic %d\n", irqd->irq, old_cfg.vector, + old_cfg.dest_apicid, cfg->vector, cfg->dest_apicid); return ret; } @@ -138,9 +144,13 @@ msi_set_affinity(struct irq_data *irqd, const struct cpumask *mask, bool force) /* Redirect it to the new vector on the local CPU temporarily */ old_cfg.vector = cfg->vector; irq_msi_update_msg(irqd, &old_cfg); + trace_printk("Redirect to new vector %d on old apic %d\n", + old_cfg.vector, old_cfg.dest_apicid); /* Now transition it to the target CPU */ irq_msi_update_msg(irqd, cfg); + trace_printk("Transition to new target apic %d vector %d\n", + cfg->dest_apicid, cfg->vector); /* * All interrupts after this point are now targeted at the new @@ -160,6 +170,11 @@ msi_set_affinity(struct irq_data *irqd, const struct cpumask *mask, bool force) * underlying vector store. It's just checking the local APIC's * IRR. */ + + trace_printk("Update Done [IRR %d]: irq %d Nvec %d Napic %d\n", + lapic_vector_set_in_irr(cfg->vector), + irqd->irq, cfg->vector, cfg->dest_apicid); + if (lapic_vector_set_in_irr(cfg->vector)) irq_data_get_irq_chip(irqd)->irq_retrigger(irqd); diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c index 6b43a5455c7a..20dbc757ea2a 100644 --- a/drivers/pci/msi.c +++ b/drivers/pci/msi.c @@ -323,6 +323,7 @@ void __pci_write_msi_msg(struct msi_desc *entry, struct msi_msg *msg) writel(msg->address_lo, base + PCI_MSIX_ENTRY_LOWER_ADDR); writel(msg->address_hi, base + PCI_MSIX_ENTRY_UPPER_ADDR); writel(msg->data, base + PCI_MSIX_ENTRY_DATA); + readl(base + PCI_MSIX_ENTRY_DATA); } else { int pos = dev->msi_cap; u16 msgctl; @@ -343,6 +344,7 @@ void __pci_write_msi_msg(struct msi_desc *entry, struct msi_msg *msg) pci_write_config_word(dev, pos + PCI_MSI_DATA_32, msg->data); } + pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &msgctl); } skip: diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c index 0fda0c0f4d31..2ec340b1b3d5 100644 --- a/drivers/usb/host/xhci-ring.c +++ b/drivers/usb/host/xhci-ring.c @@ -2838,6 +2838,7 @@ irqreturn_t xhci_irq(struct usb_hcd *hcd) u32 status; int event_loop = 0; + trace_printk("xhci irq\n"); spin_lock_irqsave(&xhci->lock, flags); /* Check if the xHC generated the interrupt, or the irq is shared */ status = readl(&xhci->op_regs->status); -- 2.17.1