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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org
Subject: [PATCH v3 11/16] target/arm: Remove fp_status from helper_{recpe, rsqrte}_u32
Date: Fri,  8 May 2020 08:21:55 -0700	[thread overview]
Message-ID: <20200508152200.6547-12-richard.henderson@linaro.org> (raw)
In-Reply-To: <20200508152200.6547-1-richard.henderson@linaro.org>

These operations do not touch fp_status.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/arm/helper.h        |  4 ++--
 target/arm/translate-a64.c |  5 ++---
 target/arm/translate.c     | 12 ++----------
 target/arm/vfp_helper.c    |  4 ++--
 4 files changed, 8 insertions(+), 17 deletions(-)

diff --git a/target/arm/helper.h b/target/arm/helper.h
index 33c76192d2..aed3050965 100644
--- a/target/arm/helper.h
+++ b/target/arm/helper.h
@@ -211,8 +211,8 @@ DEF_HELPER_FLAGS_2(recpe_f64, TCG_CALL_NO_RWG, f64, f64, ptr)
 DEF_HELPER_FLAGS_2(rsqrte_f16, TCG_CALL_NO_RWG, f16, f16, ptr)
 DEF_HELPER_FLAGS_2(rsqrte_f32, TCG_CALL_NO_RWG, f32, f32, ptr)
 DEF_HELPER_FLAGS_2(rsqrte_f64, TCG_CALL_NO_RWG, f64, f64, ptr)
-DEF_HELPER_2(recpe_u32, i32, i32, ptr)
-DEF_HELPER_FLAGS_2(rsqrte_u32, TCG_CALL_NO_RWG, i32, i32, ptr)
+DEF_HELPER_FLAGS_1(recpe_u32, TCG_CALL_NO_RWG, i32, i32)
+DEF_HELPER_FLAGS_1(rsqrte_u32, TCG_CALL_NO_RWG, i32, i32)
 DEF_HELPER_FLAGS_4(neon_tbl, TCG_CALL_NO_RWG, i32, i32, i32, ptr, i32)
 
 DEF_HELPER_3(shl_cc, i32, env, i32, i32)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index ea5f6ceadc..367fa403ae 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -9699,7 +9699,7 @@ static void handle_2misc_reciprocal(DisasContext *s, int opcode,
 
             switch (opcode) {
             case 0x3c: /* URECPE */
-                gen_helper_recpe_u32(tcg_res, tcg_op, fpst);
+                gen_helper_recpe_u32(tcg_res, tcg_op);
                 break;
             case 0x3d: /* FRECPE */
                 gen_helper_recpe_f32(tcg_res, tcg_op, fpst);
@@ -12244,7 +12244,6 @@ static void disas_simd_two_reg_misc(DisasContext *s, uint32_t insn)
                 unallocated_encoding(s);
                 return;
             }
-            need_fpstatus = true;
             break;
         case 0x1e: /* FRINT32Z */
         case 0x1f: /* FRINT64Z */
@@ -12412,7 +12411,7 @@ static void disas_simd_two_reg_misc(DisasContext *s, uint32_t insn)
                     gen_helper_rints_exact(tcg_res, tcg_op, tcg_fpstatus);
                     break;
                 case 0x7c: /* URSQRTE */
-                    gen_helper_rsqrte_u32(tcg_res, tcg_op, tcg_fpstatus);
+                    gen_helper_rsqrte_u32(tcg_res, tcg_op);
                     break;
                 case 0x1e: /* FRINT32Z */
                 case 0x5e: /* FRINT32X */
diff --git a/target/arm/translate.c b/target/arm/translate.c
index 72c3aab544..676701143b 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -6873,19 +6873,11 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn)
                             break;
                         }
                         case NEON_2RM_VRECPE:
-                        {
-                            TCGv_ptr fpstatus = get_fpstatus_ptr(1);
-                            gen_helper_recpe_u32(tmp, tmp, fpstatus);
-                            tcg_temp_free_ptr(fpstatus);
+                            gen_helper_recpe_u32(tmp, tmp);
                             break;
-                        }
                         case NEON_2RM_VRSQRTE:
-                        {
-                            TCGv_ptr fpstatus = get_fpstatus_ptr(1);
-                            gen_helper_rsqrte_u32(tmp, tmp, fpstatus);
-                            tcg_temp_free_ptr(fpstatus);
+                            gen_helper_rsqrte_u32(tmp, tmp);
                             break;
-                        }
                         case NEON_2RM_VRECPE_F:
                         {
                             TCGv_ptr fpstatus = get_fpstatus_ptr(1);
diff --git a/target/arm/vfp_helper.c b/target/arm/vfp_helper.c
index 930d6e747f..a792661166 100644
--- a/target/arm/vfp_helper.c
+++ b/target/arm/vfp_helper.c
@@ -1023,7 +1023,7 @@ float64 HELPER(rsqrte_f64)(float64 input, void *fpstp)
     return make_float64(val);
 }
 
-uint32_t HELPER(recpe_u32)(uint32_t a, void *fpstp)
+uint32_t HELPER(recpe_u32)(uint32_t a)
 {
     /* float_status *s = fpstp; */
     int input, estimate;
@@ -1038,7 +1038,7 @@ uint32_t HELPER(recpe_u32)(uint32_t a, void *fpstp)
     return deposit32(0, (32 - 9), 9, estimate);
 }
 
-uint32_t HELPER(rsqrte_u32)(uint32_t a, void *fpstp)
+uint32_t HELPER(rsqrte_u32)(uint32_t a)
 {
     int estimate;
 
-- 
2.20.1



  parent reply	other threads:[~2020-05-08 15:41 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-08 15:21 [PATCH v3 00/16] target/arm: partial vector cleanup Richard Henderson
2020-05-08 15:21 ` [PATCH v3 01/16] target/arm: Create gen_gvec_[us]sra Richard Henderson
2020-05-12 13:20   ` Peter Maydell
2020-05-08 15:21 ` [PATCH v3 02/16] target/arm: Create gen_gvec_{u,s}{rshr,rsra} Richard Henderson
2020-05-12 13:09   ` Peter Maydell
2020-05-12 13:46     ` Peter Maydell
2020-05-13  2:04       ` Richard Henderson
2020-05-12 13:51   ` Peter Maydell
2020-05-13  2:06     ` Richard Henderson
2020-05-08 15:21 ` [PATCH v3 03/16] target/arm: Create gen_gvec_{sri,sli} Richard Henderson
2020-05-12 13:52   ` Peter Maydell
2020-05-08 15:21 ` [PATCH v3 04/16] target/arm: Remove unnecessary range check for VSHL Richard Henderson
2020-05-12 13:53   ` Peter Maydell
2020-05-08 15:21 ` [PATCH v3 05/16] target/arm: Tidy handle_vec_simd_shri Richard Henderson
2020-05-12 13:56   ` Peter Maydell
2020-05-08 15:21 ` [PATCH v3 06/16] target/arm: Create gen_gvec_{ceq,clt,cle,cgt,cge}0 Richard Henderson
2020-05-12 14:10   ` [PATCH v3 06/16] target/arm: Create gen_gvec_{ceq, clt, cle, cgt, cge}0 Peter Maydell
2020-05-08 15:21 ` [PATCH v3 07/16] target/arm: Create gen_gvec_{mla,mls} Richard Henderson
2020-05-12 14:11   ` Peter Maydell
2020-05-08 15:21 ` [PATCH v3 08/16] target/arm: Swap argument order for VSHL during decode Richard Henderson
2020-05-12 14:14   ` Peter Maydell
2020-05-08 15:21 ` [PATCH v3 09/16] target/arm: Create gen_gvec_{cmtst,ushl,sshl} Richard Henderson
2020-05-12 14:16   ` Peter Maydell
2020-05-08 15:21 ` [PATCH v3 10/16] target/arm: Create gen_gvec_{uqadd, sqadd, uqsub, sqsub} Richard Henderson
2020-05-12 14:18   ` Peter Maydell
2020-05-08 15:21 ` Richard Henderson [this message]
2020-05-12 14:19   ` [PATCH v3 11/16] target/arm: Remove fp_status from helper_{recpe, rsqrte}_u32 Peter Maydell
2020-05-08 15:21 ` [PATCH v3 12/16] target/arm: Create gen_gvec_{qrdmla,qrdmls} Richard Henderson
2020-05-12 14:20   ` Peter Maydell
2020-05-08 15:21 ` [PATCH v3 13/16] target/arm: Pass pointer to qc to qrdmla/qrdmls Richard Henderson
2020-05-12 14:28   ` Peter Maydell
2020-05-08 15:21 ` [PATCH v3 14/16] target/arm: Clear tail in gvec_fmul_idx_*, gvec_fmla_idx_* Richard Henderson
2020-05-12 14:29   ` Peter Maydell
2020-05-08 15:21 ` [PATCH v3 15/16] target/arm: Vectorize SABD/UABD Richard Henderson
2020-05-12 14:40   ` Peter Maydell
2020-05-08 15:22 ` [PATCH v3 16/16] target/arm: Vectorize SABA/UABA Richard Henderson
2020-05-12 14:41   ` Peter Maydell
2020-05-12 12:55 ` [PATCH v3 00/16] target/arm: partial vector cleanup Peter Maydell

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