From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, MIME_BASE64_TEXT,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AC496C47254 for ; Sat, 9 May 2020 08:40:29 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 8BD6C2495C for ; Sat, 9 May 2020 08:40:29 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="MRRXnXiF" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728089AbgEIIk2 (ORCPT ); Sat, 9 May 2020 04:40:28 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:34224 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1728010AbgEIIkY (ORCPT ); Sat, 9 May 2020 04:40:24 -0400 X-UUID: 57a394ace62a4cacbe7dec24340acc29-20200509 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=nxNKFtFcVgXCGJ4BNQwJD0XYyDxH3mH6r9HcI8tiLlE=; b=MRRXnXiFne5u4hG0nWXHIcudRfO+wupWcG7XMPe5fCbaeTSAkdGMWs9CiZQ244FRrkiJtMnbGEQynPH3Mxr6ZApWk4tR5TSGy8lm/vaNP9rCUgSTaetCKMzmH0x+GOxZ5zdZDcg1cbP+le3VkHmthaW6qrW2IWqTi+LPN56Svg4=; X-UUID: 57a394ace62a4cacbe7dec24340acc29-20200509 Received: from mtkcas08.mediatek.inc [(172.21.101.126)] by mailgw02.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 1637859311; Sat, 09 May 2020 16:40:19 +0800 Received: from mtkcas08.mediatek.inc (172.21.101.126) by mtkmbs01n1.mediatek.inc (172.21.101.68) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sat, 9 May 2020 16:40:17 +0800 Received: from localhost.localdomain (10.15.20.246) by mtkcas08.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Sat, 9 May 2020 16:40:16 +0800 From: Chao Hao To: Joerg Roedel , Rob Herring , Matthias Brugger CC: , , , , , , Chao Hao , Yong Wu , FY Yang , Jun Yan Subject: [PATCH v3 6/7] iommu/mediatek: Add REG_MMU_WR_LEN definition preparing for mt6779 Date: Sat, 9 May 2020 16:36:53 +0800 Message-ID: <20200509083654.5178-7-chao.hao@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20200509083654.5178-1-chao.hao@mediatek.com> References: <20200509083654.5178-1-chao.hao@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Content-Transfer-Encoding: base64 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org U29tZSBwbGF0Zm9ybXMoZXg6IG10Njc3OSkgaGF2ZSBhIG5ldyByZWdpc3RlciBjYWxsZWQgYnkg UkVHX01NVV9XUl9MRU4NCnRvIGltcHJvdmUgcGVyZm9ybWFuY2UuDQpUaGlzIHBhdGNoIGFkZCB0 aGlzIHJlZ2lzdGVyIGRlZmluaXRpb24uDQoNClNpZ25lZC1vZmYtYnk6IENoYW8gSGFvIDxjaGFv Lmhhb0BtZWRpYXRlay5jb20+DQotLS0NCiBkcml2ZXJzL2lvbW11L210a19pb21tdS5jIHwgMTAg KysrKysrKysrKw0KIGRyaXZlcnMvaW9tbXUvbXRrX2lvbW11LmggfCAgMiArKw0KIDIgZmlsZXMg Y2hhbmdlZCwgMTIgaW5zZXJ0aW9ucygrKQ0KDQpkaWZmIC0tZ2l0IGEvZHJpdmVycy9pb21tdS9t dGtfaW9tbXUuYyBiL2RyaXZlcnMvaW9tbXUvbXRrX2lvbW11LmMNCmluZGV4IDM5MTRjNDE4ZDFi MC4uZGM5YWU5NDRlNzEyIDEwMDY0NA0KLS0tIGEvZHJpdmVycy9pb21tdS9tdGtfaW9tbXUuYw0K KysrIGIvZHJpdmVycy9pb21tdS9tdGtfaW9tbXUuYw0KQEAgLTQ1LDYgKzQ1LDggQEANCiAjZGVm aW5lIEZfTU1VX1NUQU5EQVJEX0FYSV9NT0RFX0JJVAkJKEJJVCgzKSB8IEJJVCgxOSkpDQogDQog I2RlZmluZSBSRUdfTU1VX0RDTV9ESVMJCQkJMHgwNTANCisjZGVmaW5lIFJFR19NTVVfV1JfTEVO CQkJCTB4MDU0DQorI2RlZmluZSBGX01NVV9XUl9USFJPVF9ESVNfQklUCQkJKEJJVCg1KSB8ICBC SVQoMjEpKQ0KIA0KICNkZWZpbmUgUkVHX01NVV9DVFJMX1JFRwkJCTB4MTEwDQogI2RlZmluZSBG X01NVV9URl9QUk9UX1RPX1BST0dSQU1fQUREUgkJKDIgPDwgNCkNCkBAIC01OTIsNiArNTk0LDEy IEBAIHN0YXRpYyBpbnQgbXRrX2lvbW11X2h3X2luaXQoY29uc3Qgc3RydWN0IG10a19pb21tdV9k YXRhICpkYXRhKQ0KIAkJd3JpdGVsX3JlbGF4ZWQocmVndmFsLCBkYXRhLT5iYXNlICsgUkVHX01N VV9WTERfUEFfUk5HKTsNCiAJfQ0KIAl3cml0ZWxfcmVsYXhlZCgwLCBkYXRhLT5iYXNlICsgUkVH X01NVV9EQ01fRElTKTsNCisJaWYgKGRhdGEtPnBsYXRfZGF0YS0+aGFzX3dyX2xlbikgew0KKwkJ Lyogd3JpdGUgY29tbWFuZCB0aHJvdHRsaW5nIG1vZGUgKi8NCisJCXJlZ3ZhbCA9IHJlYWRsX3Jl bGF4ZWQoZGF0YS0+YmFzZSArIFJFR19NTVVfV1JfTEVOKTsNCisJCXJlZ3ZhbCAmPSB+Rl9NTVVf V1JfVEhST1RfRElTX0JJVDsNCisJCXdyaXRlbF9yZWxheGVkKHJlZ3ZhbCwgZGF0YS0+YmFzZSAr IFJFR19NTVVfV1JfTEVOKTsNCisJfQ0KIA0KIAlpZiAoZGF0YS0+cGxhdF9kYXRhLT5oYXNfbWlz Y19jdHJsKSB7DQogCQlyZWd2YWwgPSByZWFkbF9yZWxheGVkKGRhdGEtPmJhc2UgKyBSRUdfTU1V X01JU0NfQ1RSTCk7DQpAQCAtNzQ0LDYgKzc1Miw3IEBAIHN0YXRpYyBpbnQgX19tYXliZV91bnVz ZWQgbXRrX2lvbW11X3N1c3BlbmQoc3RydWN0IGRldmljZSAqZGV2KQ0KIAlzdHJ1Y3QgbXRrX2lv bW11X3N1c3BlbmRfcmVnICpyZWcgPSAmZGF0YS0+cmVnOw0KIAl2b2lkIF9faW9tZW0gKmJhc2Ug PSBkYXRhLT5iYXNlOw0KIA0KKwlyZWctPndyX2xlbiA9IHJlYWRsX3JlbGF4ZWQoYmFzZSArIFJF R19NTVVfV1JfTEVOKTsNCiAJcmVnLT5taXNjX2N0cmwgPSByZWFkbF9yZWxheGVkKGJhc2UgKyBS RUdfTU1VX01JU0NfQ1RSTCk7DQogCXJlZy0+ZGNtX2RpcyA9IHJlYWRsX3JlbGF4ZWQoYmFzZSAr IFJFR19NTVVfRENNX0RJUyk7DQogCXJlZy0+Y3RybF9yZWcgPSByZWFkbF9yZWxheGVkKGJhc2Ug KyBSRUdfTU1VX0NUUkxfUkVHKTsNCkBAIC03NjgsNiArNzc3LDcgQEAgc3RhdGljIGludCBfX21h eWJlX3VudXNlZCBtdGtfaW9tbXVfcmVzdW1lKHN0cnVjdCBkZXZpY2UgKmRldikNCiAJCWRldl9l cnIoZGF0YS0+ZGV2LCAiRmFpbGVkIHRvIGVuYWJsZSBjbGsoJWQpIGluIHJlc3VtZVxuIiwgcmV0 KTsNCiAJCXJldHVybiByZXQ7DQogCX0NCisJd3JpdGVsX3JlbGF4ZWQocmVnLT53cl9sZW4sIGJh c2UgKyBSRUdfTU1VX1dSX0xFTik7DQogCXdyaXRlbF9yZWxheGVkKHJlZy0+bWlzY19jdHJsLCBi YXNlICsgUkVHX01NVV9NSVNDX0NUUkwpOw0KIAl3cml0ZWxfcmVsYXhlZChyZWctPmRjbV9kaXMs IGJhc2UgKyBSRUdfTU1VX0RDTV9ESVMpOw0KIAl3cml0ZWxfcmVsYXhlZChyZWctPmN0cmxfcmVn LCBiYXNlICsgUkVHX01NVV9DVFJMX1JFRyk7DQpkaWZmIC0tZ2l0IGEvZHJpdmVycy9pb21tdS9t dGtfaW9tbXUuaCBiL2RyaXZlcnMvaW9tbXUvbXRrX2lvbW11LmgNCmluZGV4IGQ1MWZmOTljMmM3 MS4uOTk3MWNlZGQ3MmVhIDEwMDY0NA0KLS0tIGEvZHJpdmVycy9pb21tdS9tdGtfaW9tbXUuaA0K KysrIGIvZHJpdmVycy9pb21tdS9tdGtfaW9tbXUuaA0KQEAgLTI1LDYgKzI1LDcgQEAgc3RydWN0 IG10a19pb21tdV9zdXNwZW5kX3JlZyB7DQogCXUzMgkJCQlpbnRfbWFpbl9jb250cm9sOw0KIAl1 MzIJCQkJaXZycF9wYWRkcjsNCiAJdTMyCQkJCXZsZF9wYV9ybmc7DQorCXUzMgkJCQl3cl9sZW47 DQogfTsNCiANCiBlbnVtIG10a19pb21tdV9wbGF0IHsNCkBAIC00Myw2ICs0NCw3IEBAIHN0cnVj dCBtdGtfaW9tbXVfcGxhdF9kYXRhIHsNCiAJYm9vbAkJICAgIGhhc19taXNjX2N0cmw7DQogCWJv b2wJCSAgICBoYXNfc3ViX2NvbW07DQogCWJvb2wgICAgICAgICAgICAgICAgaGFzX3ZsZF9wYV9y bmc7DQorCWJvb2wgICAgICAgICAgICAgICAgaGFzX3dyX2xlbjsNCiAJYm9vbCAgICAgICAgICAg ICAgICByZXNldF9heGk7DQogCXUzMiAgICAgICAgICAgICAgICAgaW52X3NlbF9yZWc7DQogCXVu c2lnbmVkIGNoYXIgICAgICAgbGFyYmlkX3JlbWFwWzhdWzRdOw0KLS0gDQoyLjE4LjANCg== From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.6 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C3D86C47257 for ; Sat, 9 May 2020 08:45:28 +0000 (UTC) Received: from silver.osuosl.org (smtp3.osuosl.org [140.211.166.136]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 97EBB2495C for ; Sat, 9 May 2020 08:45:28 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="MRRXnXiF" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 97EBB2495C Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=mediatek.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=iommu-bounces@lists.linux-foundation.org Received: from localhost (localhost [127.0.0.1]) by silver.osuosl.org (Postfix) with ESMTP id 649CC22C1A; Sat, 9 May 2020 08:45:28 +0000 (UTC) X-Virus-Scanned: amavisd-new at osuosl.org Received: from silver.osuosl.org ([127.0.0.1]) by localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 0nNe-vSyp1Wo; Sat, 9 May 2020 08:45:27 +0000 (UTC) Received: from lists.linuxfoundation.org (lf-lists.osuosl.org [140.211.9.56]) by silver.osuosl.org (Postfix) with ESMTP id 6C4B322622; Sat, 9 May 2020 08:45:27 +0000 (UTC) Received: from lf-lists.osuosl.org (localhost [127.0.0.1]) by lists.linuxfoundation.org (Postfix) with ESMTP id 50211C0888; Sat, 9 May 2020 08:45:27 +0000 (UTC) Received: from whitealder.osuosl.org (smtp1.osuosl.org [140.211.166.138]) by lists.linuxfoundation.org (Postfix) with ESMTP id 1DB87C0888 for ; Sat, 9 May 2020 08:45:26 +0000 (UTC) Received: from localhost (localhost [127.0.0.1]) by whitealder.osuosl.org (Postfix) with ESMTP id 07C4A88086 for ; Sat, 9 May 2020 08:45:26 +0000 (UTC) X-Virus-Scanned: amavisd-new at osuosl.org Received: from whitealder.osuosl.org ([127.0.0.1]) by localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id ebrEGjiqeiPf for ; Sat, 9 May 2020 08:45:24 +0000 (UTC) X-Greylist: delayed 00:05:07 by SQLgrey-1.7.6 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by whitealder.osuosl.org (Postfix) with ESMTP id C8DE088116 for ; Sat, 9 May 2020 08:45:23 +0000 (UTC) X-UUID: 57a394ace62a4cacbe7dec24340acc29-20200509 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=nxNKFtFcVgXCGJ4BNQwJD0XYyDxH3mH6r9HcI8tiLlE=; b=MRRXnXiFne5u4hG0nWXHIcudRfO+wupWcG7XMPe5fCbaeTSAkdGMWs9CiZQ244FRrkiJtMnbGEQynPH3Mxr6ZApWk4tR5TSGy8lm/vaNP9rCUgSTaetCKMzmH0x+GOxZ5zdZDcg1cbP+le3VkHmthaW6qrW2IWqTi+LPN56Svg4=; X-UUID: 57a394ace62a4cacbe7dec24340acc29-20200509 Received: from mtkcas08.mediatek.inc [(172.21.101.126)] by mailgw02.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 1637859311; Sat, 09 May 2020 16:40:19 +0800 Received: from mtkcas08.mediatek.inc (172.21.101.126) by mtkmbs01n1.mediatek.inc (172.21.101.68) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sat, 9 May 2020 16:40:17 +0800 Received: from localhost.localdomain (10.15.20.246) by mtkcas08.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Sat, 9 May 2020 16:40:16 +0800 From: Chao Hao To: Joerg Roedel , Rob Herring , Matthias Brugger Subject: [PATCH v3 6/7] iommu/mediatek: Add REG_MMU_WR_LEN definition preparing for mt6779 Date: Sat, 9 May 2020 16:36:53 +0800 Message-ID: <20200509083654.5178-7-chao.hao@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20200509083654.5178-1-chao.hao@mediatek.com> References: <20200509083654.5178-1-chao.hao@mediatek.com> MIME-Version: 1.0 X-MTK: N Cc: devicetree@vger.kernel.org, FY Yang , wsd_upstream@mediatek.com, linux-kernel@vger.kernel.org, Chao Hao , iommu@lists.linux-foundation.org, linux-mediatek@lists.infradead.org, Jun Yan , linux-arm-kernel@lists.infradead.org X-BeenThere: iommu@lists.linux-foundation.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Development issues for Linux IOMMU support List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: iommu-bounces@lists.linux-foundation.org Sender: "iommu" Some platforms(ex: mt6779) have a new register called by REG_MMU_WR_LEN to improve performance. This patch add this register definition. Signed-off-by: Chao Hao --- drivers/iommu/mtk_iommu.c | 10 ++++++++++ drivers/iommu/mtk_iommu.h | 2 ++ 2 files changed, 12 insertions(+) diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c index 3914c418d1b0..dc9ae944e712 100644 --- a/drivers/iommu/mtk_iommu.c +++ b/drivers/iommu/mtk_iommu.c @@ -45,6 +45,8 @@ #define F_MMU_STANDARD_AXI_MODE_BIT (BIT(3) | BIT(19)) #define REG_MMU_DCM_DIS 0x050 +#define REG_MMU_WR_LEN 0x054 +#define F_MMU_WR_THROT_DIS_BIT (BIT(5) | BIT(21)) #define REG_MMU_CTRL_REG 0x110 #define F_MMU_TF_PROT_TO_PROGRAM_ADDR (2 << 4) @@ -592,6 +594,12 @@ static int mtk_iommu_hw_init(const struct mtk_iommu_data *data) writel_relaxed(regval, data->base + REG_MMU_VLD_PA_RNG); } writel_relaxed(0, data->base + REG_MMU_DCM_DIS); + if (data->plat_data->has_wr_len) { + /* write command throttling mode */ + regval = readl_relaxed(data->base + REG_MMU_WR_LEN); + regval &= ~F_MMU_WR_THROT_DIS_BIT; + writel_relaxed(regval, data->base + REG_MMU_WR_LEN); + } if (data->plat_data->has_misc_ctrl) { regval = readl_relaxed(data->base + REG_MMU_MISC_CTRL); @@ -744,6 +752,7 @@ static int __maybe_unused mtk_iommu_suspend(struct device *dev) struct mtk_iommu_suspend_reg *reg = &data->reg; void __iomem *base = data->base; + reg->wr_len = readl_relaxed(base + REG_MMU_WR_LEN); reg->misc_ctrl = readl_relaxed(base + REG_MMU_MISC_CTRL); reg->dcm_dis = readl_relaxed(base + REG_MMU_DCM_DIS); reg->ctrl_reg = readl_relaxed(base + REG_MMU_CTRL_REG); @@ -768,6 +777,7 @@ static int __maybe_unused mtk_iommu_resume(struct device *dev) dev_err(data->dev, "Failed to enable clk(%d) in resume\n", ret); return ret; } + writel_relaxed(reg->wr_len, base + REG_MMU_WR_LEN); writel_relaxed(reg->misc_ctrl, base + REG_MMU_MISC_CTRL); writel_relaxed(reg->dcm_dis, base + REG_MMU_DCM_DIS); writel_relaxed(reg->ctrl_reg, base + REG_MMU_CTRL_REG); diff --git a/drivers/iommu/mtk_iommu.h b/drivers/iommu/mtk_iommu.h index d51ff99c2c71..9971cedd72ea 100644 --- a/drivers/iommu/mtk_iommu.h +++ b/drivers/iommu/mtk_iommu.h @@ -25,6 +25,7 @@ struct mtk_iommu_suspend_reg { u32 int_main_control; u32 ivrp_paddr; u32 vld_pa_rng; + u32 wr_len; }; enum mtk_iommu_plat { @@ -43,6 +44,7 @@ struct mtk_iommu_plat_data { bool has_misc_ctrl; bool has_sub_comm; bool has_vld_pa_rng; + bool has_wr_len; bool reset_axi; u32 inv_sel_reg; unsigned char larbid_remap[8][4]; -- 2.18.0 _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2C09FC47257 for ; Sat, 9 May 2020 08:51:18 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 00A352184D for ; Sat, 9 May 2020 08:51:18 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="HxxU6hFa"; dkim=fail reason="signature verification failed" (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="oE5s5aU1" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 00A352184D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=mediatek.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=ubGGpuX8V65r3NSji0oINBv+e05IkT9/KSi5ZZgqiyw=; b=HxxU6hFajZOS3P KwnhIe6uHWjguSdKQGgXUWbxRHde6bpThsLxUVXUs/CkIT/hLYp8cdNSozIrSrUWDk5P9+0mffjX5 H0us4nZ2dy26SRMEcGzfFyqJNTrXctHb3t4VBfLTUc5DIPSGyusSrSWrhmHJSVqBupXIp9vt3zGc7 D/WEE1iSCRE1m+JYxVFQoubz6jvuxA2wUAg/V30oON1WkaZ4OnrhBAT6lP9O7o9jFsOuTPV9tktVd Z6h/aWuma9R9nt3KW205opqbhsxUcwnaegDunSHYmMS+iHc8Q2A1NdFxVIKprPCiNnrAHBXzm1vjY mics9RMMPKEdY4F6/nlA==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jXLCP-00037I-S0; Sat, 09 May 2020 08:51:09 +0000 Received: from mailgw02.mediatek.com ([216.200.240.185]) by bombadil.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1jXLBh-0002MY-G1; Sat, 09 May 2020 08:50:27 +0000 X-UUID: 84a4b81b1bb4484885d81f09481c60d2-20200509 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=nxNKFtFcVgXCGJ4BNQwJD0XYyDxH3mH6r9HcI8tiLlE=; b=oE5s5aU1cUlNlDXUCYx/ZOk+zS6vsVWYIXC/4LFD6Kry81QWVB6CaxJ3HxZzz11A7jLae75gfLeUXPabLAyxXPMHbY8uT3PVfqEmaE+iRMGW3hvjF3+EhabuQEEk76yUFITAX2Cr5GOq8lkq7he4f/GEuHHo9G4dZqtLVtRwA3M=; X-UUID: 84a4b81b1bb4484885d81f09481c60d2-20200509 Received: from mtkcas66.mediatek.inc [(172.29.193.44)] by mailgw02.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLS) with ESMTP id 387575333; Sat, 09 May 2020 00:50:14 -0800 Received: from MTKMBS01N1.mediatek.inc (172.21.101.68) by MTKMBS62N1.mediatek.inc (172.29.193.41) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sat, 9 May 2020 01:40:17 -0700 Received: from mtkcas08.mediatek.inc (172.21.101.126) by mtkmbs01n1.mediatek.inc (172.21.101.68) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sat, 9 May 2020 16:40:17 +0800 Received: from localhost.localdomain (10.15.20.246) by mtkcas08.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Sat, 9 May 2020 16:40:16 +0800 From: Chao Hao To: Joerg Roedel , Rob Herring , "Matthias Brugger" Subject: [PATCH v3 6/7] iommu/mediatek: Add REG_MMU_WR_LEN definition preparing for mt6779 Date: Sat, 9 May 2020 16:36:53 +0800 Message-ID: <20200509083654.5178-7-chao.hao@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20200509083654.5178-1-chao.hao@mediatek.com> References: <20200509083654.5178-1-chao.hao@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200509_015025_601776_0EE3B568 X-CRM114-Status: GOOD ( 11.11 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, FY Yang , wsd_upstream@mediatek.com, linux-kernel@vger.kernel.org, Chao Hao , iommu@lists.linux-foundation.org, linux-mediatek@lists.infradead.org, Yong Wu , Jun Yan , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org Some platforms(ex: mt6779) have a new register called by REG_MMU_WR_LEN to improve performance. This patch add this register definition. Signed-off-by: Chao Hao --- drivers/iommu/mtk_iommu.c | 10 ++++++++++ drivers/iommu/mtk_iommu.h | 2 ++ 2 files changed, 12 insertions(+) diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c index 3914c418d1b0..dc9ae944e712 100644 --- a/drivers/iommu/mtk_iommu.c +++ b/drivers/iommu/mtk_iommu.c @@ -45,6 +45,8 @@ #define F_MMU_STANDARD_AXI_MODE_BIT (BIT(3) | BIT(19)) #define REG_MMU_DCM_DIS 0x050 +#define REG_MMU_WR_LEN 0x054 +#define F_MMU_WR_THROT_DIS_BIT (BIT(5) | BIT(21)) #define REG_MMU_CTRL_REG 0x110 #define F_MMU_TF_PROT_TO_PROGRAM_ADDR (2 << 4) @@ -592,6 +594,12 @@ static int mtk_iommu_hw_init(const struct mtk_iommu_data *data) writel_relaxed(regval, data->base + REG_MMU_VLD_PA_RNG); } writel_relaxed(0, data->base + REG_MMU_DCM_DIS); + if (data->plat_data->has_wr_len) { + /* write command throttling mode */ + regval = readl_relaxed(data->base + REG_MMU_WR_LEN); + regval &= ~F_MMU_WR_THROT_DIS_BIT; + writel_relaxed(regval, data->base + REG_MMU_WR_LEN); + } if (data->plat_data->has_misc_ctrl) { regval = readl_relaxed(data->base + REG_MMU_MISC_CTRL); @@ -744,6 +752,7 @@ static int __maybe_unused mtk_iommu_suspend(struct device *dev) struct mtk_iommu_suspend_reg *reg = &data->reg; void __iomem *base = data->base; + reg->wr_len = readl_relaxed(base + REG_MMU_WR_LEN); reg->misc_ctrl = readl_relaxed(base + REG_MMU_MISC_CTRL); reg->dcm_dis = readl_relaxed(base + REG_MMU_DCM_DIS); reg->ctrl_reg = readl_relaxed(base + REG_MMU_CTRL_REG); @@ -768,6 +777,7 @@ static int __maybe_unused mtk_iommu_resume(struct device *dev) dev_err(data->dev, "Failed to enable clk(%d) in resume\n", ret); return ret; } + writel_relaxed(reg->wr_len, base + REG_MMU_WR_LEN); writel_relaxed(reg->misc_ctrl, base + REG_MMU_MISC_CTRL); writel_relaxed(reg->dcm_dis, base + REG_MMU_DCM_DIS); writel_relaxed(reg->ctrl_reg, base + REG_MMU_CTRL_REG); diff --git a/drivers/iommu/mtk_iommu.h b/drivers/iommu/mtk_iommu.h index d51ff99c2c71..9971cedd72ea 100644 --- a/drivers/iommu/mtk_iommu.h +++ b/drivers/iommu/mtk_iommu.h @@ -25,6 +25,7 @@ struct mtk_iommu_suspend_reg { u32 int_main_control; u32 ivrp_paddr; u32 vld_pa_rng; + u32 wr_len; }; enum mtk_iommu_plat { @@ -43,6 +44,7 @@ struct mtk_iommu_plat_data { bool has_misc_ctrl; bool has_sub_comm; bool has_vld_pa_rng; + bool has_wr_len; bool reset_axi; u32 inv_sel_reg; unsigned char larbid_remap[8][4]; -- 2.18.0 _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 44EEFC54E49 for ; Sat, 9 May 2020 08:51:18 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 13DB02495C for ; Sat, 9 May 2020 08:51:18 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="O8Mnwmp9"; dkim=fail reason="signature verification failed" (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="oE5s5aU1" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 13DB02495C Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=mediatek.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=mBxrCsbsfhTWdDPzzSol1d537C7uJzhUUqvpikO86AA=; b=O8Mnwmp9pdBgxa vCGS3XtanILTA7PtolcNiaegBAeGCMnnzEsN0HdSLC90TwLLvG+CXFnknQ2rEdo+DgJAEZtybL45H 9LvpmBLbHWr7k93/xvhB/+OQr87yuizlyaxXzfaMEYZOeM067QX31w8cjmyohkEQHcdxEtpBugvLL /YoR1GphYKXd5k1vdN/6zrwh/Pa5gExF70l7rnXNRLu9wvXRopwRH6XGu3qLzFEyEshAVjK5TbKeU EqmRXTTfQP+usukog35mab5BqmcWq/hn7fgp4DQV46uLg9Ucs4mPDbYlqJSE6EC2A//N2pAdEorPm Jo4hOTfp2KMhpSYEEcNQ==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jXLCW-00039s-Mz; Sat, 09 May 2020 08:51:16 +0000 Received: from mailgw02.mediatek.com ([216.200.240.185]) by bombadil.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1jXLBh-0002MY-G1; Sat, 09 May 2020 08:50:27 +0000 X-UUID: 84a4b81b1bb4484885d81f09481c60d2-20200509 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=nxNKFtFcVgXCGJ4BNQwJD0XYyDxH3mH6r9HcI8tiLlE=; b=oE5s5aU1cUlNlDXUCYx/ZOk+zS6vsVWYIXC/4LFD6Kry81QWVB6CaxJ3HxZzz11A7jLae75gfLeUXPabLAyxXPMHbY8uT3PVfqEmaE+iRMGW3hvjF3+EhabuQEEk76yUFITAX2Cr5GOq8lkq7he4f/GEuHHo9G4dZqtLVtRwA3M=; X-UUID: 84a4b81b1bb4484885d81f09481c60d2-20200509 Received: from mtkcas66.mediatek.inc [(172.29.193.44)] by mailgw02.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLS) with ESMTP id 387575333; Sat, 09 May 2020 00:50:14 -0800 Received: from MTKMBS01N1.mediatek.inc (172.21.101.68) by MTKMBS62N1.mediatek.inc (172.29.193.41) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sat, 9 May 2020 01:40:17 -0700 Received: from mtkcas08.mediatek.inc (172.21.101.126) by mtkmbs01n1.mediatek.inc (172.21.101.68) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sat, 9 May 2020 16:40:17 +0800 Received: from localhost.localdomain (10.15.20.246) by mtkcas08.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Sat, 9 May 2020 16:40:16 +0800 From: Chao Hao To: Joerg Roedel , Rob Herring , "Matthias Brugger" Subject: [PATCH v3 6/7] iommu/mediatek: Add REG_MMU_WR_LEN definition preparing for mt6779 Date: Sat, 9 May 2020 16:36:53 +0800 Message-ID: <20200509083654.5178-7-chao.hao@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20200509083654.5178-1-chao.hao@mediatek.com> References: <20200509083654.5178-1-chao.hao@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200509_015025_601776_0EE3B568 X-CRM114-Status: GOOD ( 11.11 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, FY Yang , wsd_upstream@mediatek.com, linux-kernel@vger.kernel.org, Chao Hao , iommu@lists.linux-foundation.org, linux-mediatek@lists.infradead.org, Yong Wu , Jun Yan , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org Some platforms(ex: mt6779) have a new register called by REG_MMU_WR_LEN to improve performance. This patch add this register definition. Signed-off-by: Chao Hao --- drivers/iommu/mtk_iommu.c | 10 ++++++++++ drivers/iommu/mtk_iommu.h | 2 ++ 2 files changed, 12 insertions(+) diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c index 3914c418d1b0..dc9ae944e712 100644 --- a/drivers/iommu/mtk_iommu.c +++ b/drivers/iommu/mtk_iommu.c @@ -45,6 +45,8 @@ #define F_MMU_STANDARD_AXI_MODE_BIT (BIT(3) | BIT(19)) #define REG_MMU_DCM_DIS 0x050 +#define REG_MMU_WR_LEN 0x054 +#define F_MMU_WR_THROT_DIS_BIT (BIT(5) | BIT(21)) #define REG_MMU_CTRL_REG 0x110 #define F_MMU_TF_PROT_TO_PROGRAM_ADDR (2 << 4) @@ -592,6 +594,12 @@ static int mtk_iommu_hw_init(const struct mtk_iommu_data *data) writel_relaxed(regval, data->base + REG_MMU_VLD_PA_RNG); } writel_relaxed(0, data->base + REG_MMU_DCM_DIS); + if (data->plat_data->has_wr_len) { + /* write command throttling mode */ + regval = readl_relaxed(data->base + REG_MMU_WR_LEN); + regval &= ~F_MMU_WR_THROT_DIS_BIT; + writel_relaxed(regval, data->base + REG_MMU_WR_LEN); + } if (data->plat_data->has_misc_ctrl) { regval = readl_relaxed(data->base + REG_MMU_MISC_CTRL); @@ -744,6 +752,7 @@ static int __maybe_unused mtk_iommu_suspend(struct device *dev) struct mtk_iommu_suspend_reg *reg = &data->reg; void __iomem *base = data->base; + reg->wr_len = readl_relaxed(base + REG_MMU_WR_LEN); reg->misc_ctrl = readl_relaxed(base + REG_MMU_MISC_CTRL); reg->dcm_dis = readl_relaxed(base + REG_MMU_DCM_DIS); reg->ctrl_reg = readl_relaxed(base + REG_MMU_CTRL_REG); @@ -768,6 +777,7 @@ static int __maybe_unused mtk_iommu_resume(struct device *dev) dev_err(data->dev, "Failed to enable clk(%d) in resume\n", ret); return ret; } + writel_relaxed(reg->wr_len, base + REG_MMU_WR_LEN); writel_relaxed(reg->misc_ctrl, base + REG_MMU_MISC_CTRL); writel_relaxed(reg->dcm_dis, base + REG_MMU_DCM_DIS); writel_relaxed(reg->ctrl_reg, base + REG_MMU_CTRL_REG); diff --git a/drivers/iommu/mtk_iommu.h b/drivers/iommu/mtk_iommu.h index d51ff99c2c71..9971cedd72ea 100644 --- a/drivers/iommu/mtk_iommu.h +++ b/drivers/iommu/mtk_iommu.h @@ -25,6 +25,7 @@ struct mtk_iommu_suspend_reg { u32 int_main_control; u32 ivrp_paddr; u32 vld_pa_rng; + u32 wr_len; }; enum mtk_iommu_plat { @@ -43,6 +44,7 @@ struct mtk_iommu_plat_data { bool has_misc_ctrl; bool has_sub_comm; bool has_vld_pa_rng; + bool has_wr_len; bool reset_axi; u32 inv_sel_reg; unsigned char larbid_remap[8][4]; -- 2.18.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel