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From: Shawn Guo <shawn.guo@linaro.org>
To: Rob Clark <robdclark@gmail.com>, Joerg Roedel <joro@8bytes.org>
Cc: Andy Gross <agross@kernel.org>,
	Bjorn Andersson <bjorn.andersson@linaro.org>,
	Konrad Dybcio <konradybcio@gmail.com>,
	linux-arm-msm@vger.kernel.org, iommu@lists.linux-foundation.org,
	Shawn Guo <shawn.guo@linaro.org>
Subject: [PATCH] iommu/qcom: add optional clock for TLB invalidate
Date: Sat,  9 May 2020 21:08:25 +0800	[thread overview]
Message-ID: <20200509130825.28248-1-shawn.guo@linaro.org> (raw)

On some SoCs like MSM8939 with A405 adreno, there is a gfx_tbu clock
needs to be on while doing TLB invalidate. Otherwise, TLBSYNC status
will not be correctly reflected, causing the system to go into a bad
state.  Add it as an optional clock, so that platforms that have this
clock can pass it over DT.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
---
 drivers/iommu/qcom_iommu.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/drivers/iommu/qcom_iommu.c b/drivers/iommu/qcom_iommu.c
index 0e2a96467767..2f6c6da7d540 100644
--- a/drivers/iommu/qcom_iommu.c
+++ b/drivers/iommu/qcom_iommu.c
@@ -45,6 +45,7 @@ struct qcom_iommu_dev {
 	struct device		*dev;
 	struct clk		*iface_clk;
 	struct clk		*bus_clk;
+	struct clk		*tlb_clk;
 	void __iomem		*local_base;
 	u32			 sec_id;
 	u8			 num_ctxs;
@@ -643,11 +644,20 @@ static int qcom_iommu_enable_clocks(struct qcom_iommu_dev *qcom_iommu)
 		return ret;
 	}
 
+	ret = clk_prepare_enable(qcom_iommu->tlb_clk);
+	if (ret) {
+		dev_err(qcom_iommu->dev, "Couldn't enable tlb_clk\n");
+		clk_disable_unprepare(qcom_iommu->bus_clk);
+		clk_disable_unprepare(qcom_iommu->iface_clk);
+		return ret;
+	}
+
 	return 0;
 }
 
 static void qcom_iommu_disable_clocks(struct qcom_iommu_dev *qcom_iommu)
 {
+	clk_disable_unprepare(qcom_iommu->tlb_clk);
 	clk_disable_unprepare(qcom_iommu->bus_clk);
 	clk_disable_unprepare(qcom_iommu->iface_clk);
 }
@@ -839,6 +849,12 @@ static int qcom_iommu_device_probe(struct platform_device *pdev)
 		return PTR_ERR(qcom_iommu->bus_clk);
 	}
 
+	qcom_iommu->tlb_clk = devm_clk_get(dev, "tlb");
+	if (IS_ERR(qcom_iommu->tlb_clk)) {
+		dev_dbg(dev, "failed to get tlb clock\n");
+		qcom_iommu->tlb_clk = NULL;
+	}
+
 	if (of_property_read_u32(dev->of_node, "qcom,iommu-secure-id",
 				 &qcom_iommu->sec_id)) {
 		dev_err(dev, "missing qcom,iommu-secure-id property\n");
-- 
2.17.1


WARNING: multiple messages have this Message-ID

From: Shawn Guo <shawn.guo@linaro.org>
To: Rob Clark <robdclark@gmail.com>, Joerg Roedel <joro@8bytes.org>
Cc: linux-arm-msm@vger.kernel.org,
	Konrad Dybcio <konradybcio@gmail.com>,
	Bjorn Andersson <bjorn.andersson@linaro.org>,
	iommu@lists.linux-foundation.org, Andy Gross <agross@kernel.org>,
	Shawn Guo <shawn.guo@linaro.org>
Subject: [PATCH] iommu/qcom: add optional clock for TLB invalidate
Date: Sat,  9 May 2020 21:08:25 +0800	[thread overview]
Message-ID: <20200509130825.28248-1-shawn.guo@linaro.org> (raw)

On some SoCs like MSM8939 with A405 adreno, there is a gfx_tbu clock
needs to be on while doing TLB invalidate. Otherwise, TLBSYNC status
will not be correctly reflected, causing the system to go into a bad
state.  Add it as an optional clock, so that platforms that have this
clock can pass it over DT.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
---
 drivers/iommu/qcom_iommu.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/drivers/iommu/qcom_iommu.c b/drivers/iommu/qcom_iommu.c
index 0e2a96467767..2f6c6da7d540 100644
--- a/drivers/iommu/qcom_iommu.c
+++ b/drivers/iommu/qcom_iommu.c
@@ -45,6 +45,7 @@ struct qcom_iommu_dev {
 	struct device		*dev;
 	struct clk		*iface_clk;
 	struct clk		*bus_clk;
+	struct clk		*tlb_clk;
 	void __iomem		*local_base;
 	u32			 sec_id;
 	u8			 num_ctxs;
@@ -643,11 +644,20 @@ static int qcom_iommu_enable_clocks(struct qcom_iommu_dev *qcom_iommu)
 		return ret;
 	}
 
+	ret = clk_prepare_enable(qcom_iommu->tlb_clk);
+	if (ret) {
+		dev_err(qcom_iommu->dev, "Couldn't enable tlb_clk\n");
+		clk_disable_unprepare(qcom_iommu->bus_clk);
+		clk_disable_unprepare(qcom_iommu->iface_clk);
+		return ret;
+	}
+
 	return 0;
 }
 
 static void qcom_iommu_disable_clocks(struct qcom_iommu_dev *qcom_iommu)
 {
+	clk_disable_unprepare(qcom_iommu->tlb_clk);
 	clk_disable_unprepare(qcom_iommu->bus_clk);
 	clk_disable_unprepare(qcom_iommu->iface_clk);
 }
@@ -839,6 +849,12 @@ static int qcom_iommu_device_probe(struct platform_device *pdev)
 		return PTR_ERR(qcom_iommu->bus_clk);
 	}
 
+	qcom_iommu->tlb_clk = devm_clk_get(dev, "tlb");
+	if (IS_ERR(qcom_iommu->tlb_clk)) {
+		dev_dbg(dev, "failed to get tlb clock\n");
+		qcom_iommu->tlb_clk = NULL;
+	}
+
 	if (of_property_read_u32(dev->of_node, "qcom,iommu-secure-id",
 				 &qcom_iommu->sec_id)) {
 		dev_err(dev, "missing qcom,iommu-secure-id property\n");
-- 
2.17.1

_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu

             reply	other threads:[~2020-05-09 13:08 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-09 13:08 Shawn Guo [this message]
2020-05-09 13:08 ` [PATCH] iommu/qcom: add optional clock for TLB invalidate Shawn Guo
2020-05-09 13:21 ` Stanimir Varbanov
2020-05-09 13:21   ` Stanimir Varbanov
2020-05-10 14:30   ` Shawn Guo
2020-05-10 14:30     ` Shawn Guo
2020-05-12  5:52 ` Bjorn Andersson
2020-05-12  5:52   ` Bjorn Andersson
2020-05-12 18:35   ` Rob Clark
2020-05-12 18:35     ` Rob Clark
2020-05-14 14:39   ` Shawn Guo
2020-05-14 14:39     ` Shawn Guo
2020-05-14 15:15     ` Bjorn Andersson
2020-05-14 15:15       ` Bjorn Andersson

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