From: Christoph Hellwig <hch@lst.de> To: Andrew Morton <akpm@linux-foundation.org>, Arnd Bergmann <arnd@arndb.de>, Roman Zippel <zippel@linux-m68k.org> Cc: Jessica Yu <jeyu@kernel.org>, Michal Simek <monstr@monstr.eu>, x86@kernel.org, linux-alpha@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-c6x-dev@linux-c6x.org, linux-hexagon@vger.kernel.org, linux-ia64@vger.kernel.org, linux-m68k@lists.linux-m68k.org, linux-mips@vger.kernel.org, openrisc@lists.librecores.org, linuxppc-dev@lists.ozlabs.org, linux-riscv@lists.infradead.org, linux-sh@vger.kernel.org, sparclinux@vger.kernel.org, linux-arch@vger.kernel.org, linux-mm@kvack.org, linux-um@lists.infradead.org, linux-xtensa@linux-xtensa.org, linux-fsdevel@vger.kernel.org Subject: [PATCH 06/31] unicore32: remove flush_cache_user_range Date: Sun, 10 May 2020 07:54:45 +0000 [thread overview] Message-ID: <20200510075510.987823-7-hch@lst.de> (raw) In-Reply-To: <20200510075510.987823-1-hch@lst.de> flush_cache_user_range is an ARMism not used by any generic or unicore32 specific code. Signed-off-by: Christoph Hellwig <hch@lst.de> --- arch/unicore32/include/asm/cacheflush.h | 8 -------- 1 file changed, 8 deletions(-) diff --git a/arch/unicore32/include/asm/cacheflush.h b/arch/unicore32/include/asm/cacheflush.h index dc8c0b41538f8..9393ca4047e93 100644 --- a/arch/unicore32/include/asm/cacheflush.h +++ b/arch/unicore32/include/asm/cacheflush.h @@ -132,14 +132,6 @@ extern void flush_cache_page(struct vm_area_struct *vma, #define flush_cache_dup_mm(mm) flush_cache_mm(mm) -/* - * flush_cache_user_range is used when we want to ensure that the - * Harvard caches are synchronised for the user space address range. - * This is used for the UniCore private sys_cacheflush system call. - */ -#define flush_cache_user_range(vma, start, end) \ - __cpuc_coherent_user_range((start) & PAGE_MASK, PAGE_ALIGN(end)) - /* * Perform necessary cache operations to ensure that data previously * stored within this range of addresses can be executed by the CPU. -- 2.26.2
WARNING: multiple messages have this Message-ID
From: Christoph Hellwig <hch@lst.de> To: Andrew Morton <akpm@linux-foundation.org>, Arnd Bergmann <arnd@arndb.de>, Roman Zippel <zippel@linux-m68k.org> Cc: Jessica Yu <jeyu@kernel.org>, Michal Simek <monstr@monstr.eu>, x86@kernel.org, linux-alpha@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-c6x-dev@linux-c6x.org, linux-hexagon@vger.kernel.org, linux-ia64@vger.kernel.org, linux-m68k@lists.linux-m68k.org, linux-mips@vger.kernel.org, openrisc@lists.librecores.org, linuxppc-dev@lists.ozlabs.org, linux-riscv@lists.infradead.org, linux-sh@vger.kernel.org, sparclinux@vger.kernel.org, linux-arch@vger.kernel.org, linux-mm@kvack.org, linux-um@lists.infradead.org, linux-xtensa@linux-xtensa.org, linux-fsdevel@vger.kernel.org Subject: [PATCH 06/31] unicore32: remove flush_cache_user_range Date: Sun, 10 May 2020 09:54:45 +0200 [thread overview] Message-ID: <20200510075510.987823-7-hch@lst.de> (raw) In-Reply-To: <20200510075510.987823-1-hch@lst.de> flush_cache_user_range is an ARMism not used by any generic or unicore32 specific code. Signed-off-by: Christoph Hellwig <hch@lst.de> --- arch/unicore32/include/asm/cacheflush.h | 8 -------- 1 file changed, 8 deletions(-) diff --git a/arch/unicore32/include/asm/cacheflush.h b/arch/unicore32/include/asm/cacheflush.h index dc8c0b41538f8..9393ca4047e93 100644 --- a/arch/unicore32/include/asm/cacheflush.h +++ b/arch/unicore32/include/asm/cacheflush.h @@ -132,14 +132,6 @@ extern void flush_cache_page(struct vm_area_struct *vma, #define flush_cache_dup_mm(mm) flush_cache_mm(mm) -/* - * flush_cache_user_range is used when we want to ensure that the - * Harvard caches are synchronised for the user space address range. - * This is used for the UniCore private sys_cacheflush system call. - */ -#define flush_cache_user_range(vma, start, end) \ - __cpuc_coherent_user_range((start) & PAGE_MASK, PAGE_ALIGN(end)) - /* * Perform necessary cache operations to ensure that data previously * stored within this range of addresses can be executed by the CPU. -- 2.26.2
WARNING: multiple messages have this Message-ID
From: Christoph Hellwig <hch@lst.de> To: Andrew Morton <akpm@linux-foundation.org>, Arnd Bergmann <arnd@arndb.de>, Roman Zippel <zippel@linux-m68k.org> Cc: linux-arch@vger.kernel.org, linux-xtensa@linux-xtensa.org, Michal Simek <monstr@monstr.eu>, Jessica Yu <jeyu@kernel.org>, linux-ia64@vger.kernel.org, linux-c6x-dev@linux-c6x.org, linux-sh@vger.kernel.org, linux-hexagon@vger.kernel.org, x86@kernel.org, linux-um@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mips@vger.kernel.org, linux-mm@kvack.org, linux-m68k@lists.linux-m68k.org, openrisc@lists.librecores.org, linux-alpha@vger.kernel.org, sparclinux@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-riscv@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 06/31] unicore32: remove flush_cache_user_range Date: Sun, 10 May 2020 09:54:45 +0200 [thread overview] Message-ID: <20200510075510.987823-7-hch@lst.de> (raw) In-Reply-To: <20200510075510.987823-1-hch@lst.de> flush_cache_user_range is an ARMism not used by any generic or unicore32 specific code. Signed-off-by: Christoph Hellwig <hch@lst.de> --- arch/unicore32/include/asm/cacheflush.h | 8 -------- 1 file changed, 8 deletions(-) diff --git a/arch/unicore32/include/asm/cacheflush.h b/arch/unicore32/include/asm/cacheflush.h index dc8c0b41538f8..9393ca4047e93 100644 --- a/arch/unicore32/include/asm/cacheflush.h +++ b/arch/unicore32/include/asm/cacheflush.h @@ -132,14 +132,6 @@ extern void flush_cache_page(struct vm_area_struct *vma, #define flush_cache_dup_mm(mm) flush_cache_mm(mm) -/* - * flush_cache_user_range is used when we want to ensure that the - * Harvard caches are synchronised for the user space address range. - * This is used for the UniCore private sys_cacheflush system call. - */ -#define flush_cache_user_range(vma, start, end) \ - __cpuc_coherent_user_range((start) & PAGE_MASK, PAGE_ALIGN(end)) - /* * Perform necessary cache operations to ensure that data previously * stored within this range of addresses can be executed by the CPU. -- 2.26.2
WARNING: multiple messages have this Message-ID
From: Christoph Hellwig <hch@lst.de> To: Andrew Morton <akpm@linux-foundation.org>, Arnd Bergmann <arnd@arndb.de>, Roman Zippel <zippel@linux-m68k.org> Cc: linux-arch@vger.kernel.org, linux-xtensa@linux-xtensa.org, Michal Simek <monstr@monstr.eu>, Jessica Yu <jeyu@kernel.org>, linux-ia64@vger.kernel.org, linux-c6x-dev@linux-c6x.org, linux-sh@vger.kernel.org, linux-hexagon@vger.kernel.org, x86@kernel.org, linux-um@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mips@vger.kernel.org, linux-mm@kvack.org, linux-m68k@lists.linux-m68k.org, openrisc@lists.librecores.org, linux-alpha@vger.kernel.org, sparclinux@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-riscv@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 06/31] unicore32: remove flush_cache_user_range Date: Sun, 10 May 2020 09:54:45 +0200 [thread overview] Message-ID: <20200510075510.987823-7-hch@lst.de> (raw) In-Reply-To: <20200510075510.987823-1-hch@lst.de> flush_cache_user_range is an ARMism not used by any generic or unicore32 specific code. Signed-off-by: Christoph Hellwig <hch@lst.de> --- arch/unicore32/include/asm/cacheflush.h | 8 -------- 1 file changed, 8 deletions(-) diff --git a/arch/unicore32/include/asm/cacheflush.h b/arch/unicore32/include/asm/cacheflush.h index dc8c0b41538f8..9393ca4047e93 100644 --- a/arch/unicore32/include/asm/cacheflush.h +++ b/arch/unicore32/include/asm/cacheflush.h @@ -132,14 +132,6 @@ extern void flush_cache_page(struct vm_area_struct *vma, #define flush_cache_dup_mm(mm) flush_cache_mm(mm) -/* - * flush_cache_user_range is used when we want to ensure that the - * Harvard caches are synchronised for the user space address range. - * This is used for the UniCore private sys_cacheflush system call. - */ -#define flush_cache_user_range(vma, start, end) \ - __cpuc_coherent_user_range((start) & PAGE_MASK, PAGE_ALIGN(end)) - /* * Perform necessary cache operations to ensure that data previously * stored within this range of addresses can be executed by the CPU. -- 2.26.2 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID
From: Christoph Hellwig <hch@lst.de> To: openrisc@lists.librecores.org Subject: [OpenRISC] [PATCH 06/31] unicore32: remove flush_cache_user_range Date: Sun, 10 May 2020 09:54:45 +0200 [thread overview] Message-ID: <20200510075510.987823-7-hch@lst.de> (raw) In-Reply-To: <20200510075510.987823-1-hch@lst.de> flush_cache_user_range is an ARMism not used by any generic or unicore32 specific code. Signed-off-by: Christoph Hellwig <hch@lst.de> --- arch/unicore32/include/asm/cacheflush.h | 8 -------- 1 file changed, 8 deletions(-) diff --git a/arch/unicore32/include/asm/cacheflush.h b/arch/unicore32/include/asm/cacheflush.h index dc8c0b41538f8..9393ca4047e93 100644 --- a/arch/unicore32/include/asm/cacheflush.h +++ b/arch/unicore32/include/asm/cacheflush.h @@ -132,14 +132,6 @@ extern void flush_cache_page(struct vm_area_struct *vma, #define flush_cache_dup_mm(mm) flush_cache_mm(mm) -/* - * flush_cache_user_range is used when we want to ensure that the - * Harvard caches are synchronised for the user space address range. - * This is used for the UniCore private sys_cacheflush system call. - */ -#define flush_cache_user_range(vma, start, end) \ - __cpuc_coherent_user_range((start) & PAGE_MASK, PAGE_ALIGN(end)) - /* * Perform necessary cache operations to ensure that data previously * stored within this range of addresses can be executed by the CPU. -- 2.26.2
next prev parent reply other threads:[~2020-05-10 7:54 UTC|newest] Thread overview: 279+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-05-10 7:54 sort out the flush_icache_range mess Christoph Hellwig 2020-05-10 7:54 ` [OpenRISC] " Christoph Hellwig 2020-05-10 7:54 ` Christoph Hellwig 2020-05-10 7:54 ` Christoph Hellwig 2020-05-10 7:54 ` Christoph Hellwig 2020-05-10 7:54 ` [PATCH 01/31] arm: fix the flush_icache_range arguments in set_fiq_handler Christoph Hellwig 2020-05-10 7:54 ` [OpenRISC] " Christoph Hellwig 2020-05-10 7:54 ` Christoph Hellwig 2020-05-10 7:54 ` Christoph Hellwig 2020-05-10 7:54 ` Christoph Hellwig 2020-05-10 7:54 ` [PATCH 02/31] arm64: fix the flush_icache_range arguments in machine_kexec Christoph Hellwig 2020-05-10 7:54 ` [OpenRISC] " Christoph Hellwig 2020-05-10 7:54 ` Christoph Hellwig 2020-05-10 7:54 ` Christoph Hellwig 2020-05-10 7:54 ` Christoph Hellwig 2020-05-11 7:51 ` Will Deacon 2020-05-11 7:51 ` [OpenRISC] " Will Deacon 2020-05-11 7:51 ` Will Deacon 2020-05-11 7:51 ` Will Deacon 2020-05-11 7:51 ` Will Deacon 2020-05-11 11:00 ` Catalin Marinas 2020-05-11 11:00 ` [OpenRISC] " Catalin Marinas 2020-05-11 11:00 ` Catalin Marinas 2020-05-11 11:00 ` Catalin Marinas 2020-05-11 11:00 ` Catalin Marinas 2020-05-11 15:15 ` Christoph Hellwig 2020-05-11 15:15 ` [OpenRISC] " Christoph Hellwig 2020-05-11 15:15 ` Christoph Hellwig 2020-05-11 15:15 ` Christoph Hellwig 2020-05-11 15:15 ` Christoph Hellwig 2020-05-11 15:15 ` Christoph Hellwig 2020-05-10 7:54 ` [PATCH 03/31] MIPS: unexport __flush_icache_user_range Christoph Hellwig 2020-05-10 7:54 ` [OpenRISC] " Christoph Hellwig 2020-05-10 7:54 ` Christoph Hellwig 2020-05-10 7:54 ` Christoph Hellwig 2020-05-10 7:54 ` Christoph Hellwig 2020-05-11 16:01 ` Thomas Bogendoerfer 2020-05-11 16:01 ` [OpenRISC] " Thomas Bogendoerfer 2020-05-11 16:01 ` Thomas Bogendoerfer 2020-05-11 16:01 ` Thomas Bogendoerfer 2020-05-11 16:01 ` Thomas Bogendoerfer 2020-05-10 7:54 ` [PATCH 04/31] nds32: unexport flush_icache_page Christoph Hellwig 2020-05-10 7:54 ` [OpenRISC] " Christoph Hellwig 2020-05-10 7:54 ` Christoph Hellwig 2020-05-10 7:54 ` Christoph Hellwig 2020-05-10 7:54 ` Christoph Hellwig 2020-05-10 7:54 ` [PATCH 05/31] powerpc: unexport flush_icache_user_range Christoph Hellwig 2020-05-10 7:54 ` [OpenRISC] " Christoph Hellwig 2020-05-10 7:54 ` Christoph Hellwig 2020-05-10 7:54 ` Christoph Hellwig 2020-05-10 7:54 ` Christoph Hellwig 2020-05-10 7:54 ` Christoph Hellwig [this message] 2020-05-10 7:54 ` [OpenRISC] [PATCH 06/31] unicore32: remove flush_cache_user_range Christoph Hellwig 2020-05-10 7:54 ` Christoph Hellwig 2020-05-10 7:54 ` Christoph Hellwig 2020-05-10 7:54 ` Christoph Hellwig 2020-05-10 7:54 ` [PATCH 07/31] asm-generic: fix the inclusion guards for cacheflush.h Christoph Hellwig 2020-05-10 7:54 ` [OpenRISC] " Christoph Hellwig 2020-05-10 7:54 ` Christoph Hellwig 2020-05-10 7:54 ` Christoph Hellwig 2020-05-10 7:54 ` Christoph Hellwig 2020-05-10 7:54 ` [PATCH 08/31] asm-generic: don't include <linux/mm.h> in cacheflush.h Christoph Hellwig 2020-05-10 7:54 ` [OpenRISC] " Christoph Hellwig 2020-05-10 7:54 ` Christoph Hellwig 2020-05-10 7:54 ` Christoph Hellwig 2020-05-10 7:54 ` Christoph Hellwig 2020-05-10 7:54 ` [PATCH 09/31] asm-generic: improve the flush_dcache_page stub Christoph Hellwig 2020-05-10 7:54 ` [OpenRISC] " Christoph Hellwig 2020-05-10 7:54 ` Christoph Hellwig 2020-05-10 7:54 ` Christoph Hellwig 2020-05-10 7:54 ` Christoph Hellwig 2020-05-10 7:54 ` Christoph Hellwig 2020-05-10 7:54 ` [PATCH 10/31] alpha: use asm-generic/cacheflush.h Christoph Hellwig 2020-05-10 7:54 ` [OpenRISC] " Christoph Hellwig 2020-05-10 7:54 ` Christoph Hellwig 2020-05-10 7:54 ` Christoph Hellwig 2020-05-10 7:54 ` Christoph Hellwig 2020-05-10 7:54 ` [PATCH 11/31] arm64: " Christoph Hellwig 2020-05-10 7:54 ` [OpenRISC] " Christoph Hellwig 2020-05-10 7:54 ` Christoph Hellwig 2020-05-10 7:54 ` Christoph Hellwig 2020-05-10 7:54 ` Christoph Hellwig 2020-05-10 7:54 ` [PATCH 12/31] c6x: " Christoph Hellwig 2020-05-10 7:54 ` [OpenRISC] " Christoph Hellwig 2020-05-10 7:54 ` Christoph Hellwig 2020-05-10 7:54 ` Christoph Hellwig 2020-05-10 7:54 ` Christoph Hellwig 2020-05-10 7:54 ` [PATCH 13/31] hexagon: " Christoph Hellwig 2020-05-10 7:54 ` [OpenRISC] " Christoph Hellwig 2020-05-10 7:54 ` Christoph Hellwig 2020-05-10 7:54 ` Christoph Hellwig 2020-05-10 7:54 ` Christoph Hellwig 2020-05-10 7:54 ` [PATCH 14/31] ia64: " Christoph Hellwig 2020-05-10 7:54 ` [OpenRISC] " Christoph Hellwig 2020-05-10 7:54 ` Christoph Hellwig 2020-05-10 7:54 ` Christoph Hellwig 2020-05-10 7:54 ` Christoph Hellwig 2020-05-10 7:54 ` Christoph Hellwig 2020-05-10 7:54 ` [PATCH 15/31] microblaze: " Christoph Hellwig 2020-05-10 7:54 ` [OpenRISC] " Christoph Hellwig 2020-05-10 7:54 ` Christoph Hellwig 2020-05-10 7:54 ` Christoph Hellwig 2020-05-10 7:54 ` Christoph Hellwig 2020-05-10 7:54 ` [PATCH 16/31] m68knommu: " Christoph Hellwig 2020-05-10 7:54 ` [OpenRISC] " Christoph Hellwig 2020-05-10 7:54 ` Christoph Hellwig 2020-05-10 7:54 ` Christoph Hellwig 2020-05-10 7:54 ` Christoph Hellwig 2020-05-12 14:44 ` Greg Ungerer 2020-05-12 14:44 ` [OpenRISC] " Greg Ungerer 2020-05-12 14:44 ` Greg Ungerer 2020-05-12 14:44 ` Greg Ungerer 2020-05-12 14:44 ` Greg Ungerer 2020-05-10 7:54 ` [PATCH 17/31] openrisc: " Christoph Hellwig 2020-05-10 7:54 ` [OpenRISC] " Christoph Hellwig 2020-05-10 7:54 ` Christoph Hellwig 2020-05-10 7:54 ` Christoph Hellwig 2020-05-10 7:54 ` Christoph Hellwig 2020-05-10 7:54 ` [PATCH 18/31] powerpc: " Christoph Hellwig 2020-05-10 7:54 ` [OpenRISC] " Christoph Hellwig 2020-05-10 7:54 ` Christoph Hellwig 2020-05-10 7:54 ` Christoph Hellwig 2020-05-10 7:54 ` Christoph Hellwig 2020-05-10 7:54 ` [PATCH 19/31] riscv: " Christoph Hellwig 2020-05-10 7:54 ` [OpenRISC] " Christoph Hellwig 2020-05-10 7:54 ` Christoph Hellwig 2020-05-10 7:54 ` Christoph Hellwig 2020-05-10 7:54 ` Christoph Hellwig 2020-05-12 23:00 ` Palmer Dabbelt 2020-05-12 23:00 ` [OpenRISC] " Palmer Dabbelt 2020-05-12 23:00 ` Palmer Dabbelt 2020-05-12 23:00 ` Palmer Dabbelt 2020-05-12 23:00 ` Palmer Dabbelt 2020-05-13 6:23 ` Christoph Hellwig 2020-05-13 6:23 ` [OpenRISC] " Christoph Hellwig 2020-05-13 6:23 ` Christoph Hellwig 2020-05-13 6:23 ` Christoph Hellwig 2020-05-13 6:23 ` Christoph Hellwig 2020-05-10 7:54 ` [PATCH 20/31] arm,sparc,unicore32: remove flush_icache_user_range Christoph Hellwig 2020-05-10 7:54 ` [OpenRISC] [PATCH 20/31] arm, sparc, unicore32: " Christoph Hellwig 2020-05-10 7:54 ` [PATCH 20/31] arm,sparc,unicore32: " Christoph Hellwig 2020-05-10 7:54 ` Christoph Hellwig 2020-05-10 7:54 ` Christoph Hellwig 2020-05-10 7:55 ` [PATCH 21/31] mm: rename flush_icache_user_range to flush_icache_user_page Christoph Hellwig 2020-05-10 7:55 ` [OpenRISC] " Christoph Hellwig 2020-05-10 7:55 ` Christoph Hellwig 2020-05-10 7:55 ` Christoph Hellwig 2020-05-10 7:55 ` Christoph Hellwig 2020-05-11 7:36 ` Geert Uytterhoeven 2020-05-11 7:36 ` [OpenRISC] " Geert Uytterhoeven 2020-05-11 7:36 ` Geert Uytterhoeven 2020-05-11 7:36 ` Geert Uytterhoeven 2020-05-11 7:36 ` Geert Uytterhoeven 2020-05-11 7:36 ` Geert Uytterhoeven 2020-05-11 7:36 ` Geert Uytterhoeven 2020-05-11 7:36 ` Geert Uytterhoeven 2020-05-10 7:55 ` [PATCH 22/31] asm-generic: add a flush_icache_user_range stub Christoph Hellwig 2020-05-10 7:55 ` [OpenRISC] " Christoph Hellwig 2020-05-10 7:55 ` Christoph Hellwig 2020-05-10 7:55 ` Christoph Hellwig 2020-05-10 7:55 ` Christoph Hellwig 2020-05-10 7:55 ` [PATCH 23/31] sh: implement flush_icache_user_range Christoph Hellwig 2020-05-10 7:55 ` [OpenRISC] " Christoph Hellwig 2020-05-10 7:55 ` Christoph Hellwig 2020-05-10 7:55 ` Christoph Hellwig 2020-05-10 7:55 ` Christoph Hellwig 2020-05-10 7:55 ` [PATCH 24/31] xtensa: " Christoph Hellwig 2020-05-10 7:55 ` [OpenRISC] " Christoph Hellwig 2020-05-10 7:55 ` Christoph Hellwig 2020-05-10 7:55 ` Christoph Hellwig 2020-05-10 7:55 ` Christoph Hellwig 2020-05-10 7:55 ` [PATCH 25/31] arm: rename flush_cache_user_range to flush_icache_user_range Christoph Hellwig 2020-05-10 7:55 ` [OpenRISC] " Christoph Hellwig 2020-05-10 7:55 ` Christoph Hellwig 2020-05-10 7:55 ` Christoph Hellwig 2020-05-10 7:55 ` Christoph Hellwig 2020-05-10 7:55 ` [PATCH 26/31] m68k: implement flush_icache_user_range Christoph Hellwig 2020-05-10 7:55 ` [OpenRISC] " Christoph Hellwig 2020-05-10 7:55 ` Christoph Hellwig 2020-05-10 7:55 ` Christoph Hellwig 2020-05-10 7:55 ` Christoph Hellwig 2020-05-11 7:38 ` Geert Uytterhoeven 2020-05-11 7:38 ` [OpenRISC] " Geert Uytterhoeven 2020-05-11 7:38 ` Geert Uytterhoeven 2020-05-11 7:38 ` Geert Uytterhoeven 2020-05-11 7:38 ` Geert Uytterhoeven 2020-05-11 7:38 ` Geert Uytterhoeven 2020-05-11 7:38 ` Geert Uytterhoeven 2020-05-11 7:38 ` Geert Uytterhoeven 2020-05-10 7:55 ` [PATCH 27/31] exec: only build read_code when needed Christoph Hellwig 2020-05-10 7:55 ` [OpenRISC] " Christoph Hellwig 2020-05-10 7:55 ` Christoph Hellwig 2020-05-10 7:55 ` Christoph Hellwig 2020-05-10 7:55 ` Christoph Hellwig 2020-05-10 7:55 ` [PATCH 28/31] exec: use flush_icache_user_range in read_code Christoph Hellwig 2020-05-10 7:55 ` [OpenRISC] " Christoph Hellwig 2020-05-10 7:55 ` Christoph Hellwig 2020-05-10 7:55 ` Christoph Hellwig 2020-05-10 7:55 ` Christoph Hellwig 2020-05-10 7:55 ` [PATCH 29/31] binfmt_flat: use flush_icache_user_range Christoph Hellwig 2020-05-10 7:55 ` [OpenRISC] " Christoph Hellwig 2020-05-10 7:55 ` Christoph Hellwig 2020-05-10 7:55 ` Christoph Hellwig 2020-05-10 7:55 ` Christoph Hellwig 2020-05-12 14:46 ` Greg Ungerer 2020-05-12 14:46 ` [OpenRISC] " Greg Ungerer 2020-05-12 14:46 ` Greg Ungerer 2020-05-12 14:46 ` Greg Ungerer 2020-05-12 14:46 ` Greg Ungerer 2020-05-10 7:55 ` [PATCH 30/31] nommu: use flush_icache_user_range in brk and mmap Christoph Hellwig 2020-05-10 7:55 ` [OpenRISC] " Christoph Hellwig 2020-05-10 7:55 ` Christoph Hellwig 2020-05-10 7:55 ` Christoph Hellwig 2020-05-10 7:55 ` Christoph Hellwig 2020-05-10 7:55 ` [PATCH 31/31] module: move the set_fs hack for flush_icache_range to m68k Christoph Hellwig 2020-05-10 7:55 ` [OpenRISC] " Christoph Hellwig 2020-05-10 7:55 ` Christoph Hellwig 2020-05-10 7:55 ` Christoph Hellwig 2020-05-10 7:55 ` Christoph Hellwig 2020-05-11 7:40 ` Geert Uytterhoeven 2020-05-11 7:40 ` [OpenRISC] " Geert Uytterhoeven 2020-05-11 7:40 ` Geert Uytterhoeven 2020-05-11 7:40 ` Geert Uytterhoeven 2020-05-11 7:40 ` Geert Uytterhoeven 2020-05-11 7:40 ` Geert Uytterhoeven 2020-05-11 7:40 ` Geert Uytterhoeven 2020-05-11 7:40 ` Geert Uytterhoeven 2020-05-11 15:11 ` Christoph Hellwig 2020-05-11 15:11 ` [OpenRISC] " Christoph Hellwig 2020-05-11 15:11 ` Christoph Hellwig 2020-05-11 15:11 ` Christoph Hellwig 2020-05-11 15:11 ` Christoph Hellwig 2020-05-11 15:11 ` Christoph Hellwig 2020-05-11 15:11 ` Christoph Hellwig 2020-05-11 15:24 ` Geert Uytterhoeven 2020-05-11 15:24 ` [OpenRISC] " Geert Uytterhoeven 2020-05-11 15:24 ` Geert Uytterhoeven 2020-05-11 15:24 ` Geert Uytterhoeven 2020-05-11 15:24 ` Geert Uytterhoeven 2020-05-11 15:24 ` Geert Uytterhoeven 2020-05-11 15:24 ` Geert Uytterhoeven 2020-05-11 15:24 ` Geert Uytterhoeven 2020-05-11 16:37 ` Christoph Hellwig 2020-05-11 16:37 ` [OpenRISC] " Christoph Hellwig 2020-05-11 16:37 ` Christoph Hellwig 2020-05-11 16:37 ` Christoph Hellwig 2020-05-11 16:37 ` Christoph Hellwig 2020-05-11 16:37 ` Christoph Hellwig 2020-05-11 16:37 ` Christoph Hellwig 2020-05-11 7:46 ` sort out the flush_icache_range mess Geert Uytterhoeven 2020-05-11 7:46 ` [OpenRISC] " Geert Uytterhoeven 2020-05-11 7:46 ` Geert Uytterhoeven 2020-05-11 7:46 ` Geert Uytterhoeven 2020-05-11 7:46 ` Geert Uytterhoeven 2020-05-11 7:46 ` Geert Uytterhoeven 2020-05-11 7:46 ` Geert Uytterhoeven 2020-05-11 7:46 ` Geert Uytterhoeven 2020-05-11 15:13 ` Christoph Hellwig 2020-05-11 15:13 ` [OpenRISC] " Christoph Hellwig 2020-05-11 15:13 ` Christoph Hellwig 2020-05-11 15:13 ` Christoph Hellwig 2020-05-11 15:13 ` Christoph Hellwig 2020-05-11 15:13 ` Christoph Hellwig 2020-05-11 15:13 ` Christoph Hellwig 2020-05-11 15:25 ` Geert Uytterhoeven 2020-05-11 15:25 ` [OpenRISC] " Geert Uytterhoeven 2020-05-11 15:25 ` Geert Uytterhoeven 2020-05-11 15:25 ` Geert Uytterhoeven 2020-05-11 15:25 ` Geert Uytterhoeven 2020-05-11 15:25 ` Geert Uytterhoeven 2020-05-11 15:25 ` Geert Uytterhoeven 2020-05-11 15:25 ` Geert Uytterhoeven 2020-05-11 16:35 ` Christoph Hellwig 2020-05-11 16:35 ` [OpenRISC] " Christoph Hellwig 2020-05-11 16:35 ` Christoph Hellwig 2020-05-11 16:35 ` Christoph Hellwig 2020-05-11 16:35 ` Christoph Hellwig 2020-05-11 16:35 ` Christoph Hellwig 2020-05-11 16:35 ` Christoph Hellwig
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20200510075510.987823-7-hch@lst.de \ --to=hch@lst.de \ --cc=akpm@linux-foundation.org \ --cc=arnd@arndb.de \ --cc=jeyu@kernel.org \ --cc=linux-alpha@vger.kernel.org \ --cc=linux-arch@vger.kernel.org \ --cc=linux-arm-kernel@lists.infradead.org \ --cc=linux-c6x-dev@linux-c6x.org \ --cc=linux-fsdevel@vger.kernel.org \ --cc=linux-hexagon@vger.kernel.org \ --cc=linux-ia64@vger.kernel.org \ --cc=linux-kernel@vger.kernel.org \ --cc=linux-m68k@lists.linux-m68k.org \ --cc=linux-mips@vger.kernel.org \ --cc=linux-mm@kvack.org \ --cc=linux-riscv@lists.infradead.org \ --cc=linux-sh@vger.kernel.org \ --cc=linux-um@lists.infradead.org \ --cc=linux-xtensa@linux-xtensa.org \ --cc=linuxppc-dev@lists.ozlabs.org \ --cc=monstr@monstr.eu \ --cc=openrisc@lists.librecores.org \ --cc=sparclinux@vger.kernel.org \ --cc=x86@kernel.org \ --cc=zippel@linux-m68k.org \ --subject='Re: [PATCH 06/31] unicore32: remove flush_cache_user_range' \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: link
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.