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From: Will Deacon <will@kernel.org>
To: Christoph Hellwig <hch@lst.de>,
	james.morse@arm.com, catalin.marinas@arm.com
Cc: Andrew Morton <akpm@linux-foundation.org>,
	Arnd Bergmann <arnd@arndb.de>,
	Roman Zippel <zippel@linux-m68k.org>,
	Jessica Yu <jeyu@kernel.org>, Michal Simek <monstr@monstr.eu>,
	x86@kernel.org, linux-alpha@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-c6x-dev@linux-c6x.org, linux-hexagon@vger.kernel.org,
	linux-ia64@vger.kernel.org, linux-m68k@lists.linux-m68k.org,
	linux-mips@vger.kernel.org, openrisc@lists.librecores.org,
	linuxppc-dev@lists.ozlabs.org, linux-riscv@lists.infradead.org,
	linux-sh@vger.kernel.org, sparclinux@vger.kernel.org,
	linux-arch@vger.kernel.org, linux-mm@kvack.org,
	linux-um@lists.infradead.org, linux-xtensa@linux-xtensa.org,
	linux-fsdevel@vger.kernel.org
Subject: Re: [PATCH 02/31] arm64: fix the flush_icache_range arguments in machine_kexec
Date: Mon, 11 May 2020 07:51:15 +0000	[thread overview]
Message-ID: <20200511075115.GA16134@willie-the-truck> (raw)
In-Reply-To: <20200510075510.987823-3-hch@lst.de>

[+James and Catalin]

On Sun, May 10, 2020 at 09:54:41AM +0200, Christoph Hellwig wrote:
> The second argument is the end "pointer", not the length.
> 
> Signed-off-by: Christoph Hellwig <hch@lst.de>
> ---
>  arch/arm64/kernel/machine_kexec.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm64/kernel/machine_kexec.c b/arch/arm64/kernel/machine_kexec.c
> index 8e9c924423b4e..a0b144cfaea71 100644
> --- a/arch/arm64/kernel/machine_kexec.c
> +++ b/arch/arm64/kernel/machine_kexec.c
> @@ -177,6 +177,7 @@ void machine_kexec(struct kimage *kimage)
>  	 * the offline CPUs. Therefore, we must use the __* variant here.
>  	 */
>  	__flush_icache_range((uintptr_t)reboot_code_buffer,
> +			     (uintptr_t)reboot_code_buffer +
>  			     arm64_relocate_new_kernel_size);

Urgh, well spotted. It's annoyingly different from __flush_dcache_area().

But now I'm wondering what this code actually does... the loop condition
in invalidate_icache_by_line works with 64-bit arithmetic, so we could
spend a /very/ long time here afaict. It's also a bit annoying that we
do a bunch of redundant D-cache maintenance too.

Should we use invalidate_icache_range() here instead? (and why does that
thing need to toggle uaccess)? Argh, too many questions!

Will

WARNING: multiple messages have this Message-ID (diff)
From: Will Deacon <will@kernel.org>
To: Christoph Hellwig <hch@lst.de>,
	james.morse@arm.com, catalin.marinas@arm.com
Cc: Andrew Morton <akpm@linux-foundation.org>,
	Arnd Bergmann <arnd@arndb.de>,
	Roman Zippel <zippel@linux-m68k.org>,
	Jessica Yu <jeyu@kernel.org>, Michal Simek <monstr@monstr.eu>,
	x86@kernel.org, linux-alpha@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-c6x-dev@linux-c6x.org, linux-hexagon@vger.kernel.org,
	linux-ia64@vger.kernel.org, linux-m68k@lists.linux-m68k.org,
	linux-mips@vger.kernel.org, openrisc@lists.librecores.org,
	linuxppc-dev@lists.ozlabs.org, linux-riscv@lists.infradead.org,
	linux-sh@vger.kernel.org, sparclinux@vger.kernel.org,
	linux-arch@vger.kernel.org, linux-mm@kvack.org,
	linux-um@lists.infradead.org, linux-xtensa@linux-xtensa.org,
	linux-fsdevel@vger.kernel.org
Subject: Re: [PATCH 02/31] arm64: fix the flush_icache_range arguments in machine_kexec
Date: Mon, 11 May 2020 08:51:15 +0100	[thread overview]
Message-ID: <20200511075115.GA16134@willie-the-truck> (raw)
In-Reply-To: <20200510075510.987823-3-hch@lst.de>

[+James and Catalin]

On Sun, May 10, 2020 at 09:54:41AM +0200, Christoph Hellwig wrote:
> The second argument is the end "pointer", not the length.
> 
> Signed-off-by: Christoph Hellwig <hch@lst.de>
> ---
>  arch/arm64/kernel/machine_kexec.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm64/kernel/machine_kexec.c b/arch/arm64/kernel/machine_kexec.c
> index 8e9c924423b4e..a0b144cfaea71 100644
> --- a/arch/arm64/kernel/machine_kexec.c
> +++ b/arch/arm64/kernel/machine_kexec.c
> @@ -177,6 +177,7 @@ void machine_kexec(struct kimage *kimage)
>  	 * the offline CPUs. Therefore, we must use the __* variant here.
>  	 */
>  	__flush_icache_range((uintptr_t)reboot_code_buffer,
> +			     (uintptr_t)reboot_code_buffer +
>  			     arm64_relocate_new_kernel_size);

Urgh, well spotted. It's annoyingly different from __flush_dcache_area().

But now I'm wondering what this code actually does... the loop condition
in invalidate_icache_by_line works with 64-bit arithmetic, so we could
spend a /very/ long time here afaict. It's also a bit annoying that we
do a bunch of redundant D-cache maintenance too.

Should we use invalidate_icache_range() here instead? (and why does that
thing need to toggle uaccess)? Argh, too many questions!

Will

WARNING: multiple messages have this Message-ID (diff)
From: Will Deacon <will@kernel.org>
To: Christoph Hellwig <hch@lst.de>,
	james.morse@arm.com, catalin.marinas@arm.com
Cc: linux-ia64@vger.kernel.org, linux-sh@vger.kernel.org,
	Roman Zippel <zippel@linux-m68k.org>,
	linux-mips@vger.kernel.org, linux-mm@kvack.org,
	sparclinux@vger.kernel.org, linux-riscv@lists.infradead.org,
	linux-arch@vger.kernel.org, linux-c6x-dev@linux-c6x.org,
	linux-hexagon@vger.kernel.org, x86@kernel.org,
	linux-xtensa@linux-xtensa.org, Arnd Bergmann <arnd@arndb.de>,
	Jessica Yu <jeyu@kernel.org>,
	linux-um@lists.infradead.org, linux-m68k@lists.linux-m68k.org,
	openrisc@lists.librecores.org,
	linux-arm-kernel@lists.infradead.org,
	Michal Simek <monstr@monstr.eu>,
	linux-kernel@vger.kernel.org, linux-alpha@vger.kernel.org,
	linux-fsdevel@vger.kernel.org,
	Andrew Morton <akpm@linux-foundation.org>,
	linuxppc-dev@lists.ozlabs.org
Subject: Re: [PATCH 02/31] arm64: fix the flush_icache_range arguments in machine_kexec
Date: Mon, 11 May 2020 08:51:15 +0100	[thread overview]
Message-ID: <20200511075115.GA16134@willie-the-truck> (raw)
In-Reply-To: <20200510075510.987823-3-hch@lst.de>

[+James and Catalin]

On Sun, May 10, 2020 at 09:54:41AM +0200, Christoph Hellwig wrote:
> The second argument is the end "pointer", not the length.
> 
> Signed-off-by: Christoph Hellwig <hch@lst.de>
> ---
>  arch/arm64/kernel/machine_kexec.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm64/kernel/machine_kexec.c b/arch/arm64/kernel/machine_kexec.c
> index 8e9c924423b4e..a0b144cfaea71 100644
> --- a/arch/arm64/kernel/machine_kexec.c
> +++ b/arch/arm64/kernel/machine_kexec.c
> @@ -177,6 +177,7 @@ void machine_kexec(struct kimage *kimage)
>  	 * the offline CPUs. Therefore, we must use the __* variant here.
>  	 */
>  	__flush_icache_range((uintptr_t)reboot_code_buffer,
> +			     (uintptr_t)reboot_code_buffer +
>  			     arm64_relocate_new_kernel_size);

Urgh, well spotted. It's annoyingly different from __flush_dcache_area().

But now I'm wondering what this code actually does... the loop condition
in invalidate_icache_by_line works with 64-bit arithmetic, so we could
spend a /very/ long time here afaict. It's also a bit annoying that we
do a bunch of redundant D-cache maintenance too.

Should we use invalidate_icache_range() here instead? (and why does that
thing need to toggle uaccess)? Argh, too many questions!

Will


WARNING: multiple messages have this Message-ID (diff)
From: Will Deacon <will@kernel.org>
To: Christoph Hellwig <hch@lst.de>,
	james.morse@arm.com, catalin.marinas@arm.com
Cc: linux-ia64@vger.kernel.org, linux-sh@vger.kernel.org,
	Roman Zippel <zippel@linux-m68k.org>,
	linux-mips@vger.kernel.org, linux-mm@kvack.org,
	sparclinux@vger.kernel.org, linux-riscv@lists.infradead.org,
	linux-arch@vger.kernel.org, linux-c6x-dev@linux-c6x.org,
	linux-hexagon@vger.kernel.org, x86@kernel.org,
	linux-xtensa@linux-xtensa.org, Arnd Bergmann <arnd@arndb.de>,
	Jessica Yu <jeyu@kernel.org>,
	linux-um@lists.infradead.org, linux-m68k@lists.linux-m68k.org,
	openrisc@lists.librecores.org,
	linux-arm-kernel@lists.infradead.org,
	Michal Simek <monstr@monstr.eu>,
	linux-kernel@vger.kernel.org, linux-alpha@vger.kernel.org,
	linux-fsdevel@vger.kernel.org,
	Andrew Morton <akpm@linux-foundation.org>,
	linuxppc-dev@lists.ozlabs.org
Subject: Re: [PATCH 02/31] arm64: fix the flush_icache_range arguments in machine_kexec
Date: Mon, 11 May 2020 08:51:15 +0100	[thread overview]
Message-ID: <20200511075115.GA16134@willie-the-truck> (raw)
In-Reply-To: <20200510075510.987823-3-hch@lst.de>

[+James and Catalin]

On Sun, May 10, 2020 at 09:54:41AM +0200, Christoph Hellwig wrote:
> The second argument is the end "pointer", not the length.
> 
> Signed-off-by: Christoph Hellwig <hch@lst.de>
> ---
>  arch/arm64/kernel/machine_kexec.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm64/kernel/machine_kexec.c b/arch/arm64/kernel/machine_kexec.c
> index 8e9c924423b4e..a0b144cfaea71 100644
> --- a/arch/arm64/kernel/machine_kexec.c
> +++ b/arch/arm64/kernel/machine_kexec.c
> @@ -177,6 +177,7 @@ void machine_kexec(struct kimage *kimage)
>  	 * the offline CPUs. Therefore, we must use the __* variant here.
>  	 */
>  	__flush_icache_range((uintptr_t)reboot_code_buffer,
> +			     (uintptr_t)reboot_code_buffer +
>  			     arm64_relocate_new_kernel_size);

Urgh, well spotted. It's annoyingly different from __flush_dcache_area().

But now I'm wondering what this code actually does... the loop condition
in invalidate_icache_by_line works with 64-bit arithmetic, so we could
spend a /very/ long time here afaict. It's also a bit annoying that we
do a bunch of redundant D-cache maintenance too.

Should we use invalidate_icache_range() here instead? (and why does that
thing need to toggle uaccess)? Argh, too many questions!

Will

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

WARNING: multiple messages have this Message-ID (diff)
From: Will Deacon <will@kernel.org>
To: openrisc@lists.librecores.org
Subject: [OpenRISC] [PATCH 02/31] arm64: fix the flush_icache_range arguments in machine_kexec
Date: Mon, 11 May 2020 08:51:15 +0100	[thread overview]
Message-ID: <20200511075115.GA16134@willie-the-truck> (raw)
In-Reply-To: <20200510075510.987823-3-hch@lst.de>

[+James and Catalin]

On Sun, May 10, 2020 at 09:54:41AM +0200, Christoph Hellwig wrote:
> The second argument is the end "pointer", not the length.
> 
> Signed-off-by: Christoph Hellwig <hch@lst.de>
> ---
>  arch/arm64/kernel/machine_kexec.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm64/kernel/machine_kexec.c b/arch/arm64/kernel/machine_kexec.c
> index 8e9c924423b4e..a0b144cfaea71 100644
> --- a/arch/arm64/kernel/machine_kexec.c
> +++ b/arch/arm64/kernel/machine_kexec.c
> @@ -177,6 +177,7 @@ void machine_kexec(struct kimage *kimage)
>  	 * the offline CPUs. Therefore, we must use the __* variant here.
>  	 */
>  	__flush_icache_range((uintptr_t)reboot_code_buffer,
> +			     (uintptr_t)reboot_code_buffer +
>  			     arm64_relocate_new_kernel_size);

Urgh, well spotted. It's annoyingly different from __flush_dcache_area().

But now I'm wondering what this code actually does... the loop condition
in invalidate_icache_by_line works with 64-bit arithmetic, so we could
spend a /very/ long time here afaict. It's also a bit annoying that we
do a bunch of redundant D-cache maintenance too.

Should we use invalidate_icache_range() here instead? (and why does that
thing need to toggle uaccess)? Argh, too many questions!

Will

  reply	other threads:[~2020-05-11  7:51 UTC|newest]

Thread overview: 289+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-10  7:54 sort out the flush_icache_range mess Christoph Hellwig
2020-05-10  7:54 ` [OpenRISC] " Christoph Hellwig
2020-05-10  7:54 ` Christoph Hellwig
2020-05-10  7:54 ` Christoph Hellwig
2020-05-10  7:54 ` Christoph Hellwig
2020-05-10  7:54 ` [PATCH 01/31] arm: fix the flush_icache_range arguments in set_fiq_handler Christoph Hellwig
2020-05-10  7:54   ` [OpenRISC] " Christoph Hellwig
2020-05-10  7:54   ` Christoph Hellwig
2020-05-10  7:54   ` Christoph Hellwig
2020-05-10  7:54   ` Christoph Hellwig
2020-05-10  7:54 ` [PATCH 02/31] arm64: fix the flush_icache_range arguments in machine_kexec Christoph Hellwig
2020-05-10  7:54   ` [OpenRISC] " Christoph Hellwig
2020-05-10  7:54   ` Christoph Hellwig
2020-05-10  7:54   ` Christoph Hellwig
2020-05-10  7:54   ` Christoph Hellwig
2020-05-11  7:51   ` Will Deacon [this message]
2020-05-11  7:51     ` [OpenRISC] " Will Deacon
2020-05-11  7:51     ` Will Deacon
2020-05-11  7:51     ` Will Deacon
2020-05-11  7:51     ` Will Deacon
2020-05-11 11:00     ` Catalin Marinas
2020-05-11 11:00       ` [OpenRISC] " Catalin Marinas
2020-05-11 11:00       ` Catalin Marinas
2020-05-11 11:00       ` Catalin Marinas
2020-05-11 11:00       ` Catalin Marinas
2020-05-11 15:15       ` Christoph Hellwig
2020-05-11 15:15         ` Christoph Hellwig
2020-05-11 15:15         ` [OpenRISC] " Christoph Hellwig
2020-05-11 15:15         ` Christoph Hellwig
2020-05-11 15:15         ` Christoph Hellwig
2020-05-11 15:15         ` Christoph Hellwig
2020-05-11 15:15         ` Christoph Hellwig
2020-05-10  7:54 ` [PATCH 03/31] MIPS: unexport __flush_icache_user_range Christoph Hellwig
2020-05-10  7:54   ` [OpenRISC] " Christoph Hellwig
2020-05-10  7:54   ` Christoph Hellwig
2020-05-10  7:54   ` Christoph Hellwig
2020-05-10  7:54   ` Christoph Hellwig
2020-05-11 16:01   ` Thomas Bogendoerfer
2020-05-11 16:01     ` [OpenRISC] " Thomas Bogendoerfer
2020-05-11 16:01     ` Thomas Bogendoerfer
2020-05-11 16:01     ` Thomas Bogendoerfer
2020-05-11 16:01     ` Thomas Bogendoerfer
2020-05-10  7:54 ` [PATCH 04/31] nds32: unexport flush_icache_page Christoph Hellwig
2020-05-10  7:54   ` [OpenRISC] " Christoph Hellwig
2020-05-10  7:54   ` Christoph Hellwig
2020-05-10  7:54   ` Christoph Hellwig
2020-05-10  7:54   ` Christoph Hellwig
2020-05-10  7:54 ` [PATCH 05/31] powerpc: unexport flush_icache_user_range Christoph Hellwig
2020-05-10  7:54   ` [OpenRISC] " Christoph Hellwig
2020-05-10  7:54   ` Christoph Hellwig
2020-05-10  7:54   ` Christoph Hellwig
2020-05-10  7:54   ` Christoph Hellwig
2020-05-10  7:54 ` [PATCH 06/31] unicore32: remove flush_cache_user_range Christoph Hellwig
2020-05-10  7:54   ` [OpenRISC] " Christoph Hellwig
2020-05-10  7:54   ` Christoph Hellwig
2020-05-10  7:54   ` Christoph Hellwig
2020-05-10  7:54   ` Christoph Hellwig
2020-05-10  7:54 ` [PATCH 07/31] asm-generic: fix the inclusion guards for cacheflush.h Christoph Hellwig
2020-05-10  7:54   ` [OpenRISC] " Christoph Hellwig
2020-05-10  7:54   ` Christoph Hellwig
2020-05-10  7:54   ` Christoph Hellwig
2020-05-10  7:54   ` Christoph Hellwig
2020-05-10  7:54 ` [PATCH 08/31] asm-generic: don't include <linux/mm.h> in cacheflush.h Christoph Hellwig
2020-05-10  7:54   ` [OpenRISC] " Christoph Hellwig
2020-05-10  7:54   ` Christoph Hellwig
2020-05-10  7:54   ` Christoph Hellwig
2020-05-10  7:54   ` Christoph Hellwig
2020-05-10  7:54 ` [PATCH 09/31] asm-generic: improve the flush_dcache_page stub Christoph Hellwig
2020-05-10  7:54   ` [OpenRISC] " Christoph Hellwig
2020-05-10  7:54   ` Christoph Hellwig
2020-05-10  7:54   ` Christoph Hellwig
2020-05-10  7:54   ` Christoph Hellwig
2020-05-10  7:54   ` Christoph Hellwig
2020-05-10  7:54 ` [PATCH 10/31] alpha: use asm-generic/cacheflush.h Christoph Hellwig
2020-05-10  7:54   ` [OpenRISC] " Christoph Hellwig
2020-05-10  7:54   ` Christoph Hellwig
2020-05-10  7:54   ` Christoph Hellwig
2020-05-10  7:54   ` Christoph Hellwig
2020-05-10  7:54 ` [PATCH 11/31] arm64: " Christoph Hellwig
2020-05-10  7:54   ` [OpenRISC] " Christoph Hellwig
2020-05-10  7:54   ` Christoph Hellwig
2020-05-10  7:54   ` Christoph Hellwig
2020-05-10  7:54   ` Christoph Hellwig
2020-05-10  7:54 ` [PATCH 12/31] c6x: " Christoph Hellwig
2020-05-10  7:54   ` [OpenRISC] " Christoph Hellwig
2020-05-10  7:54   ` Christoph Hellwig
2020-05-10  7:54   ` Christoph Hellwig
2020-05-10  7:54   ` Christoph Hellwig
2020-05-10  7:54 ` [PATCH 13/31] hexagon: " Christoph Hellwig
2020-05-10  7:54   ` [OpenRISC] " Christoph Hellwig
2020-05-10  7:54   ` Christoph Hellwig
2020-05-10  7:54   ` Christoph Hellwig
2020-05-10  7:54   ` Christoph Hellwig
2020-05-10  7:54 ` [PATCH 14/31] ia64: " Christoph Hellwig
2020-05-10  7:54   ` [OpenRISC] " Christoph Hellwig
2020-05-10  7:54   ` Christoph Hellwig
2020-05-10  7:54   ` Christoph Hellwig
2020-05-10  7:54   ` Christoph Hellwig
2020-05-10  7:54   ` Christoph Hellwig
2020-05-10  7:54 ` [PATCH 15/31] microblaze: " Christoph Hellwig
2020-05-10  7:54   ` [OpenRISC] " Christoph Hellwig
2020-05-10  7:54   ` Christoph Hellwig
2020-05-10  7:54   ` Christoph Hellwig
2020-05-10  7:54   ` Christoph Hellwig
2020-05-10  7:54 ` [PATCH 16/31] m68knommu: " Christoph Hellwig
2020-05-10  7:54   ` [OpenRISC] " Christoph Hellwig
2020-05-10  7:54   ` Christoph Hellwig
2020-05-10  7:54   ` Christoph Hellwig
2020-05-10  7:54   ` Christoph Hellwig
2020-05-12 14:44   ` Greg Ungerer
2020-05-12 14:44     ` [OpenRISC] " Greg Ungerer
2020-05-12 14:44     ` Greg Ungerer
2020-05-12 14:44     ` Greg Ungerer
2020-05-12 14:44     ` Greg Ungerer
2020-05-10  7:54 ` [PATCH 17/31] openrisc: " Christoph Hellwig
2020-05-10  7:54   ` [OpenRISC] " Christoph Hellwig
2020-05-10  7:54   ` Christoph Hellwig
2020-05-10  7:54   ` Christoph Hellwig
2020-05-10  7:54   ` Christoph Hellwig
2020-05-10  7:54 ` [PATCH 18/31] powerpc: " Christoph Hellwig
2020-05-10  7:54   ` [OpenRISC] " Christoph Hellwig
2020-05-10  7:54   ` Christoph Hellwig
2020-05-10  7:54   ` Christoph Hellwig
2020-05-10  7:54   ` Christoph Hellwig
2020-05-10  7:54 ` [PATCH 19/31] riscv: " Christoph Hellwig
2020-05-10  7:54   ` [OpenRISC] " Christoph Hellwig
2020-05-10  7:54   ` Christoph Hellwig
2020-05-10  7:54   ` Christoph Hellwig
2020-05-10  7:54   ` Christoph Hellwig
2020-05-12 23:00   ` Palmer Dabbelt
2020-05-12 23:00     ` [OpenRISC] " Palmer Dabbelt
2020-05-12 23:00     ` Palmer Dabbelt
2020-05-12 23:00     ` Palmer Dabbelt
2020-05-12 23:00     ` Palmer Dabbelt
2020-05-13  6:23     ` Christoph Hellwig
2020-05-13  6:23       ` [OpenRISC] " Christoph Hellwig
2020-05-13  6:23       ` Christoph Hellwig
2020-05-13  6:23       ` Christoph Hellwig
2020-05-13  6:23       ` Christoph Hellwig
2020-05-10  7:54 ` [PATCH 20/31] arm,sparc,unicore32: remove flush_icache_user_range Christoph Hellwig
2020-05-10  7:54   ` [OpenRISC] [PATCH 20/31] arm, sparc, unicore32: " Christoph Hellwig
2020-05-10  7:54   ` [PATCH 20/31] arm,sparc,unicore32: " Christoph Hellwig
2020-05-10  7:54   ` Christoph Hellwig
2020-05-10  7:54   ` Christoph Hellwig
2020-05-10  7:55 ` [PATCH 21/31] mm: rename flush_icache_user_range to flush_icache_user_page Christoph Hellwig
2020-05-10  7:55   ` [OpenRISC] " Christoph Hellwig
2020-05-10  7:55   ` Christoph Hellwig
2020-05-10  7:55   ` Christoph Hellwig
2020-05-10  7:55   ` Christoph Hellwig
2020-05-11  7:36   ` Geert Uytterhoeven
2020-05-11  7:36     ` Geert Uytterhoeven
2020-05-11  7:36     ` [OpenRISC] " Geert Uytterhoeven
2020-05-11  7:36     ` Geert Uytterhoeven
2020-05-11  7:36     ` Geert Uytterhoeven
2020-05-11  7:36     ` Geert Uytterhoeven
2020-05-11  7:36     ` Geert Uytterhoeven
2020-05-11  7:36     ` Geert Uytterhoeven
2020-05-11  7:36     ` Geert Uytterhoeven
2020-05-10  7:55 ` [PATCH 22/31] asm-generic: add a flush_icache_user_range stub Christoph Hellwig
2020-05-10  7:55   ` [OpenRISC] " Christoph Hellwig
2020-05-10  7:55   ` Christoph Hellwig
2020-05-10  7:55   ` Christoph Hellwig
2020-05-10  7:55   ` Christoph Hellwig
2020-05-10  7:55 ` [PATCH 23/31] sh: implement flush_icache_user_range Christoph Hellwig
2020-05-10  7:55   ` [OpenRISC] " Christoph Hellwig
2020-05-10  7:55   ` Christoph Hellwig
2020-05-10  7:55   ` Christoph Hellwig
2020-05-10  7:55   ` Christoph Hellwig
2020-05-10  7:55 ` [PATCH 24/31] xtensa: " Christoph Hellwig
2020-05-10  7:55   ` [OpenRISC] " Christoph Hellwig
2020-05-10  7:55   ` Christoph Hellwig
2020-05-10  7:55   ` Christoph Hellwig
2020-05-10  7:55   ` Christoph Hellwig
2020-05-10  7:55 ` [PATCH 25/31] arm: rename flush_cache_user_range to flush_icache_user_range Christoph Hellwig
2020-05-10  7:55   ` [OpenRISC] " Christoph Hellwig
2020-05-10  7:55   ` Christoph Hellwig
2020-05-10  7:55   ` Christoph Hellwig
2020-05-10  7:55   ` Christoph Hellwig
2020-05-10  7:55 ` [PATCH 26/31] m68k: implement flush_icache_user_range Christoph Hellwig
2020-05-10  7:55   ` [OpenRISC] " Christoph Hellwig
2020-05-10  7:55   ` Christoph Hellwig
2020-05-10  7:55   ` Christoph Hellwig
2020-05-10  7:55   ` Christoph Hellwig
2020-05-11  7:38   ` Geert Uytterhoeven
2020-05-11  7:38     ` Geert Uytterhoeven
2020-05-11  7:38     ` [OpenRISC] " Geert Uytterhoeven
2020-05-11  7:38     ` Geert Uytterhoeven
2020-05-11  7:38     ` Geert Uytterhoeven
2020-05-11  7:38     ` Geert Uytterhoeven
2020-05-11  7:38     ` Geert Uytterhoeven
2020-05-11  7:38     ` Geert Uytterhoeven
2020-05-11  7:38     ` Geert Uytterhoeven
2020-05-10  7:55 ` [PATCH 27/31] exec: only build read_code when needed Christoph Hellwig
2020-05-10  7:55   ` [OpenRISC] " Christoph Hellwig
2020-05-10  7:55   ` Christoph Hellwig
2020-05-10  7:55   ` Christoph Hellwig
2020-05-10  7:55   ` Christoph Hellwig
2020-05-10  7:55 ` [PATCH 28/31] exec: use flush_icache_user_range in read_code Christoph Hellwig
2020-05-10  7:55   ` [OpenRISC] " Christoph Hellwig
2020-05-10  7:55   ` Christoph Hellwig
2020-05-10  7:55   ` Christoph Hellwig
2020-05-10  7:55   ` Christoph Hellwig
2020-05-10  7:55 ` [PATCH 29/31] binfmt_flat: use flush_icache_user_range Christoph Hellwig
2020-05-10  7:55   ` [OpenRISC] " Christoph Hellwig
2020-05-10  7:55   ` Christoph Hellwig
2020-05-10  7:55   ` Christoph Hellwig
2020-05-10  7:55   ` Christoph Hellwig
2020-05-12 14:46   ` Greg Ungerer
2020-05-12 14:46     ` [OpenRISC] " Greg Ungerer
2020-05-12 14:46     ` Greg Ungerer
2020-05-12 14:46     ` Greg Ungerer
2020-05-12 14:46     ` Greg Ungerer
2020-05-10  7:55 ` [PATCH 30/31] nommu: use flush_icache_user_range in brk and mmap Christoph Hellwig
2020-05-10  7:55   ` [OpenRISC] " Christoph Hellwig
2020-05-10  7:55   ` Christoph Hellwig
2020-05-10  7:55   ` Christoph Hellwig
2020-05-10  7:55   ` Christoph Hellwig
2020-05-10  7:55 ` [PATCH 31/31] module: move the set_fs hack for flush_icache_range to m68k Christoph Hellwig
2020-05-10  7:55   ` [OpenRISC] " Christoph Hellwig
2020-05-10  7:55   ` Christoph Hellwig
2020-05-10  7:55   ` Christoph Hellwig
2020-05-10  7:55   ` Christoph Hellwig
2020-05-11  7:40   ` Geert Uytterhoeven
2020-05-11  7:40     ` Geert Uytterhoeven
2020-05-11  7:40     ` [OpenRISC] " Geert Uytterhoeven
2020-05-11  7:40     ` Geert Uytterhoeven
2020-05-11  7:40     ` Geert Uytterhoeven
2020-05-11  7:40     ` Geert Uytterhoeven
2020-05-11  7:40     ` Geert Uytterhoeven
2020-05-11  7:40     ` Geert Uytterhoeven
2020-05-11  7:40     ` Geert Uytterhoeven
2020-05-11 15:11     ` Christoph Hellwig
2020-05-11 15:11       ` [OpenRISC] " Christoph Hellwig
2020-05-11 15:11       ` Christoph Hellwig
2020-05-11 15:11       ` Christoph Hellwig
2020-05-11 15:11       ` Christoph Hellwig
2020-05-11 15:11       ` Christoph Hellwig
2020-05-11 15:11       ` Christoph Hellwig
2020-05-11 15:24       ` Geert Uytterhoeven
2020-05-11 15:24         ` Geert Uytterhoeven
2020-05-11 15:24         ` Geert Uytterhoeven
2020-05-11 15:24         ` [OpenRISC] " Geert Uytterhoeven
2020-05-11 15:24         ` Geert Uytterhoeven
2020-05-11 15:24         ` Geert Uytterhoeven
2020-05-11 15:24         ` Geert Uytterhoeven
2020-05-11 15:24         ` Geert Uytterhoeven
2020-05-11 15:24         ` Geert Uytterhoeven
2020-05-11 15:24         ` Geert Uytterhoeven
2020-05-11 16:37         ` Christoph Hellwig
2020-05-11 16:37           ` [OpenRISC] " Christoph Hellwig
2020-05-11 16:37           ` Christoph Hellwig
2020-05-11 16:37           ` Christoph Hellwig
2020-05-11 16:37           ` Christoph Hellwig
2020-05-11 16:37           ` Christoph Hellwig
2020-05-11 16:37           ` Christoph Hellwig
2020-05-11  7:46 ` sort out the flush_icache_range mess Geert Uytterhoeven
2020-05-11  7:46   ` [OpenRISC] " Geert Uytterhoeven
2020-05-11  7:46   ` Geert Uytterhoeven
2020-05-11  7:46   ` Geert Uytterhoeven
2020-05-11  7:46   ` Geert Uytterhoeven
2020-05-11  7:46   ` Geert Uytterhoeven
2020-05-11  7:46   ` Geert Uytterhoeven
2020-05-11  7:46   ` Geert Uytterhoeven
2020-05-11 15:13   ` Christoph Hellwig
2020-05-11 15:13     ` Christoph Hellwig
2020-05-11 15:13     ` [OpenRISC] " Christoph Hellwig
2020-05-11 15:13     ` Christoph Hellwig
2020-05-11 15:13     ` Christoph Hellwig
2020-05-11 15:13     ` Christoph Hellwig
2020-05-11 15:13     ` Christoph Hellwig
2020-05-11 15:13     ` Christoph Hellwig
2020-05-11 15:25     ` Geert Uytterhoeven
2020-05-11 15:25       ` Geert Uytterhoeven
2020-05-11 15:25       ` [OpenRISC] " Geert Uytterhoeven
2020-05-11 15:25       ` Geert Uytterhoeven
2020-05-11 15:25       ` Geert Uytterhoeven
2020-05-11 15:25       ` Geert Uytterhoeven
2020-05-11 15:25       ` Geert Uytterhoeven
2020-05-11 15:25       ` Geert Uytterhoeven
2020-05-11 15:25       ` Geert Uytterhoeven
2020-05-11 16:35       ` Christoph Hellwig
2020-05-11 16:35         ` Christoph Hellwig
2020-05-11 16:35         ` Christoph Hellwig
2020-05-11 16:35         ` [OpenRISC] " Christoph Hellwig
2020-05-11 16:35         ` Christoph Hellwig
2020-05-11 16:35         ` Christoph Hellwig
2020-05-11 16:35         ` Christoph Hellwig
2020-05-11 16:35         ` Christoph Hellwig
2020-05-11 16:35         ` Christoph Hellwig

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