From: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v7 0/7] Consider DBuf bandwidth when calculating CDCLK
Date: Mon, 11 May 2020 18:05:38 +0300 [thread overview]
Message-ID: <20200511150545.15149-1-stanislav.lisovskiy@intel.com> (raw)
We need to calculate cdclk after watermarks/ddb has been calculated
as with recent hw CDCLK needs to be adjusted accordingly to DBuf
requirements, which is not possible with current code organization.
Setting CDCLK according to DBuf BW requirements and not just rejecting
if it doesn't satisfy BW requirements, will allow us to save power when
it is possible and gain additional bandwidth when it's needed - i.e
boosting both our power management and perfomance capabilities.
This patch is preparation for that, first we now extract modeset
calculation from modeset checks, in order to call it after wm/ddb
has been calculated.
Stanislav Lisovskiy (7):
drm/i915: Decouple cdclk calculation from modeset checks
drm/i915: Extract cdclk requirements checking to separate function
drm/i915: Check plane configuration properly
drm/i915: Plane configuration affects CDCLK in Gen11+
drm/i915: Introduce for_each_dbuf_slice_in_mask macro
drm/i915: Adjust CDCLK accordingly to our DBuf bw needs
drm/i915: Remove unneeded hack now for CDCLK
drivers/gpu/drm/i915/display/intel_bw.c | 74 +++++++++++++++-
drivers/gpu/drm/i915/display/intel_bw.h | 9 ++
drivers/gpu/drm/i915/display/intel_cdclk.c | 21 ++---
drivers/gpu/drm/i915/display/intel_cdclk.h | 1 -
drivers/gpu/drm/i915/display/intel_display.c | 86 ++++++++++++++-----
drivers/gpu/drm/i915/display/intel_display.h | 7 ++
.../drm/i915/display/intel_display_power.h | 1 +
drivers/gpu/drm/i915/intel_pm.c | 31 ++++++-
drivers/gpu/drm/i915/intel_pm.h | 3 +
9 files changed, 197 insertions(+), 36 deletions(-)
--
2.24.1.485.gad05a3d8e5
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next reply other threads:[~2020-05-11 15:09 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-11 15:05 Stanislav Lisovskiy [this message]
2020-05-11 15:05 ` [Intel-gfx] [PATCH v7 1/7] drm/i915: Decouple cdclk calculation from modeset checks Stanislav Lisovskiy
2020-05-11 15:05 ` [Intel-gfx] [PATCH v7 2/7] drm/i915: Extract cdclk requirements checking to separate function Stanislav Lisovskiy
2020-05-11 15:05 ` [Intel-gfx] [PATCH v7 3/7] drm/i915: Check plane configuration properly Stanislav Lisovskiy
2020-05-11 15:05 ` [Intel-gfx] [PATCH v7 4/7] drm/i915: Plane configuration affects CDCLK in Gen11+ Stanislav Lisovskiy
2020-05-11 15:05 ` [Intel-gfx] [PATCH v7 5/7] drm/i915: Introduce for_each_dbuf_slice_in_mask macro Stanislav Lisovskiy
2020-05-11 15:05 ` [Intel-gfx] [PATCH v7 6/7] drm/i915: Adjust CDCLK accordingly to our DBuf bw needs Stanislav Lisovskiy
2020-05-12 9:26 ` Stanislav Lisovskiy
2020-05-11 15:05 ` [Intel-gfx] [PATCH v7 7/7] drm/i915: Remove unneeded hack now for CDCLK Stanislav Lisovskiy
2020-05-11 17:19 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Consider DBuf bandwidth when calculating CDCLK (rev10) Patchwork
2020-05-11 17:36 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2020-05-12 10:00 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Consider DBuf bandwidth when calculating CDCLK (rev11) Patchwork
2020-05-12 10:24 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2020-05-12 10:57 ` Lisovskiy, Stanislav
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