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From: Sylwester Nawrocki <s.nawrocki@samsung.com>
To: u-boot@lists.denx.de
Subject: [PATCH v3 5/9] rpi4: add a mapping for the PCIe XHCI controller MMIO registers (ARM 64bit)
Date: Tue, 12 May 2020 20:47:12 +0200	[thread overview]
Message-ID: <20200512184716.2869-6-s.nawrocki@samsung.com> (raw)
In-Reply-To: <20200512184716.2869-1-s.nawrocki@samsung.com>

From: Marek Szyprowski <m.szyprowski@samsung.com>

Create a non-cacheable mapping for the 0x600000000 physical memory region,
where MMIO registers for the PCIe XHCI controller are instantiated by the
PCIe bridge.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
---
Changes since v2:
 -  fixed typo MAX_MAP_MAX_ENTRIES -> MEM_MAP_MAX_ENTRIES
Changes since v1:
 - none.
---
 arch/arm/mach-bcm283x/init.c | 18 +++++++++++++++---
 1 file changed, 15 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-bcm283x/init.c b/arch/arm/mach-bcm283x/init.c
index 4295356..9f5bca3 100644
--- a/arch/arm/mach-bcm283x/init.c
+++ b/arch/arm/mach-bcm283x/init.c
@@ -11,10 +11,15 @@
 #include <dm/device.h>
 #include <fdt_support.h>
 
+#define BCM2711_RPI4_PCIE_XHCI_MMIO_PHYS	0x600000000UL
+#define BCM2711_RPI4_PCIE_XHCI_MMIO_SIZE	0x800000UL
+
 #ifdef CONFIG_ARM64
 #include <asm/armv8/mmu.h>
 
-static struct mm_region bcm283x_mem_map[] = {
+#define MEM_MAP_MAX_ENTRIES (4)
+
+static struct mm_region bcm283x_mem_map[MEM_MAP_MAX_ENTRIES] = {
 	{
 		.virt = 0x00000000UL,
 		.phys = 0x00000000UL,
@@ -34,7 +39,7 @@ static struct mm_region bcm283x_mem_map[] = {
 	}
 };
 
-static struct mm_region bcm2711_mem_map[] = {
+static struct mm_region bcm2711_mem_map[MEM_MAP_MAX_ENTRIES] = {
 	{
 		.virt = 0x00000000UL,
 		.phys = 0x00000000UL,
@@ -49,6 +54,13 @@ static struct mm_region bcm2711_mem_map[] = {
 			 PTE_BLOCK_NON_SHARE |
 			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
 	}, {
+		.virt = BCM2711_RPI4_PCIE_XHCI_MMIO_PHYS,
+		.phys = BCM2711_RPI4_PCIE_XHCI_MMIO_PHYS,
+		.size = BCM2711_RPI4_PCIE_XHCI_MMIO_SIZE,
+		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+			 PTE_BLOCK_NON_SHARE |
+			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
+	}, {
 		/* List terminator */
 		0,
 	}
@@ -71,7 +83,7 @@ static void _rpi_update_mem_map(struct mm_region *pd)
 {
 	int i;
 
-	for (i = 0; i < 2; i++) {
+	for (i = 0; i < MEM_MAP_MAX_ENTRIES; i++) {
 		mem_map[i].virt = pd[i].virt;
 		mem_map[i].phys = pd[i].phys;
 		mem_map[i].size = pd[i].size;
-- 
2.7.4

  parent reply	other threads:[~2020-05-12 18:47 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <CGME20200512184724eucas1p24bb9730834234cebf5061a614c2c8c54@eucas1p2.samsung.com>
2020-05-12 18:47 ` [PATCH v3 0/9] USB host support for Raspberry Pi 4 board (64-bit) Sylwester Nawrocki
     [not found]   ` <CGME20200512184740eucas1p2912f07b9e34cc769604d641adb0e13c9@eucas1p2.samsung.com>
2020-05-12 18:47     ` [PATCH v3 1/9] usb: xhci: Add missing cache flush in the scratchpad array initialization Sylwester Nawrocki
     [not found]   ` <CGME20200512184743eucas1p28e9d93ba5e46ed900a88bf0bf85fda58@eucas1p2.samsung.com>
2020-05-12 18:47     ` [PATCH v3 2/9] usb: xhci: Use only 32-bit accesses in xhci_writeq/xhci_readq Sylwester Nawrocki
     [not found]   ` <CGME20200512184747eucas1p25ed7fb872416271dd34806ccfb4197e5@eucas1p2.samsung.com>
2020-05-12 18:47     ` [PATCH v3 3/9] pci: Move some PCIe register offset definitions to a common header Sylwester Nawrocki
     [not found]   ` <CGME20200512184829eucas1p10c67592f9af7879f51eee9bff8fa76d7@eucas1p1.samsung.com>
2020-05-12 18:47     ` [PATCH v3 4/9] rpi4: shorten a mapping for the DRAM Sylwester Nawrocki
     [not found]   ` <CGME20200512184830eucas1p198b1439122e2da299c563726fe17f9ef@eucas1p1.samsung.com>
2020-05-12 18:47     ` Sylwester Nawrocki [this message]
     [not found]   ` <CGME20200512184832eucas1p1b75fca7f5ed42e3cb38f98410f51f1ad@eucas1p1.samsung.com>
2020-05-12 18:47     ` [PATCH v3 6/9] linux/bitfield.h: Add primitives for manipulating bitfields both in host- and fixed-endian Sylwester Nawrocki
     [not found]       ` <CGME20200512190442eucas1p278509fbc3a5d4bc7303797e5b8b284d6@eucas1p2.samsung.com>
2020-05-12 19:04         ` [RESEND PATCH " Sylwester Nawrocki
     [not found]   ` <CGME20200512184836eucas1p2f357a332cd99d6e287a74405d75c0985@eucas1p2.samsung.com>
2020-05-12 18:47     ` [PATCH v3 7/9] pci: Add some PCI Express capability register offset definitions Sylwester Nawrocki
     [not found]   ` <CGME20200512184838eucas1p249588f9ee76dcb5a10209fcb7de01fae@eucas1p2.samsung.com>
2020-05-12 18:47     ` [PATCH v3 8/9] pci: Add driver for Broadcom BCM2711 SoC PCIe controller Sylwester Nawrocki
     [not found]   ` <CGME20200512184842eucas1p1b2edc2128ddf134553805db77451648f@eucas1p1.samsung.com>
2020-05-12 18:47     ` [PATCH v3 9/9] configs: Enable support for the XHCI controller on RPI4 board (ARM 64-bit) Sylwester Nawrocki
2020-05-13  9:21       ` Sylwester Nawrocki
2020-05-24 18:30         ` Matthias Brugger
2020-05-25  9:25           ` Sylwester Nawrocki

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