* drivers/gpu/drm/rcar-du/rcar_du_crtc.c:515: undefined reference to `rcar_cmm_setup'
@ 2020-05-14 0:10 ` kbuild test robot
0 siblings, 0 replies; 2+ messages in thread
From: kbuild test robot @ 2020-05-14 0:10 UTC (permalink / raw)
To: Masahiro Yamada; +Cc: kbuild-all, linux-kernel
[-- Attachment #1: Type: text/plain, Size: 15805 bytes --]
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head: 24085f70a6e1b0cb647ec92623284641d8270637
commit: def2fbffe62c00c330c7f41584a356001179c59c kconfig: allow symbols implied by y to become m
date: 9 weeks ago
config: arm64-randconfig-r034-20200513 (attached as .config)
compiler: aarch64-linux-gcc (GCC) 9.3.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
git checkout def2fbffe62c00c330c7f41584a356001179c59c
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day GCC_VERSION=9.3.0 make.cross ARCH=arm64
If you fix the issue, kindly add following tag as appropriate
Reported-by: kbuild test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
aarch64-linux-ld: drivers/gpu/drm/rcar-du/rcar_du_crtc.o: in function `rcar_du_cmm_setup':
>> drivers/gpu/drm/rcar-du/rcar_du_crtc.c:515: undefined reference to `rcar_cmm_setup'
aarch64-linux-ld: drivers/gpu/drm/rcar-du/rcar_du_crtc.o: in function `rcar_du_crtc_atomic_enable':
>> drivers/gpu/drm/rcar-du/rcar_du_crtc.c:720: undefined reference to `rcar_cmm_enable'
aarch64-linux-ld: drivers/gpu/drm/rcar-du/rcar_du_crtc.o: in function `rcar_du_crtc_stop':
>> drivers/gpu/drm/rcar-du/rcar_du_crtc.c:664: undefined reference to `rcar_cmm_disable'
aarch64-linux-ld: drivers/gpu/drm/rcar-du/rcar_du_kms.o: in function `rcar_du_cmm_init':
>> drivers/gpu/drm/rcar-du/rcar_du_kms.c:678: undefined reference to `rcar_cmm_init'
vim +515 drivers/gpu/drm/rcar-du/rcar_du_crtc.c
78b6bb1d24dbf0 Jacopo Mondi 2019-10-17 502
78b6bb1d24dbf0 Jacopo Mondi 2019-10-17 503 static void rcar_du_cmm_setup(struct drm_crtc *crtc)
78b6bb1d24dbf0 Jacopo Mondi 2019-10-17 504 {
78b6bb1d24dbf0 Jacopo Mondi 2019-10-17 505 struct drm_property_blob *drm_lut = crtc->state->gamma_lut;
78b6bb1d24dbf0 Jacopo Mondi 2019-10-17 506 struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);
78b6bb1d24dbf0 Jacopo Mondi 2019-10-17 507 struct rcar_cmm_config cmm_config = {};
78b6bb1d24dbf0 Jacopo Mondi 2019-10-17 508
78b6bb1d24dbf0 Jacopo Mondi 2019-10-17 509 if (!rcrtc->cmm)
78b6bb1d24dbf0 Jacopo Mondi 2019-10-17 510 return;
78b6bb1d24dbf0 Jacopo Mondi 2019-10-17 511
78b6bb1d24dbf0 Jacopo Mondi 2019-10-17 512 if (drm_lut)
78b6bb1d24dbf0 Jacopo Mondi 2019-10-17 513 cmm_config.lut.table = (struct drm_color_lut *)drm_lut->data;
78b6bb1d24dbf0 Jacopo Mondi 2019-10-17 514
78b6bb1d24dbf0 Jacopo Mondi 2019-10-17 @515 rcar_cmm_setup(rcrtc->cmm, &cmm_config);
78b6bb1d24dbf0 Jacopo Mondi 2019-10-17 516 }
78b6bb1d24dbf0 Jacopo Mondi 2019-10-17 517
17f6b8a0270f7a Laurent Pinchart 2015-02-18 518 /* -----------------------------------------------------------------------------
17f6b8a0270f7a Laurent Pinchart 2015-02-18 519 * Start/Stop and Suspend/Resume
17f6b8a0270f7a Laurent Pinchart 2015-02-18 520 */
17f6b8a0270f7a Laurent Pinchart 2015-02-18 521
f4112469cdb6da Laurent Pinchart 2017-06-27 522 static void rcar_du_crtc_setup(struct rcar_du_crtc *rcrtc)
4bf8e1962f91ee Laurent Pinchart 2013-06-19 523 {
4bf8e1962f91ee Laurent Pinchart 2013-06-19 524 /* Set display off and background to black */
4bf8e1962f91ee Laurent Pinchart 2013-06-19 525 rcar_du_crtc_write(rcrtc, DOOR, DOOR_RGB(0, 0, 0));
4bf8e1962f91ee Laurent Pinchart 2013-06-19 526 rcar_du_crtc_write(rcrtc, BPOR, BPOR_RGB(0, 0, 0));
4bf8e1962f91ee Laurent Pinchart 2013-06-19 527
4bf8e1962f91ee Laurent Pinchart 2013-06-19 528 /* Configure display timings and output routing */
4bf8e1962f91ee Laurent Pinchart 2013-06-19 529 rcar_du_crtc_set_display_timing(rcrtc);
2fd22dba23e384 Laurent Pinchart 2013-06-17 530 rcar_du_group_set_routing(rcrtc->group);
4bf8e1962f91ee Laurent Pinchart 2013-06-19 531
52055bafa1ffcd Laurent Pinchart 2015-02-23 532 /* Start with all planes disabled. */
52055bafa1ffcd Laurent Pinchart 2015-02-23 533 rcar_du_group_write(rcrtc->group, rcrtc->index % 2 ? DS2PR : DS1PR, 0);
4bf8e1962f91ee Laurent Pinchart 2013-06-19 534
f4112469cdb6da Laurent Pinchart 2017-06-27 535 /* Enable the VSP compositor. */
b764f2f66ed48c Kieran Bingham 2019-03-15 536 if (rcar_du_has(rcrtc->dev, RCAR_DU_FEATURE_VSP1_SOURCE))
f4112469cdb6da Laurent Pinchart 2017-06-27 537 rcar_du_vsp_enable(rcrtc);
f4112469cdb6da Laurent Pinchart 2017-06-27 538
f4112469cdb6da Laurent Pinchart 2017-06-27 539 /* Turn vertical blanking interrupt reporting on. */
f4112469cdb6da Laurent Pinchart 2017-06-27 540 drm_crtc_vblank_on(&rcrtc->crtc);
f4112469cdb6da Laurent Pinchart 2017-06-27 541 }
f4112469cdb6da Laurent Pinchart 2017-06-27 542
0bb63534fdf3bc Laurent Pinchart 2017-07-14 543 static int rcar_du_crtc_get(struct rcar_du_crtc *rcrtc)
0bb63534fdf3bc Laurent Pinchart 2017-07-14 544 {
0bb63534fdf3bc Laurent Pinchart 2017-07-14 545 int ret;
0bb63534fdf3bc Laurent Pinchart 2017-07-14 546
0bb63534fdf3bc Laurent Pinchart 2017-07-14 547 /*
0bb63534fdf3bc Laurent Pinchart 2017-07-14 548 * Guard against double-get, as the function is called from both the
0bb63534fdf3bc Laurent Pinchart 2017-07-14 549 * .atomic_enable() and .atomic_begin() handlers.
0bb63534fdf3bc Laurent Pinchart 2017-07-14 550 */
0bb63534fdf3bc Laurent Pinchart 2017-07-14 551 if (rcrtc->initialized)
0bb63534fdf3bc Laurent Pinchart 2017-07-14 552 return 0;
0bb63534fdf3bc Laurent Pinchart 2017-07-14 553
0bb63534fdf3bc Laurent Pinchart 2017-07-14 554 ret = clk_prepare_enable(rcrtc->clock);
0bb63534fdf3bc Laurent Pinchart 2017-07-14 555 if (ret < 0)
0bb63534fdf3bc Laurent Pinchart 2017-07-14 556 return ret;
0bb63534fdf3bc Laurent Pinchart 2017-07-14 557
0bb63534fdf3bc Laurent Pinchart 2017-07-14 558 ret = clk_prepare_enable(rcrtc->extclock);
0bb63534fdf3bc Laurent Pinchart 2017-07-14 559 if (ret < 0)
0bb63534fdf3bc Laurent Pinchart 2017-07-14 560 goto error_clock;
0bb63534fdf3bc Laurent Pinchart 2017-07-14 561
0bb63534fdf3bc Laurent Pinchart 2017-07-14 562 ret = rcar_du_group_get(rcrtc->group);
0bb63534fdf3bc Laurent Pinchart 2017-07-14 563 if (ret < 0)
0bb63534fdf3bc Laurent Pinchart 2017-07-14 564 goto error_group;
0bb63534fdf3bc Laurent Pinchart 2017-07-14 565
0bb63534fdf3bc Laurent Pinchart 2017-07-14 566 rcar_du_crtc_setup(rcrtc);
0bb63534fdf3bc Laurent Pinchart 2017-07-14 567 rcrtc->initialized = true;
0bb63534fdf3bc Laurent Pinchart 2017-07-14 568
0bb63534fdf3bc Laurent Pinchart 2017-07-14 569 return 0;
0bb63534fdf3bc Laurent Pinchart 2017-07-14 570
0bb63534fdf3bc Laurent Pinchart 2017-07-14 571 error_group:
0bb63534fdf3bc Laurent Pinchart 2017-07-14 572 clk_disable_unprepare(rcrtc->extclock);
0bb63534fdf3bc Laurent Pinchart 2017-07-14 573 error_clock:
0bb63534fdf3bc Laurent Pinchart 2017-07-14 574 clk_disable_unprepare(rcrtc->clock);
0bb63534fdf3bc Laurent Pinchart 2017-07-14 575 return ret;
0bb63534fdf3bc Laurent Pinchart 2017-07-14 576 }
0bb63534fdf3bc Laurent Pinchart 2017-07-14 577
0bb63534fdf3bc Laurent Pinchart 2017-07-14 578 static void rcar_du_crtc_put(struct rcar_du_crtc *rcrtc)
0bb63534fdf3bc Laurent Pinchart 2017-07-14 579 {
0bb63534fdf3bc Laurent Pinchart 2017-07-14 580 rcar_du_group_put(rcrtc->group);
0bb63534fdf3bc Laurent Pinchart 2017-07-14 581
0bb63534fdf3bc Laurent Pinchart 2017-07-14 582 clk_disable_unprepare(rcrtc->extclock);
0bb63534fdf3bc Laurent Pinchart 2017-07-14 583 clk_disable_unprepare(rcrtc->clock);
0bb63534fdf3bc Laurent Pinchart 2017-07-14 584
0bb63534fdf3bc Laurent Pinchart 2017-07-14 585 rcrtc->initialized = false;
0bb63534fdf3bc Laurent Pinchart 2017-07-14 586 }
0bb63534fdf3bc Laurent Pinchart 2017-07-14 587
f4112469cdb6da Laurent Pinchart 2017-06-27 588 static void rcar_du_crtc_start(struct rcar_du_crtc *rcrtc)
f4112469cdb6da Laurent Pinchart 2017-06-27 589 {
f4112469cdb6da Laurent Pinchart 2017-06-27 590 bool interlaced;
f4112469cdb6da Laurent Pinchart 2017-06-27 591
f3bafc123ba867 Laurent Pinchart 2017-07-11 592 /*
f3bafc123ba867 Laurent Pinchart 2017-07-11 593 * Select master sync mode. This enables display operation in master
4bf8e1962f91ee Laurent Pinchart 2013-06-19 594 * sync mode (with the HSYNC and VSYNC signals configured as outputs and
4bf8e1962f91ee Laurent Pinchart 2013-06-19 595 * actively driven).
4bf8e1962f91ee Laurent Pinchart 2013-06-19 596 */
906eff7fcada41 Laurent Pinchart 2014-12-09 597 interlaced = rcrtc->crtc.mode.flags & DRM_MODE_FLAG_INTERLACE;
9144adc5e5a995 Laurent Pinchart 2018-08-22 598 rcar_du_crtc_dsysr_clr_set(rcrtc, DSYSR_TVM_MASK | DSYSR_SCM_MASK,
906eff7fcada41 Laurent Pinchart 2014-12-09 599 (interlaced ? DSYSR_SCM_INT_VIDEO : 0) |
906eff7fcada41 Laurent Pinchart 2014-12-09 600 DSYSR_TVM_MASTER);
4bf8e1962f91ee Laurent Pinchart 2013-06-19 601
cb2025d2509ffa Laurent Pinchart 2013-06-16 602 rcar_du_group_start_stop(rcrtc->group, true);
4bf8e1962f91ee Laurent Pinchart 2013-06-19 603 }
4bf8e1962f91ee Laurent Pinchart 2013-06-19 604
641307df71fe77 Laurent Pinchart 2017-07-29 605 static void rcar_du_crtc_disable_planes(struct rcar_du_crtc *rcrtc)
641307df71fe77 Laurent Pinchart 2017-07-29 606 {
b764f2f66ed48c Kieran Bingham 2019-03-15 607 struct rcar_du_device *rcdu = rcrtc->dev;
641307df71fe77 Laurent Pinchart 2017-07-29 608 struct drm_crtc *crtc = &rcrtc->crtc;
641307df71fe77 Laurent Pinchart 2017-07-29 609 u32 status;
641307df71fe77 Laurent Pinchart 2017-07-29 610
641307df71fe77 Laurent Pinchart 2017-07-29 611 /* Make sure vblank interrupts are enabled. */
641307df71fe77 Laurent Pinchart 2017-07-29 612 drm_crtc_vblank_get(crtc);
641307df71fe77 Laurent Pinchart 2017-07-29 613
641307df71fe77 Laurent Pinchart 2017-07-29 614 /*
641307df71fe77 Laurent Pinchart 2017-07-29 615 * Disable planes and calculate how many vertical blanking interrupts we
641307df71fe77 Laurent Pinchart 2017-07-29 616 * have to wait for. If a vertical blanking interrupt has been triggered
641307df71fe77 Laurent Pinchart 2017-07-29 617 * but not processed yet, we don't know whether it occurred before or
641307df71fe77 Laurent Pinchart 2017-07-29 618 * after the planes got disabled. We thus have to wait for two vblank
641307df71fe77 Laurent Pinchart 2017-07-29 619 * interrupts in that case.
641307df71fe77 Laurent Pinchart 2017-07-29 620 */
641307df71fe77 Laurent Pinchart 2017-07-29 621 spin_lock_irq(&rcrtc->vblank_lock);
641307df71fe77 Laurent Pinchart 2017-07-29 622 rcar_du_group_write(rcrtc->group, rcrtc->index % 2 ? DS2PR : DS1PR, 0);
641307df71fe77 Laurent Pinchart 2017-07-29 623 status = rcar_du_crtc_read(rcrtc, DSSR);
641307df71fe77 Laurent Pinchart 2017-07-29 624 rcrtc->vblank_count = status & DSSR_VBK ? 2 : 1;
641307df71fe77 Laurent Pinchart 2017-07-29 625 spin_unlock_irq(&rcrtc->vblank_lock);
641307df71fe77 Laurent Pinchart 2017-07-29 626
641307df71fe77 Laurent Pinchart 2017-07-29 627 if (!wait_event_timeout(rcrtc->vblank_wait, rcrtc->vblank_count == 0,
641307df71fe77 Laurent Pinchart 2017-07-29 628 msecs_to_jiffies(100)))
641307df71fe77 Laurent Pinchart 2017-07-29 629 dev_warn(rcdu->dev, "vertical blanking timeout\n");
641307df71fe77 Laurent Pinchart 2017-07-29 630
641307df71fe77 Laurent Pinchart 2017-07-29 631 drm_crtc_vblank_put(crtc);
641307df71fe77 Laurent Pinchart 2017-07-29 632 }
641307df71fe77 Laurent Pinchart 2017-07-29 633
4bf8e1962f91ee Laurent Pinchart 2013-06-19 634 static void rcar_du_crtc_stop(struct rcar_du_crtc *rcrtc)
4bf8e1962f91ee Laurent Pinchart 2013-06-19 635 {
4bf8e1962f91ee Laurent Pinchart 2013-06-19 636 struct drm_crtc *crtc = &rcrtc->crtc;
4bf8e1962f91ee Laurent Pinchart 2013-06-19 637
f3bafc123ba867 Laurent Pinchart 2017-07-11 638 /*
f3bafc123ba867 Laurent Pinchart 2017-07-11 639 * Disable all planes and wait for the change to take effect. This is
641307df71fe77 Laurent Pinchart 2017-07-29 640 * required as the plane enable registers are updated on vblank, and no
641307df71fe77 Laurent Pinchart 2017-07-29 641 * vblank will occur once the CRTC is stopped. Disabling planes when
641307df71fe77 Laurent Pinchart 2017-07-29 642 * starting the CRTC thus wouldn't be enough as it would start scanning
641307df71fe77 Laurent Pinchart 2017-07-29 643 * out immediately from old frame buffers until the next vblank.
911316fe2f4113 Laurent Pinchart 2015-05-14 644 *
911316fe2f4113 Laurent Pinchart 2015-05-14 645 * This increases the CRTC stop delay, especially when multiple CRTCs
911316fe2f4113 Laurent Pinchart 2015-05-14 646 * are stopped in one operation as we now wait for one vblank per CRTC.
911316fe2f4113 Laurent Pinchart 2015-05-14 647 * Whether this can be improved needs to be researched.
911316fe2f4113 Laurent Pinchart 2015-05-14 648 */
641307df71fe77 Laurent Pinchart 2017-07-29 649 rcar_du_crtc_disable_planes(rcrtc);
911316fe2f4113 Laurent Pinchart 2015-05-14 650
f3bafc123ba867 Laurent Pinchart 2017-07-11 651 /*
f3bafc123ba867 Laurent Pinchart 2017-07-11 652 * Disable vertical blanking interrupt reporting. We first need to wait
0cd90a542885a1 Laurent Pinchart 2015-02-18 653 * for page flip completion before stopping the CRTC as userspace
0cd90a542885a1 Laurent Pinchart 2015-02-18 654 * expects page flips to eventually complete.
36693f3c3254d9 Laurent Pinchart 2015-02-18 655 */
36693f3c3254d9 Laurent Pinchart 2015-02-18 656 rcar_du_crtc_wait_page_flip(rcrtc);
0cd90a542885a1 Laurent Pinchart 2015-02-18 657 drm_crtc_vblank_off(crtc);
36693f3c3254d9 Laurent Pinchart 2015-02-18 658
6d62ef3ac30be7 Laurent Pinchart 2015-09-07 659 /* Disable the VSP compositor. */
b764f2f66ed48c Kieran Bingham 2019-03-15 660 if (rcar_du_has(rcrtc->dev, RCAR_DU_FEATURE_VSP1_SOURCE))
6d62ef3ac30be7 Laurent Pinchart 2015-09-07 661 rcar_du_vsp_disable(rcrtc);
6d62ef3ac30be7 Laurent Pinchart 2015-09-07 662
78b6bb1d24dbf0 Jacopo Mondi 2019-10-17 663 if (rcrtc->cmm)
78b6bb1d24dbf0 Jacopo Mondi 2019-10-17 @664 rcar_cmm_disable(rcrtc->cmm);
78b6bb1d24dbf0 Jacopo Mondi 2019-10-17 665
f3bafc123ba867 Laurent Pinchart 2017-07-11 666 /*
f3bafc123ba867 Laurent Pinchart 2017-07-11 667 * Select switch sync mode. This stops display operation and configures
4bf8e1962f91ee Laurent Pinchart 2013-06-19 668 * the HSYNC and VSYNC signals as inputs.
ffd15c3e7898cf Laurent Pinchart 2018-08-22 669 *
ffd15c3e7898cf Laurent Pinchart 2018-08-22 670 * TODO: Find another way to stop the display for DUs that don't support
ffd15c3e7898cf Laurent Pinchart 2018-08-22 671 * TVM sync.
4bf8e1962f91ee Laurent Pinchart 2013-06-19 672 */
b764f2f66ed48c Kieran Bingham 2019-03-15 673 if (rcar_du_has(rcrtc->dev, RCAR_DU_FEATURE_TVM_SYNC))
ffd15c3e7898cf Laurent Pinchart 2018-08-22 674 rcar_du_crtc_dsysr_clr_set(rcrtc, DSYSR_TVM_MASK,
ffd15c3e7898cf Laurent Pinchart 2018-08-22 675 DSYSR_TVM_SWITCH);
4bf8e1962f91ee Laurent Pinchart 2013-06-19 676
cb2025d2509ffa Laurent Pinchart 2013-06-16 677 rcar_du_group_start_stop(rcrtc->group, false);
4bf8e1962f91ee Laurent Pinchart 2013-06-19 678 }
4bf8e1962f91ee Laurent Pinchart 2013-06-19 679
:::::: The code at line 515 was first introduced by commit
:::::: 78b6bb1d24dbf094a4743bae1ee7c020e8193f25 drm: rcar-du: crtc: Control CMM operations
:::::: TO: Jacopo Mondi <jacopo+renesas@jmondi.org>
:::::: CC: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 39620 bytes --]
^ permalink raw reply [flat|nested] 2+ messages in thread
* drivers/gpu/drm/rcar-du/rcar_du_crtc.c:515: undefined reference to `rcar_cmm_setup'
@ 2020-05-14 0:10 ` kbuild test robot
0 siblings, 0 replies; 2+ messages in thread
From: kbuild test robot @ 2020-05-14 0:10 UTC (permalink / raw)
To: kbuild-all
[-- Attachment #1: Type: text/plain, Size: 16024 bytes --]
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head: 24085f70a6e1b0cb647ec92623284641d8270637
commit: def2fbffe62c00c330c7f41584a356001179c59c kconfig: allow symbols implied by y to become m
date: 9 weeks ago
config: arm64-randconfig-r034-20200513 (attached as .config)
compiler: aarch64-linux-gcc (GCC) 9.3.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
git checkout def2fbffe62c00c330c7f41584a356001179c59c
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day GCC_VERSION=9.3.0 make.cross ARCH=arm64
If you fix the issue, kindly add following tag as appropriate
Reported-by: kbuild test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
aarch64-linux-ld: drivers/gpu/drm/rcar-du/rcar_du_crtc.o: in function `rcar_du_cmm_setup':
>> drivers/gpu/drm/rcar-du/rcar_du_crtc.c:515: undefined reference to `rcar_cmm_setup'
aarch64-linux-ld: drivers/gpu/drm/rcar-du/rcar_du_crtc.o: in function `rcar_du_crtc_atomic_enable':
>> drivers/gpu/drm/rcar-du/rcar_du_crtc.c:720: undefined reference to `rcar_cmm_enable'
aarch64-linux-ld: drivers/gpu/drm/rcar-du/rcar_du_crtc.o: in function `rcar_du_crtc_stop':
>> drivers/gpu/drm/rcar-du/rcar_du_crtc.c:664: undefined reference to `rcar_cmm_disable'
aarch64-linux-ld: drivers/gpu/drm/rcar-du/rcar_du_kms.o: in function `rcar_du_cmm_init':
>> drivers/gpu/drm/rcar-du/rcar_du_kms.c:678: undefined reference to `rcar_cmm_init'
vim +515 drivers/gpu/drm/rcar-du/rcar_du_crtc.c
78b6bb1d24dbf0 Jacopo Mondi 2019-10-17 502
78b6bb1d24dbf0 Jacopo Mondi 2019-10-17 503 static void rcar_du_cmm_setup(struct drm_crtc *crtc)
78b6bb1d24dbf0 Jacopo Mondi 2019-10-17 504 {
78b6bb1d24dbf0 Jacopo Mondi 2019-10-17 505 struct drm_property_blob *drm_lut = crtc->state->gamma_lut;
78b6bb1d24dbf0 Jacopo Mondi 2019-10-17 506 struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);
78b6bb1d24dbf0 Jacopo Mondi 2019-10-17 507 struct rcar_cmm_config cmm_config = {};
78b6bb1d24dbf0 Jacopo Mondi 2019-10-17 508
78b6bb1d24dbf0 Jacopo Mondi 2019-10-17 509 if (!rcrtc->cmm)
78b6bb1d24dbf0 Jacopo Mondi 2019-10-17 510 return;
78b6bb1d24dbf0 Jacopo Mondi 2019-10-17 511
78b6bb1d24dbf0 Jacopo Mondi 2019-10-17 512 if (drm_lut)
78b6bb1d24dbf0 Jacopo Mondi 2019-10-17 513 cmm_config.lut.table = (struct drm_color_lut *)drm_lut->data;
78b6bb1d24dbf0 Jacopo Mondi 2019-10-17 514
78b6bb1d24dbf0 Jacopo Mondi 2019-10-17 @515 rcar_cmm_setup(rcrtc->cmm, &cmm_config);
78b6bb1d24dbf0 Jacopo Mondi 2019-10-17 516 }
78b6bb1d24dbf0 Jacopo Mondi 2019-10-17 517
17f6b8a0270f7a Laurent Pinchart 2015-02-18 518 /* -----------------------------------------------------------------------------
17f6b8a0270f7a Laurent Pinchart 2015-02-18 519 * Start/Stop and Suspend/Resume
17f6b8a0270f7a Laurent Pinchart 2015-02-18 520 */
17f6b8a0270f7a Laurent Pinchart 2015-02-18 521
f4112469cdb6da Laurent Pinchart 2017-06-27 522 static void rcar_du_crtc_setup(struct rcar_du_crtc *rcrtc)
4bf8e1962f91ee Laurent Pinchart 2013-06-19 523 {
4bf8e1962f91ee Laurent Pinchart 2013-06-19 524 /* Set display off and background to black */
4bf8e1962f91ee Laurent Pinchart 2013-06-19 525 rcar_du_crtc_write(rcrtc, DOOR, DOOR_RGB(0, 0, 0));
4bf8e1962f91ee Laurent Pinchart 2013-06-19 526 rcar_du_crtc_write(rcrtc, BPOR, BPOR_RGB(0, 0, 0));
4bf8e1962f91ee Laurent Pinchart 2013-06-19 527
4bf8e1962f91ee Laurent Pinchart 2013-06-19 528 /* Configure display timings and output routing */
4bf8e1962f91ee Laurent Pinchart 2013-06-19 529 rcar_du_crtc_set_display_timing(rcrtc);
2fd22dba23e384 Laurent Pinchart 2013-06-17 530 rcar_du_group_set_routing(rcrtc->group);
4bf8e1962f91ee Laurent Pinchart 2013-06-19 531
52055bafa1ffcd Laurent Pinchart 2015-02-23 532 /* Start with all planes disabled. */
52055bafa1ffcd Laurent Pinchart 2015-02-23 533 rcar_du_group_write(rcrtc->group, rcrtc->index % 2 ? DS2PR : DS1PR, 0);
4bf8e1962f91ee Laurent Pinchart 2013-06-19 534
f4112469cdb6da Laurent Pinchart 2017-06-27 535 /* Enable the VSP compositor. */
b764f2f66ed48c Kieran Bingham 2019-03-15 536 if (rcar_du_has(rcrtc->dev, RCAR_DU_FEATURE_VSP1_SOURCE))
f4112469cdb6da Laurent Pinchart 2017-06-27 537 rcar_du_vsp_enable(rcrtc);
f4112469cdb6da Laurent Pinchart 2017-06-27 538
f4112469cdb6da Laurent Pinchart 2017-06-27 539 /* Turn vertical blanking interrupt reporting on. */
f4112469cdb6da Laurent Pinchart 2017-06-27 540 drm_crtc_vblank_on(&rcrtc->crtc);
f4112469cdb6da Laurent Pinchart 2017-06-27 541 }
f4112469cdb6da Laurent Pinchart 2017-06-27 542
0bb63534fdf3bc Laurent Pinchart 2017-07-14 543 static int rcar_du_crtc_get(struct rcar_du_crtc *rcrtc)
0bb63534fdf3bc Laurent Pinchart 2017-07-14 544 {
0bb63534fdf3bc Laurent Pinchart 2017-07-14 545 int ret;
0bb63534fdf3bc Laurent Pinchart 2017-07-14 546
0bb63534fdf3bc Laurent Pinchart 2017-07-14 547 /*
0bb63534fdf3bc Laurent Pinchart 2017-07-14 548 * Guard against double-get, as the function is called from both the
0bb63534fdf3bc Laurent Pinchart 2017-07-14 549 * .atomic_enable() and .atomic_begin() handlers.
0bb63534fdf3bc Laurent Pinchart 2017-07-14 550 */
0bb63534fdf3bc Laurent Pinchart 2017-07-14 551 if (rcrtc->initialized)
0bb63534fdf3bc Laurent Pinchart 2017-07-14 552 return 0;
0bb63534fdf3bc Laurent Pinchart 2017-07-14 553
0bb63534fdf3bc Laurent Pinchart 2017-07-14 554 ret = clk_prepare_enable(rcrtc->clock);
0bb63534fdf3bc Laurent Pinchart 2017-07-14 555 if (ret < 0)
0bb63534fdf3bc Laurent Pinchart 2017-07-14 556 return ret;
0bb63534fdf3bc Laurent Pinchart 2017-07-14 557
0bb63534fdf3bc Laurent Pinchart 2017-07-14 558 ret = clk_prepare_enable(rcrtc->extclock);
0bb63534fdf3bc Laurent Pinchart 2017-07-14 559 if (ret < 0)
0bb63534fdf3bc Laurent Pinchart 2017-07-14 560 goto error_clock;
0bb63534fdf3bc Laurent Pinchart 2017-07-14 561
0bb63534fdf3bc Laurent Pinchart 2017-07-14 562 ret = rcar_du_group_get(rcrtc->group);
0bb63534fdf3bc Laurent Pinchart 2017-07-14 563 if (ret < 0)
0bb63534fdf3bc Laurent Pinchart 2017-07-14 564 goto error_group;
0bb63534fdf3bc Laurent Pinchart 2017-07-14 565
0bb63534fdf3bc Laurent Pinchart 2017-07-14 566 rcar_du_crtc_setup(rcrtc);
0bb63534fdf3bc Laurent Pinchart 2017-07-14 567 rcrtc->initialized = true;
0bb63534fdf3bc Laurent Pinchart 2017-07-14 568
0bb63534fdf3bc Laurent Pinchart 2017-07-14 569 return 0;
0bb63534fdf3bc Laurent Pinchart 2017-07-14 570
0bb63534fdf3bc Laurent Pinchart 2017-07-14 571 error_group:
0bb63534fdf3bc Laurent Pinchart 2017-07-14 572 clk_disable_unprepare(rcrtc->extclock);
0bb63534fdf3bc Laurent Pinchart 2017-07-14 573 error_clock:
0bb63534fdf3bc Laurent Pinchart 2017-07-14 574 clk_disable_unprepare(rcrtc->clock);
0bb63534fdf3bc Laurent Pinchart 2017-07-14 575 return ret;
0bb63534fdf3bc Laurent Pinchart 2017-07-14 576 }
0bb63534fdf3bc Laurent Pinchart 2017-07-14 577
0bb63534fdf3bc Laurent Pinchart 2017-07-14 578 static void rcar_du_crtc_put(struct rcar_du_crtc *rcrtc)
0bb63534fdf3bc Laurent Pinchart 2017-07-14 579 {
0bb63534fdf3bc Laurent Pinchart 2017-07-14 580 rcar_du_group_put(rcrtc->group);
0bb63534fdf3bc Laurent Pinchart 2017-07-14 581
0bb63534fdf3bc Laurent Pinchart 2017-07-14 582 clk_disable_unprepare(rcrtc->extclock);
0bb63534fdf3bc Laurent Pinchart 2017-07-14 583 clk_disable_unprepare(rcrtc->clock);
0bb63534fdf3bc Laurent Pinchart 2017-07-14 584
0bb63534fdf3bc Laurent Pinchart 2017-07-14 585 rcrtc->initialized = false;
0bb63534fdf3bc Laurent Pinchart 2017-07-14 586 }
0bb63534fdf3bc Laurent Pinchart 2017-07-14 587
f4112469cdb6da Laurent Pinchart 2017-06-27 588 static void rcar_du_crtc_start(struct rcar_du_crtc *rcrtc)
f4112469cdb6da Laurent Pinchart 2017-06-27 589 {
f4112469cdb6da Laurent Pinchart 2017-06-27 590 bool interlaced;
f4112469cdb6da Laurent Pinchart 2017-06-27 591
f3bafc123ba867 Laurent Pinchart 2017-07-11 592 /*
f3bafc123ba867 Laurent Pinchart 2017-07-11 593 * Select master sync mode. This enables display operation in master
4bf8e1962f91ee Laurent Pinchart 2013-06-19 594 * sync mode (with the HSYNC and VSYNC signals configured as outputs and
4bf8e1962f91ee Laurent Pinchart 2013-06-19 595 * actively driven).
4bf8e1962f91ee Laurent Pinchart 2013-06-19 596 */
906eff7fcada41 Laurent Pinchart 2014-12-09 597 interlaced = rcrtc->crtc.mode.flags & DRM_MODE_FLAG_INTERLACE;
9144adc5e5a995 Laurent Pinchart 2018-08-22 598 rcar_du_crtc_dsysr_clr_set(rcrtc, DSYSR_TVM_MASK | DSYSR_SCM_MASK,
906eff7fcada41 Laurent Pinchart 2014-12-09 599 (interlaced ? DSYSR_SCM_INT_VIDEO : 0) |
906eff7fcada41 Laurent Pinchart 2014-12-09 600 DSYSR_TVM_MASTER);
4bf8e1962f91ee Laurent Pinchart 2013-06-19 601
cb2025d2509ffa Laurent Pinchart 2013-06-16 602 rcar_du_group_start_stop(rcrtc->group, true);
4bf8e1962f91ee Laurent Pinchart 2013-06-19 603 }
4bf8e1962f91ee Laurent Pinchart 2013-06-19 604
641307df71fe77 Laurent Pinchart 2017-07-29 605 static void rcar_du_crtc_disable_planes(struct rcar_du_crtc *rcrtc)
641307df71fe77 Laurent Pinchart 2017-07-29 606 {
b764f2f66ed48c Kieran Bingham 2019-03-15 607 struct rcar_du_device *rcdu = rcrtc->dev;
641307df71fe77 Laurent Pinchart 2017-07-29 608 struct drm_crtc *crtc = &rcrtc->crtc;
641307df71fe77 Laurent Pinchart 2017-07-29 609 u32 status;
641307df71fe77 Laurent Pinchart 2017-07-29 610
641307df71fe77 Laurent Pinchart 2017-07-29 611 /* Make sure vblank interrupts are enabled. */
641307df71fe77 Laurent Pinchart 2017-07-29 612 drm_crtc_vblank_get(crtc);
641307df71fe77 Laurent Pinchart 2017-07-29 613
641307df71fe77 Laurent Pinchart 2017-07-29 614 /*
641307df71fe77 Laurent Pinchart 2017-07-29 615 * Disable planes and calculate how many vertical blanking interrupts we
641307df71fe77 Laurent Pinchart 2017-07-29 616 * have to wait for. If a vertical blanking interrupt has been triggered
641307df71fe77 Laurent Pinchart 2017-07-29 617 * but not processed yet, we don't know whether it occurred before or
641307df71fe77 Laurent Pinchart 2017-07-29 618 * after the planes got disabled. We thus have to wait for two vblank
641307df71fe77 Laurent Pinchart 2017-07-29 619 * interrupts in that case.
641307df71fe77 Laurent Pinchart 2017-07-29 620 */
641307df71fe77 Laurent Pinchart 2017-07-29 621 spin_lock_irq(&rcrtc->vblank_lock);
641307df71fe77 Laurent Pinchart 2017-07-29 622 rcar_du_group_write(rcrtc->group, rcrtc->index % 2 ? DS2PR : DS1PR, 0);
641307df71fe77 Laurent Pinchart 2017-07-29 623 status = rcar_du_crtc_read(rcrtc, DSSR);
641307df71fe77 Laurent Pinchart 2017-07-29 624 rcrtc->vblank_count = status & DSSR_VBK ? 2 : 1;
641307df71fe77 Laurent Pinchart 2017-07-29 625 spin_unlock_irq(&rcrtc->vblank_lock);
641307df71fe77 Laurent Pinchart 2017-07-29 626
641307df71fe77 Laurent Pinchart 2017-07-29 627 if (!wait_event_timeout(rcrtc->vblank_wait, rcrtc->vblank_count == 0,
641307df71fe77 Laurent Pinchart 2017-07-29 628 msecs_to_jiffies(100)))
641307df71fe77 Laurent Pinchart 2017-07-29 629 dev_warn(rcdu->dev, "vertical blanking timeout\n");
641307df71fe77 Laurent Pinchart 2017-07-29 630
641307df71fe77 Laurent Pinchart 2017-07-29 631 drm_crtc_vblank_put(crtc);
641307df71fe77 Laurent Pinchart 2017-07-29 632 }
641307df71fe77 Laurent Pinchart 2017-07-29 633
4bf8e1962f91ee Laurent Pinchart 2013-06-19 634 static void rcar_du_crtc_stop(struct rcar_du_crtc *rcrtc)
4bf8e1962f91ee Laurent Pinchart 2013-06-19 635 {
4bf8e1962f91ee Laurent Pinchart 2013-06-19 636 struct drm_crtc *crtc = &rcrtc->crtc;
4bf8e1962f91ee Laurent Pinchart 2013-06-19 637
f3bafc123ba867 Laurent Pinchart 2017-07-11 638 /*
f3bafc123ba867 Laurent Pinchart 2017-07-11 639 * Disable all planes and wait for the change to take effect. This is
641307df71fe77 Laurent Pinchart 2017-07-29 640 * required as the plane enable registers are updated on vblank, and no
641307df71fe77 Laurent Pinchart 2017-07-29 641 * vblank will occur once the CRTC is stopped. Disabling planes when
641307df71fe77 Laurent Pinchart 2017-07-29 642 * starting the CRTC thus wouldn't be enough as it would start scanning
641307df71fe77 Laurent Pinchart 2017-07-29 643 * out immediately from old frame buffers until the next vblank.
911316fe2f4113 Laurent Pinchart 2015-05-14 644 *
911316fe2f4113 Laurent Pinchart 2015-05-14 645 * This increases the CRTC stop delay, especially when multiple CRTCs
911316fe2f4113 Laurent Pinchart 2015-05-14 646 * are stopped in one operation as we now wait for one vblank per CRTC.
911316fe2f4113 Laurent Pinchart 2015-05-14 647 * Whether this can be improved needs to be researched.
911316fe2f4113 Laurent Pinchart 2015-05-14 648 */
641307df71fe77 Laurent Pinchart 2017-07-29 649 rcar_du_crtc_disable_planes(rcrtc);
911316fe2f4113 Laurent Pinchart 2015-05-14 650
f3bafc123ba867 Laurent Pinchart 2017-07-11 651 /*
f3bafc123ba867 Laurent Pinchart 2017-07-11 652 * Disable vertical blanking interrupt reporting. We first need to wait
0cd90a542885a1 Laurent Pinchart 2015-02-18 653 * for page flip completion before stopping the CRTC as userspace
0cd90a542885a1 Laurent Pinchart 2015-02-18 654 * expects page flips to eventually complete.
36693f3c3254d9 Laurent Pinchart 2015-02-18 655 */
36693f3c3254d9 Laurent Pinchart 2015-02-18 656 rcar_du_crtc_wait_page_flip(rcrtc);
0cd90a542885a1 Laurent Pinchart 2015-02-18 657 drm_crtc_vblank_off(crtc);
36693f3c3254d9 Laurent Pinchart 2015-02-18 658
6d62ef3ac30be7 Laurent Pinchart 2015-09-07 659 /* Disable the VSP compositor. */
b764f2f66ed48c Kieran Bingham 2019-03-15 660 if (rcar_du_has(rcrtc->dev, RCAR_DU_FEATURE_VSP1_SOURCE))
6d62ef3ac30be7 Laurent Pinchart 2015-09-07 661 rcar_du_vsp_disable(rcrtc);
6d62ef3ac30be7 Laurent Pinchart 2015-09-07 662
78b6bb1d24dbf0 Jacopo Mondi 2019-10-17 663 if (rcrtc->cmm)
78b6bb1d24dbf0 Jacopo Mondi 2019-10-17 @664 rcar_cmm_disable(rcrtc->cmm);
78b6bb1d24dbf0 Jacopo Mondi 2019-10-17 665
f3bafc123ba867 Laurent Pinchart 2017-07-11 666 /*
f3bafc123ba867 Laurent Pinchart 2017-07-11 667 * Select switch sync mode. This stops display operation and configures
4bf8e1962f91ee Laurent Pinchart 2013-06-19 668 * the HSYNC and VSYNC signals as inputs.
ffd15c3e7898cf Laurent Pinchart 2018-08-22 669 *
ffd15c3e7898cf Laurent Pinchart 2018-08-22 670 * TODO: Find another way to stop the display for DUs that don't support
ffd15c3e7898cf Laurent Pinchart 2018-08-22 671 * TVM sync.
4bf8e1962f91ee Laurent Pinchart 2013-06-19 672 */
b764f2f66ed48c Kieran Bingham 2019-03-15 673 if (rcar_du_has(rcrtc->dev, RCAR_DU_FEATURE_TVM_SYNC))
ffd15c3e7898cf Laurent Pinchart 2018-08-22 674 rcar_du_crtc_dsysr_clr_set(rcrtc, DSYSR_TVM_MASK,
ffd15c3e7898cf Laurent Pinchart 2018-08-22 675 DSYSR_TVM_SWITCH);
4bf8e1962f91ee Laurent Pinchart 2013-06-19 676
cb2025d2509ffa Laurent Pinchart 2013-06-16 677 rcar_du_group_start_stop(rcrtc->group, false);
4bf8e1962f91ee Laurent Pinchart 2013-06-19 678 }
4bf8e1962f91ee Laurent Pinchart 2013-06-19 679
:::::: The code at line 515 was first introduced by commit
:::::: 78b6bb1d24dbf094a4743bae1ee7c020e8193f25 drm: rcar-du: crtc: Control CMM operations
:::::: TO: Jacopo Mondi <jacopo+renesas@jmondi.org>
:::::: CC: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org
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