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* [PULL 0/7] Usb 20200514 patches
@ 2020-05-14 12:23 Gerd Hoffmann
  2020-05-14 12:23 ` [PULL 1/7] raspi: add BCM2835 SOC MPHI emulation Gerd Hoffmann
                   ` (8 more replies)
  0 siblings, 9 replies; 10+ messages in thread
From: Gerd Hoffmann @ 2020-05-14 12:23 UTC (permalink / raw)
  To: qemu-devel
  Cc: Peter Maydell, qemu-arm, Philippe Mathieu-Daudé,
	Gerd Hoffmann, Andrew Baumann

The following changes since commit d5c75ec500d96f1d93447f990cd5a4ef5ba27fae:

  Merge remote-tracking branch 'remotes/stefanberger/tags/pull-tpm-2020-05-08-1' into staging (2020-05-12 17:00:10 +0100)

are available in the Git repository at:

  git://git.kraxel.org/qemu tags/usb-20200514-pull-request

for you to fetch changes up to 8b2b45c506f4d71b831473d8de93b3cedaea4844:

  raspi2 acceptance test: add test for dwc-hsotg (dwc2) USB host (2020-05-13 11:06:37 +0200)

----------------------------------------------------------------
usb: add dwc2 emulation for raspi machines.

----------------------------------------------------------------

Paul Zimmerman (7):
  raspi: add BCM2835 SOC MPHI emulation
  dwc-hsotg (dwc2) USB host controller register definitions
  dwc-hsotg (dwc2) USB host controller state definitions
  dwc-hsotg (dwc2) USB host controller emulation
  usb: add short-packet handling to usb-storage driver
  wire in the dwc-hsotg (dwc2) USB host controller emulation
  raspi2 acceptance test: add test for dwc-hsotg (dwc2) USB host

 tests/acceptance/boot_linux_console.py |    9 +-
 hw/usb/hcd-dwc2.h                      |  173 +++
 include/hw/arm/bcm2835_peripherals.h   |    5 +-
 include/hw/misc/bcm2835_mphi.h         |   44 +
 include/hw/usb/dwc2-regs.h             |  895 ++++++++++++++++
 hw/arm/bcm2835_peripherals.c           |   38 +-
 hw/misc/bcm2835_mphi.c                 |  184 ++++
 hw/usb/dev-storage.c                   |   15 +-
 hw/usb/hcd-dwc2.c                      | 1372 ++++++++++++++++++++++++
 hw/misc/Makefile.objs                  |    1 +
 hw/usb/Kconfig                         |    5 +
 hw/usb/Makefile.objs                   |    1 +
 hw/usb/trace-events                    |   47 +
 13 files changed, 2784 insertions(+), 5 deletions(-)
 create mode 100644 hw/usb/hcd-dwc2.h
 create mode 100644 include/hw/misc/bcm2835_mphi.h
 create mode 100644 include/hw/usb/dwc2-regs.h
 create mode 100644 hw/misc/bcm2835_mphi.c
 create mode 100644 hw/usb/hcd-dwc2.c

-- 
2.18.4



^ permalink raw reply	[flat|nested] 10+ messages in thread

* [PULL 1/7] raspi: add BCM2835 SOC MPHI emulation
  2020-05-14 12:23 [PULL 0/7] Usb 20200514 patches Gerd Hoffmann
@ 2020-05-14 12:23 ` Gerd Hoffmann
  2020-05-14 12:23 ` [PULL 2/7] dwc-hsotg (dwc2) USB host controller register definitions Gerd Hoffmann
                   ` (7 subsequent siblings)
  8 siblings, 0 replies; 10+ messages in thread
From: Gerd Hoffmann @ 2020-05-14 12:23 UTC (permalink / raw)
  To: qemu-devel
  Cc: Peter Maydell, Andrew Baumann, Paul Zimmerman, qemu-arm,
	Gerd Hoffmann, Philippe Mathieu-Daudé

From: Paul Zimmerman <pauldzim@gmail.com>

Add BCM2835 SOC MPHI (Message-based Parallel Host Interface)
emulation. It is very basic, only providing the FIQ interrupt
needed to allow the dwc-otg USB host controller driver in the
Raspbian kernel to function.

Signed-off-by: Paul Zimmerman <pauldzim@gmail.com>
Message-id: 20200512064900.28554-2-pauldzim@gmail.com
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 include/hw/arm/bcm2835_peripherals.h |   2 +
 include/hw/misc/bcm2835_mphi.h       |  44 +++++++
 hw/arm/bcm2835_peripherals.c         |  17 +++
 hw/misc/bcm2835_mphi.c               | 184 +++++++++++++++++++++++++++
 hw/misc/Makefile.objs                |   1 +
 5 files changed, 248 insertions(+)
 create mode 100644 include/hw/misc/bcm2835_mphi.h
 create mode 100644 hw/misc/bcm2835_mphi.c

diff --git a/include/hw/arm/bcm2835_peripherals.h b/include/hw/arm/bcm2835_peripherals.h
index 2e8655a7c2dd..7a7a8f614146 100644
--- a/include/hw/arm/bcm2835_peripherals.h
+++ b/include/hw/arm/bcm2835_peripherals.h
@@ -21,6 +21,7 @@
 #include "hw/misc/bcm2835_property.h"
 #include "hw/misc/bcm2835_rng.h"
 #include "hw/misc/bcm2835_mbox.h"
+#include "hw/misc/bcm2835_mphi.h"
 #include "hw/misc/bcm2835_thermal.h"
 #include "hw/sd/sdhci.h"
 #include "hw/sd/bcm2835_sdhost.h"
@@ -42,6 +43,7 @@ typedef struct BCM2835PeripheralState {
     qemu_irq irq, fiq;
 
     BCM2835SystemTimerState systmr;
+    BCM2835MphiState mphi;
     UnimplementedDeviceState armtmr;
     UnimplementedDeviceState cprman;
     UnimplementedDeviceState a2w;
diff --git a/include/hw/misc/bcm2835_mphi.h b/include/hw/misc/bcm2835_mphi.h
new file mode 100644
index 000000000000..e084314d0f06
--- /dev/null
+++ b/include/hw/misc/bcm2835_mphi.h
@@ -0,0 +1,44 @@
+/*
+ * BCM2835 SOC MPHI state definitions
+ *
+ * Copyright (c) 2020 Paul Zimmerman <pauldzim@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef HW_MISC_BCM2835_MPHI_H
+#define HW_MISC_BCM2835_MPHI_H
+
+#include "hw/irq.h"
+#include "hw/sysbus.h"
+
+#define MPHI_MMIO_SIZE      0x1000
+
+typedef struct BCM2835MphiState BCM2835MphiState;
+
+struct BCM2835MphiState {
+    SysBusDevice parent_obj;
+    qemu_irq irq;
+    MemoryRegion iomem;
+
+    uint32_t outdda;
+    uint32_t outddb;
+    uint32_t ctrl;
+    uint32_t intstat;
+    uint32_t swirq;
+};
+
+#define TYPE_BCM2835_MPHI   "bcm2835-mphi"
+
+#define BCM2835_MPHI(obj) \
+    OBJECT_CHECK(BCM2835MphiState, (obj), TYPE_BCM2835_MPHI)
+
+#endif
diff --git a/hw/arm/bcm2835_peripherals.c b/hw/arm/bcm2835_peripherals.c
index edcaa4916d0b..5e2c832d95f6 100644
--- a/hw/arm/bcm2835_peripherals.c
+++ b/hw/arm/bcm2835_peripherals.c
@@ -124,6 +124,10 @@ static void bcm2835_peripherals_init(Object *obj)
     sysbus_init_child_obj(obj, "gpio", &s->gpio, sizeof(s->gpio),
                           TYPE_BCM2835_GPIO);
 
+    /* Mphi */
+    sysbus_init_child_obj(obj, "mphi", &s->mphi, sizeof(s->mphi),
+                          TYPE_BCM2835_MPHI);
+
     object_property_add_const_link(OBJECT(&s->gpio), "sdbus-sdhci",
                                    OBJECT(&s->sdhci.sdbus), &error_abort);
     object_property_add_const_link(OBJECT(&s->gpio), "sdbus-sdhost",
@@ -368,6 +372,19 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp)
         return;
     }
 
+    /* Mphi */
+    object_property_set_bool(OBJECT(&s->mphi), true, "realized", &err);
+    if (err) {
+        error_propagate(errp, err);
+        return;
+    }
+
+    memory_region_add_subregion(&s->peri_mr, MPHI_OFFSET,
+                sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->mphi), 0));
+    sysbus_connect_irq(SYS_BUS_DEVICE(&s->mphi), 0,
+        qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
+                               INTERRUPT_HOSTPORT));
+
     create_unimp(s, &s->armtmr, "bcm2835-sp804", ARMCTRL_TIMER0_1_OFFSET, 0x40);
     create_unimp(s, &s->cprman, "bcm2835-cprman", CPRMAN_OFFSET, 0x1000);
     create_unimp(s, &s->a2w, "bcm2835-a2w", A2W_OFFSET, 0x1000);
diff --git a/hw/misc/bcm2835_mphi.c b/hw/misc/bcm2835_mphi.c
new file mode 100644
index 000000000000..39fd3fa2b539
--- /dev/null
+++ b/hw/misc/bcm2835_mphi.c
@@ -0,0 +1,184 @@
+/*
+ * BCM2835 SOC MPHI emulation
+ *
+ * Very basic emulation, only providing the FIQ interrupt needed to
+ * allow the dwc-otg USB host controller driver in the Raspbian kernel
+ * to function.
+ *
+ * Copyright (c) 2020 Paul Zimmerman <pauldzim@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "hw/misc/bcm2835_mphi.h"
+#include "migration/vmstate.h"
+#include "qemu/error-report.h"
+#include "qemu/log.h"
+#include "qemu/main-loop.h"
+
+static inline void mphi_raise_irq(BCM2835MphiState *s)
+{
+    qemu_set_irq(s->irq, 1);
+}
+
+static inline void mphi_lower_irq(BCM2835MphiState *s)
+{
+    qemu_set_irq(s->irq, 0);
+}
+
+static uint64_t mphi_reg_read(void *ptr, hwaddr addr, unsigned size)
+{
+    BCM2835MphiState *s = ptr;
+    uint32_t val = 0;
+
+    switch (addr) {
+    case 0x28:  /* outdda */
+        val = s->outdda;
+        break;
+    case 0x2c:  /* outddb */
+        val = s->outddb;
+        break;
+    case 0x4c:  /* ctrl */
+        val = s->ctrl;
+        val |= 1 << 17;
+        break;
+    case 0x50:  /* intstat */
+        val = s->intstat;
+        break;
+    case 0x1f0: /* swirq_set */
+        val = s->swirq;
+        break;
+    case 0x1f4: /* swirq_clr */
+        val = s->swirq;
+        break;
+    default:
+        qemu_log_mask(LOG_UNIMP, "read from unknown register");
+        break;
+    }
+
+    return val;
+}
+
+static void mphi_reg_write(void *ptr, hwaddr addr, uint64_t val, unsigned size)
+{
+    BCM2835MphiState *s = ptr;
+    int do_irq = 0;
+
+    switch (addr) {
+    case 0x28:  /* outdda */
+        s->outdda = val;
+        break;
+    case 0x2c:  /* outddb */
+        s->outddb = val;
+        if (val & (1 << 29)) {
+            do_irq = 1;
+        }
+        break;
+    case 0x4c:  /* ctrl */
+        s->ctrl = val;
+        if (val & (1 << 16)) {
+            do_irq = -1;
+        }
+        break;
+    case 0x50:  /* intstat */
+        s->intstat = val;
+        if (val & ((1 << 16) | (1 << 29))) {
+            do_irq = -1;
+        }
+        break;
+    case 0x1f0: /* swirq_set */
+        s->swirq |= val;
+        do_irq = 1;
+        break;
+    case 0x1f4: /* swirq_clr */
+        s->swirq &= ~val;
+        do_irq = -1;
+        break;
+    default:
+        qemu_log_mask(LOG_UNIMP, "write to unknown register");
+        return;
+    }
+
+    if (do_irq > 0) {
+        mphi_raise_irq(s);
+    } else if (do_irq < 0) {
+        mphi_lower_irq(s);
+    }
+}
+
+static const MemoryRegionOps mphi_mmio_ops = {
+    .read = mphi_reg_read,
+    .write = mphi_reg_write,
+    .impl.min_access_size = 4,
+    .impl.max_access_size = 4,
+    .endianness = DEVICE_LITTLE_ENDIAN,
+};
+
+static void mphi_reset(DeviceState *dev)
+{
+}
+
+static void mphi_realize(DeviceState *dev, Error **errp)
+{
+    SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
+    BCM2835MphiState *s = BCM2835_MPHI(dev);
+
+    sysbus_init_irq(sbd, &s->irq);
+}
+
+static void mphi_init(Object *obj)
+{
+    SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
+    BCM2835MphiState *s = BCM2835_MPHI(obj);
+
+    memory_region_init_io(&s->iomem, obj, &mphi_mmio_ops, s, "mphi", MPHI_MMIO_SIZE);
+    sysbus_init_mmio(sbd, &s->iomem);
+}
+
+const VMStateDescription vmstate_mphi_state = {
+    .name = "mphi",
+    .version_id = 1,
+    .minimum_version_id = 1,
+    .fields = (VMStateField[]) {
+        VMSTATE_UINT32(outdda, BCM2835MphiState),
+        VMSTATE_UINT32(outddb, BCM2835MphiState),
+        VMSTATE_UINT32(ctrl, BCM2835MphiState),
+        VMSTATE_UINT32(intstat, BCM2835MphiState),
+        VMSTATE_UINT32(swirq, BCM2835MphiState),
+        VMSTATE_END_OF_LIST()
+    }
+};
+
+static void mphi_class_init(ObjectClass *klass, void *data)
+{
+    DeviceClass *dc = DEVICE_CLASS(klass);
+
+    dc->realize = mphi_realize;
+    dc->reset = mphi_reset;
+    dc->vmsd = &vmstate_mphi_state;
+}
+
+static const TypeInfo bcm2835_mphi_type_info = {
+    .name          = TYPE_BCM2835_MPHI,
+    .parent        = TYPE_SYS_BUS_DEVICE,
+    .instance_size = sizeof(BCM2835MphiState),
+    .instance_init = mphi_init,
+    .class_init    = mphi_class_init,
+};
+
+static void bcm2835_mphi_register_types(void)
+{
+    type_register_static(&bcm2835_mphi_type_info);
+}
+
+type_init(bcm2835_mphi_register_types)
diff --git a/hw/misc/Makefile.objs b/hw/misc/Makefile.objs
index 68aae2eabbc7..91085cc21b75 100644
--- a/hw/misc/Makefile.objs
+++ b/hw/misc/Makefile.objs
@@ -57,6 +57,7 @@ common-obj-$(CONFIG_OMAP) += omap_l4.o
 common-obj-$(CONFIG_OMAP) += omap_sdrc.o
 common-obj-$(CONFIG_OMAP) += omap_tap.o
 common-obj-$(CONFIG_RASPI) += bcm2835_mbox.o
+common-obj-$(CONFIG_RASPI) += bcm2835_mphi.o
 common-obj-$(CONFIG_RASPI) += bcm2835_property.o
 common-obj-$(CONFIG_RASPI) += bcm2835_rng.o
 common-obj-$(CONFIG_RASPI) += bcm2835_thermal.o
-- 
2.18.4



^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PULL 2/7] dwc-hsotg (dwc2) USB host controller register definitions
  2020-05-14 12:23 [PULL 0/7] Usb 20200514 patches Gerd Hoffmann
  2020-05-14 12:23 ` [PULL 1/7] raspi: add BCM2835 SOC MPHI emulation Gerd Hoffmann
@ 2020-05-14 12:23 ` Gerd Hoffmann
  2020-05-14 12:23 ` [PULL 3/7] dwc-hsotg (dwc2) USB host controller state definitions Gerd Hoffmann
                   ` (6 subsequent siblings)
  8 siblings, 0 replies; 10+ messages in thread
From: Gerd Hoffmann @ 2020-05-14 12:23 UTC (permalink / raw)
  To: qemu-devel
  Cc: Peter Maydell, Andrew Baumann, Paul Zimmerman, qemu-arm,
	Gerd Hoffmann, Philippe Mathieu-Daudé

From: Paul Zimmerman <pauldzim@gmail.com>

Import the dwc-hsotg (dwc2) register definitions file from the
Linux kernel. This is a copy of drivers/usb/dwc2/hw.h from the
mainline Linux kernel, the only changes being two instances of
'u32' changed to 'uint32_t' to  allow it to compile. Checkpatch
throws a boatload of errors due to the tab indentation, but I
would rather import it as-is than reformat it.

Signed-off-by: Paul Zimmerman <pauldzim@gmail.com>
Message-id: 20200512064900.28554-3-pauldzim@gmail.com
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 include/hw/usb/dwc2-regs.h | 895 +++++++++++++++++++++++++++++++++++++
 1 file changed, 895 insertions(+)
 create mode 100644 include/hw/usb/dwc2-regs.h

diff --git a/include/hw/usb/dwc2-regs.h b/include/hw/usb/dwc2-regs.h
new file mode 100644
index 000000000000..96dc07fb6f4b
--- /dev/null
+++ b/include/hw/usb/dwc2-regs.h
@@ -0,0 +1,895 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * hw.h - DesignWare HS OTG Controller hardware definitions
+ *
+ * Copyright 2004-2013 Synopsys, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions, and the following disclaimer,
+ *    without modification.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. The names of the above-listed copyright holders may not be used
+ *    to endorse or promote products derived from this software without
+ *    specific prior written permission.
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation; either version 2 of the License, or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
+ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __DWC2_HW_H__
+#define __DWC2_HW_H__
+
+#define HSOTG_REG(x)	(x)
+
+#define GOTGCTL				HSOTG_REG(0x000)
+#define GOTGCTL_CHIRPEN			BIT(27)
+#define GOTGCTL_MULT_VALID_BC_MASK	(0x1f << 22)
+#define GOTGCTL_MULT_VALID_BC_SHIFT	22
+#define GOTGCTL_OTGVER			BIT(20)
+#define GOTGCTL_BSESVLD			BIT(19)
+#define GOTGCTL_ASESVLD			BIT(18)
+#define GOTGCTL_DBNC_SHORT		BIT(17)
+#define GOTGCTL_CONID_B			BIT(16)
+#define GOTGCTL_DBNCE_FLTR_BYPASS	BIT(15)
+#define GOTGCTL_DEVHNPEN		BIT(11)
+#define GOTGCTL_HSTSETHNPEN		BIT(10)
+#define GOTGCTL_HNPREQ			BIT(9)
+#define GOTGCTL_HSTNEGSCS		BIT(8)
+#define GOTGCTL_SESREQ			BIT(1)
+#define GOTGCTL_SESREQSCS		BIT(0)
+
+#define GOTGINT				HSOTG_REG(0x004)
+#define GOTGINT_DBNCE_DONE		BIT(19)
+#define GOTGINT_A_DEV_TOUT_CHG		BIT(18)
+#define GOTGINT_HST_NEG_DET		BIT(17)
+#define GOTGINT_HST_NEG_SUC_STS_CHNG	BIT(9)
+#define GOTGINT_SES_REQ_SUC_STS_CHNG	BIT(8)
+#define GOTGINT_SES_END_DET		BIT(2)
+
+#define GAHBCFG				HSOTG_REG(0x008)
+#define GAHBCFG_AHB_SINGLE		BIT(23)
+#define GAHBCFG_NOTI_ALL_DMA_WRIT	BIT(22)
+#define GAHBCFG_REM_MEM_SUPP		BIT(21)
+#define GAHBCFG_P_TXF_EMP_LVL		BIT(8)
+#define GAHBCFG_NP_TXF_EMP_LVL		BIT(7)
+#define GAHBCFG_DMA_EN			BIT(5)
+#define GAHBCFG_HBSTLEN_MASK		(0xf << 1)
+#define GAHBCFG_HBSTLEN_SHIFT		1
+#define GAHBCFG_HBSTLEN_SINGLE		0
+#define GAHBCFG_HBSTLEN_INCR		1
+#define GAHBCFG_HBSTLEN_INCR4		3
+#define GAHBCFG_HBSTLEN_INCR8		5
+#define GAHBCFG_HBSTLEN_INCR16		7
+#define GAHBCFG_GLBL_INTR_EN		BIT(0)
+#define GAHBCFG_CTRL_MASK		(GAHBCFG_P_TXF_EMP_LVL | \
+					 GAHBCFG_NP_TXF_EMP_LVL | \
+					 GAHBCFG_DMA_EN | \
+					 GAHBCFG_GLBL_INTR_EN)
+
+#define GUSBCFG				HSOTG_REG(0x00C)
+#define GUSBCFG_FORCEDEVMODE		BIT(30)
+#define GUSBCFG_FORCEHOSTMODE		BIT(29)
+#define GUSBCFG_TXENDDELAY		BIT(28)
+#define GUSBCFG_ICTRAFFICPULLREMOVE	BIT(27)
+#define GUSBCFG_ICUSBCAP		BIT(26)
+#define GUSBCFG_ULPI_INT_PROT_DIS	BIT(25)
+#define GUSBCFG_INDICATORPASSTHROUGH	BIT(24)
+#define GUSBCFG_INDICATORCOMPLEMENT	BIT(23)
+#define GUSBCFG_TERMSELDLPULSE		BIT(22)
+#define GUSBCFG_ULPI_INT_VBUS_IND	BIT(21)
+#define GUSBCFG_ULPI_EXT_VBUS_DRV	BIT(20)
+#define GUSBCFG_ULPI_CLK_SUSP_M		BIT(19)
+#define GUSBCFG_ULPI_AUTO_RES		BIT(18)
+#define GUSBCFG_ULPI_FS_LS		BIT(17)
+#define GUSBCFG_OTG_UTMI_FS_SEL		BIT(16)
+#define GUSBCFG_PHY_LP_CLK_SEL		BIT(15)
+#define GUSBCFG_USBTRDTIM_MASK		(0xf << 10)
+#define GUSBCFG_USBTRDTIM_SHIFT		10
+#define GUSBCFG_HNPCAP			BIT(9)
+#define GUSBCFG_SRPCAP			BIT(8)
+#define GUSBCFG_DDRSEL			BIT(7)
+#define GUSBCFG_PHYSEL			BIT(6)
+#define GUSBCFG_FSINTF			BIT(5)
+#define GUSBCFG_ULPI_UTMI_SEL		BIT(4)
+#define GUSBCFG_PHYIF16			BIT(3)
+#define GUSBCFG_PHYIF8			(0 << 3)
+#define GUSBCFG_TOUTCAL_MASK		(0x7 << 0)
+#define GUSBCFG_TOUTCAL_SHIFT		0
+#define GUSBCFG_TOUTCAL_LIMIT		0x7
+#define GUSBCFG_TOUTCAL(_x)		((_x) << 0)
+
+#define GRSTCTL				HSOTG_REG(0x010)
+#define GRSTCTL_AHBIDLE			BIT(31)
+#define GRSTCTL_DMAREQ			BIT(30)
+#define GRSTCTL_TXFNUM_MASK		(0x1f << 6)
+#define GRSTCTL_TXFNUM_SHIFT		6
+#define GRSTCTL_TXFNUM_LIMIT		0x1f
+#define GRSTCTL_TXFNUM(_x)		((_x) << 6)
+#define GRSTCTL_TXFFLSH			BIT(5)
+#define GRSTCTL_RXFFLSH			BIT(4)
+#define GRSTCTL_IN_TKNQ_FLSH		BIT(3)
+#define GRSTCTL_FRMCNTRRST		BIT(2)
+#define GRSTCTL_HSFTRST			BIT(1)
+#define GRSTCTL_CSFTRST			BIT(0)
+
+#define GINTSTS				HSOTG_REG(0x014)
+#define GINTMSK				HSOTG_REG(0x018)
+#define GINTSTS_WKUPINT			BIT(31)
+#define GINTSTS_SESSREQINT		BIT(30)
+#define GINTSTS_DISCONNINT		BIT(29)
+#define GINTSTS_CONIDSTSCHNG		BIT(28)
+#define GINTSTS_LPMTRANRCVD		BIT(27)
+#define GINTSTS_PTXFEMP			BIT(26)
+#define GINTSTS_HCHINT			BIT(25)
+#define GINTSTS_PRTINT			BIT(24)
+#define GINTSTS_RESETDET		BIT(23)
+#define GINTSTS_FET_SUSP		BIT(22)
+#define GINTSTS_INCOMPL_IP		BIT(21)
+#define GINTSTS_INCOMPL_SOOUT		BIT(21)
+#define GINTSTS_INCOMPL_SOIN		BIT(20)
+#define GINTSTS_OEPINT			BIT(19)
+#define GINTSTS_IEPINT			BIT(18)
+#define GINTSTS_EPMIS			BIT(17)
+#define GINTSTS_RESTOREDONE		BIT(16)
+#define GINTSTS_EOPF			BIT(15)
+#define GINTSTS_ISOUTDROP		BIT(14)
+#define GINTSTS_ENUMDONE		BIT(13)
+#define GINTSTS_USBRST			BIT(12)
+#define GINTSTS_USBSUSP			BIT(11)
+#define GINTSTS_ERLYSUSP		BIT(10)
+#define GINTSTS_I2CINT			BIT(9)
+#define GINTSTS_ULPI_CK_INT		BIT(8)
+#define GINTSTS_GOUTNAKEFF		BIT(7)
+#define GINTSTS_GINNAKEFF		BIT(6)
+#define GINTSTS_NPTXFEMP		BIT(5)
+#define GINTSTS_RXFLVL			BIT(4)
+#define GINTSTS_SOF			BIT(3)
+#define GINTSTS_OTGINT			BIT(2)
+#define GINTSTS_MODEMIS			BIT(1)
+#define GINTSTS_CURMODE_HOST		BIT(0)
+
+#define GRXSTSR				HSOTG_REG(0x01C)
+#define GRXSTSP				HSOTG_REG(0x020)
+#define GRXSTS_FN_MASK			(0x7f << 25)
+#define GRXSTS_FN_SHIFT			25
+#define GRXSTS_PKTSTS_MASK		(0xf << 17)
+#define GRXSTS_PKTSTS_SHIFT		17
+#define GRXSTS_PKTSTS_GLOBALOUTNAK	1
+#define GRXSTS_PKTSTS_OUTRX		2
+#define GRXSTS_PKTSTS_HCHIN		2
+#define GRXSTS_PKTSTS_OUTDONE		3
+#define GRXSTS_PKTSTS_HCHIN_XFER_COMP	3
+#define GRXSTS_PKTSTS_SETUPDONE		4
+#define GRXSTS_PKTSTS_DATATOGGLEERR	5
+#define GRXSTS_PKTSTS_SETUPRX		6
+#define GRXSTS_PKTSTS_HCHHALTED		7
+#define GRXSTS_HCHNUM_MASK		(0xf << 0)
+#define GRXSTS_HCHNUM_SHIFT		0
+#define GRXSTS_DPID_MASK		(0x3 << 15)
+#define GRXSTS_DPID_SHIFT		15
+#define GRXSTS_BYTECNT_MASK		(0x7ff << 4)
+#define GRXSTS_BYTECNT_SHIFT		4
+#define GRXSTS_EPNUM_MASK		(0xf << 0)
+#define GRXSTS_EPNUM_SHIFT		0
+
+#define GRXFSIZ				HSOTG_REG(0x024)
+#define GRXFSIZ_DEPTH_MASK		(0xffff << 0)
+#define GRXFSIZ_DEPTH_SHIFT		0
+
+#define GNPTXFSIZ			HSOTG_REG(0x028)
+/* Use FIFOSIZE_* constants to access this register */
+
+#define GNPTXSTS			HSOTG_REG(0x02C)
+#define GNPTXSTS_NP_TXQ_TOP_MASK		(0x7f << 24)
+#define GNPTXSTS_NP_TXQ_TOP_SHIFT		24
+#define GNPTXSTS_NP_TXQ_SPC_AVAIL_MASK		(0xff << 16)
+#define GNPTXSTS_NP_TXQ_SPC_AVAIL_SHIFT		16
+#define GNPTXSTS_NP_TXQ_SPC_AVAIL_GET(_v)	(((_v) >> 16) & 0xff)
+#define GNPTXSTS_NP_TXF_SPC_AVAIL_MASK		(0xffff << 0)
+#define GNPTXSTS_NP_TXF_SPC_AVAIL_SHIFT		0
+#define GNPTXSTS_NP_TXF_SPC_AVAIL_GET(_v)	(((_v) >> 0) & 0xffff)
+
+#define GI2CCTL				HSOTG_REG(0x0030)
+#define GI2CCTL_BSYDNE			BIT(31)
+#define GI2CCTL_RW			BIT(30)
+#define GI2CCTL_I2CDATSE0		BIT(28)
+#define GI2CCTL_I2CDEVADDR_MASK		(0x3 << 26)
+#define GI2CCTL_I2CDEVADDR_SHIFT	26
+#define GI2CCTL_I2CSUSPCTL		BIT(25)
+#define GI2CCTL_ACK			BIT(24)
+#define GI2CCTL_I2CEN			BIT(23)
+#define GI2CCTL_ADDR_MASK		(0x7f << 16)
+#define GI2CCTL_ADDR_SHIFT		16
+#define GI2CCTL_REGADDR_MASK		(0xff << 8)
+#define GI2CCTL_REGADDR_SHIFT		8
+#define GI2CCTL_RWDATA_MASK		(0xff << 0)
+#define GI2CCTL_RWDATA_SHIFT		0
+
+#define GPVNDCTL			HSOTG_REG(0x0034)
+#define GGPIO				HSOTG_REG(0x0038)
+#define GGPIO_STM32_OTG_GCCFG_PWRDWN	BIT(16)
+
+#define GUID				HSOTG_REG(0x003c)
+#define GSNPSID				HSOTG_REG(0x0040)
+#define GHWCFG1				HSOTG_REG(0x0044)
+#define GSNPSID_ID_MASK			GENMASK(31, 16)
+
+#define GHWCFG2				HSOTG_REG(0x0048)
+#define GHWCFG2_OTG_ENABLE_IC_USB		BIT(31)
+#define GHWCFG2_DEV_TOKEN_Q_DEPTH_MASK		(0x1f << 26)
+#define GHWCFG2_DEV_TOKEN_Q_DEPTH_SHIFT		26
+#define GHWCFG2_HOST_PERIO_TX_Q_DEPTH_MASK	(0x3 << 24)
+#define GHWCFG2_HOST_PERIO_TX_Q_DEPTH_SHIFT	24
+#define GHWCFG2_NONPERIO_TX_Q_DEPTH_MASK	(0x3 << 22)
+#define GHWCFG2_NONPERIO_TX_Q_DEPTH_SHIFT	22
+#define GHWCFG2_MULTI_PROC_INT			BIT(20)
+#define GHWCFG2_DYNAMIC_FIFO			BIT(19)
+#define GHWCFG2_PERIO_EP_SUPPORTED		BIT(18)
+#define GHWCFG2_NUM_HOST_CHAN_MASK		(0xf << 14)
+#define GHWCFG2_NUM_HOST_CHAN_SHIFT		14
+#define GHWCFG2_NUM_DEV_EP_MASK			(0xf << 10)
+#define GHWCFG2_NUM_DEV_EP_SHIFT		10
+#define GHWCFG2_FS_PHY_TYPE_MASK		(0x3 << 8)
+#define GHWCFG2_FS_PHY_TYPE_SHIFT		8
+#define GHWCFG2_FS_PHY_TYPE_NOT_SUPPORTED	0
+#define GHWCFG2_FS_PHY_TYPE_DEDICATED		1
+#define GHWCFG2_FS_PHY_TYPE_SHARED_UTMI		2
+#define GHWCFG2_FS_PHY_TYPE_SHARED_ULPI		3
+#define GHWCFG2_HS_PHY_TYPE_MASK		(0x3 << 6)
+#define GHWCFG2_HS_PHY_TYPE_SHIFT		6
+#define GHWCFG2_HS_PHY_TYPE_NOT_SUPPORTED	0
+#define GHWCFG2_HS_PHY_TYPE_UTMI		1
+#define GHWCFG2_HS_PHY_TYPE_ULPI		2
+#define GHWCFG2_HS_PHY_TYPE_UTMI_ULPI		3
+#define GHWCFG2_POINT2POINT			BIT(5)
+#define GHWCFG2_ARCHITECTURE_MASK		(0x3 << 3)
+#define GHWCFG2_ARCHITECTURE_SHIFT		3
+#define GHWCFG2_SLAVE_ONLY_ARCH			0
+#define GHWCFG2_EXT_DMA_ARCH			1
+#define GHWCFG2_INT_DMA_ARCH			2
+#define GHWCFG2_OP_MODE_MASK			(0x7 << 0)
+#define GHWCFG2_OP_MODE_SHIFT			0
+#define GHWCFG2_OP_MODE_HNP_SRP_CAPABLE		0
+#define GHWCFG2_OP_MODE_SRP_ONLY_CAPABLE	1
+#define GHWCFG2_OP_MODE_NO_HNP_SRP_CAPABLE	2
+#define GHWCFG2_OP_MODE_SRP_CAPABLE_DEVICE	3
+#define GHWCFG2_OP_MODE_NO_SRP_CAPABLE_DEVICE	4
+#define GHWCFG2_OP_MODE_SRP_CAPABLE_HOST	5
+#define GHWCFG2_OP_MODE_NO_SRP_CAPABLE_HOST	6
+#define GHWCFG2_OP_MODE_UNDEFINED		7
+
+#define GHWCFG3				HSOTG_REG(0x004c)
+#define GHWCFG3_DFIFO_DEPTH_MASK		(0xffff << 16)
+#define GHWCFG3_DFIFO_DEPTH_SHIFT		16
+#define GHWCFG3_OTG_LPM_EN			BIT(15)
+#define GHWCFG3_BC_SUPPORT			BIT(14)
+#define GHWCFG3_OTG_ENABLE_HSIC			BIT(13)
+#define GHWCFG3_ADP_SUPP			BIT(12)
+#define GHWCFG3_SYNCH_RESET_TYPE		BIT(11)
+#define GHWCFG3_OPTIONAL_FEATURES		BIT(10)
+#define GHWCFG3_VENDOR_CTRL_IF			BIT(9)
+#define GHWCFG3_I2C				BIT(8)
+#define GHWCFG3_OTG_FUNC			BIT(7)
+#define GHWCFG3_PACKET_SIZE_CNTR_WIDTH_MASK	(0x7 << 4)
+#define GHWCFG3_PACKET_SIZE_CNTR_WIDTH_SHIFT	4
+#define GHWCFG3_XFER_SIZE_CNTR_WIDTH_MASK	(0xf << 0)
+#define GHWCFG3_XFER_SIZE_CNTR_WIDTH_SHIFT	0
+
+#define GHWCFG4				HSOTG_REG(0x0050)
+#define GHWCFG4_DESC_DMA_DYN			BIT(31)
+#define GHWCFG4_DESC_DMA			BIT(30)
+#define GHWCFG4_NUM_IN_EPS_MASK			(0xf << 26)
+#define GHWCFG4_NUM_IN_EPS_SHIFT		26
+#define GHWCFG4_DED_FIFO_EN			BIT(25)
+#define GHWCFG4_DED_FIFO_SHIFT		25
+#define GHWCFG4_SESSION_END_FILT_EN		BIT(24)
+#define GHWCFG4_B_VALID_FILT_EN			BIT(23)
+#define GHWCFG4_A_VALID_FILT_EN			BIT(22)
+#define GHWCFG4_VBUS_VALID_FILT_EN		BIT(21)
+#define GHWCFG4_IDDIG_FILT_EN			BIT(20)
+#define GHWCFG4_NUM_DEV_MODE_CTRL_EP_MASK	(0xf << 16)
+#define GHWCFG4_NUM_DEV_MODE_CTRL_EP_SHIFT	16
+#define GHWCFG4_UTMI_PHY_DATA_WIDTH_MASK	(0x3 << 14)
+#define GHWCFG4_UTMI_PHY_DATA_WIDTH_SHIFT	14
+#define GHWCFG4_UTMI_PHY_DATA_WIDTH_8		0
+#define GHWCFG4_UTMI_PHY_DATA_WIDTH_16		1
+#define GHWCFG4_UTMI_PHY_DATA_WIDTH_8_OR_16	2
+#define GHWCFG4_ACG_SUPPORTED			BIT(12)
+#define GHWCFG4_IPG_ISOC_SUPPORTED		BIT(11)
+#define GHWCFG4_SERVICE_INTERVAL_SUPPORTED      BIT(10)
+#define GHWCFG4_XHIBER				BIT(7)
+#define GHWCFG4_HIBER				BIT(6)
+#define GHWCFG4_MIN_AHB_FREQ			BIT(5)
+#define GHWCFG4_POWER_OPTIMIZ			BIT(4)
+#define GHWCFG4_NUM_DEV_PERIO_IN_EP_MASK	(0xf << 0)
+#define GHWCFG4_NUM_DEV_PERIO_IN_EP_SHIFT	0
+
+#define GLPMCFG				HSOTG_REG(0x0054)
+#define GLPMCFG_INVSELHSIC		BIT(31)
+#define GLPMCFG_HSICCON			BIT(30)
+#define GLPMCFG_RSTRSLPSTS		BIT(29)
+#define GLPMCFG_ENBESL			BIT(28)
+#define GLPMCFG_LPM_RETRYCNT_STS_MASK	(0x7 << 25)
+#define GLPMCFG_LPM_RETRYCNT_STS_SHIFT	25
+#define GLPMCFG_SNDLPM			BIT(24)
+#define GLPMCFG_RETRY_CNT_MASK		(0x7 << 21)
+#define GLPMCFG_RETRY_CNT_SHIFT		21
+#define GLPMCFG_LPM_REJECT_CTRL_CONTROL	BIT(21)
+#define GLPMCFG_LPM_ACCEPT_CTRL_ISOC	BIT(22)
+#define GLPMCFG_LPM_CHNL_INDX_MASK	(0xf << 17)
+#define GLPMCFG_LPM_CHNL_INDX_SHIFT	17
+#define GLPMCFG_L1RESUMEOK		BIT(16)
+#define GLPMCFG_SLPSTS			BIT(15)
+#define GLPMCFG_COREL1RES_MASK		(0x3 << 13)
+#define GLPMCFG_COREL1RES_SHIFT		13
+#define GLPMCFG_HIRD_THRES_MASK		(0x1f << 8)
+#define GLPMCFG_HIRD_THRES_SHIFT	8
+#define GLPMCFG_HIRD_THRES_EN		(0x10 << 8)
+#define GLPMCFG_ENBLSLPM		BIT(7)
+#define GLPMCFG_BREMOTEWAKE		BIT(6)
+#define GLPMCFG_HIRD_MASK		(0xf << 2)
+#define GLPMCFG_HIRD_SHIFT		2
+#define GLPMCFG_APPL1RES		BIT(1)
+#define GLPMCFG_LPMCAP			BIT(0)
+
+#define GPWRDN				HSOTG_REG(0x0058)
+#define GPWRDN_MULT_VAL_ID_BC_MASK	(0x1f << 24)
+#define GPWRDN_MULT_VAL_ID_BC_SHIFT	24
+#define GPWRDN_ADP_INT			BIT(23)
+#define GPWRDN_BSESSVLD			BIT(22)
+#define GPWRDN_IDSTS			BIT(21)
+#define GPWRDN_LINESTATE_MASK		(0x3 << 19)
+#define GPWRDN_LINESTATE_SHIFT		19
+#define GPWRDN_STS_CHGINT_MSK		BIT(18)
+#define GPWRDN_STS_CHGINT		BIT(17)
+#define GPWRDN_SRP_DET_MSK		BIT(16)
+#define GPWRDN_SRP_DET			BIT(15)
+#define GPWRDN_CONNECT_DET_MSK		BIT(14)
+#define GPWRDN_CONNECT_DET		BIT(13)
+#define GPWRDN_DISCONN_DET_MSK		BIT(12)
+#define GPWRDN_DISCONN_DET		BIT(11)
+#define GPWRDN_RST_DET_MSK		BIT(10)
+#define GPWRDN_RST_DET			BIT(9)
+#define GPWRDN_LNSTSCHG_MSK		BIT(8)
+#define GPWRDN_LNSTSCHG			BIT(7)
+#define GPWRDN_DIS_VBUS			BIT(6)
+#define GPWRDN_PWRDNSWTCH		BIT(5)
+#define GPWRDN_PWRDNRSTN		BIT(4)
+#define GPWRDN_PWRDNCLMP		BIT(3)
+#define GPWRDN_RESTORE			BIT(2)
+#define GPWRDN_PMUACTV			BIT(1)
+#define GPWRDN_PMUINTSEL		BIT(0)
+
+#define GDFIFOCFG			HSOTG_REG(0x005c)
+#define GDFIFOCFG_EPINFOBASE_MASK	(0xffff << 16)
+#define GDFIFOCFG_EPINFOBASE_SHIFT	16
+#define GDFIFOCFG_GDFIFOCFG_MASK	(0xffff << 0)
+#define GDFIFOCFG_GDFIFOCFG_SHIFT	0
+
+#define ADPCTL				HSOTG_REG(0x0060)
+#define ADPCTL_AR_MASK			(0x3 << 27)
+#define ADPCTL_AR_SHIFT			27
+#define ADPCTL_ADP_TMOUT_INT_MSK	BIT(26)
+#define ADPCTL_ADP_SNS_INT_MSK		BIT(25)
+#define ADPCTL_ADP_PRB_INT_MSK		BIT(24)
+#define ADPCTL_ADP_TMOUT_INT		BIT(23)
+#define ADPCTL_ADP_SNS_INT		BIT(22)
+#define ADPCTL_ADP_PRB_INT		BIT(21)
+#define ADPCTL_ADPENA			BIT(20)
+#define ADPCTL_ADPRES			BIT(19)
+#define ADPCTL_ENASNS			BIT(18)
+#define ADPCTL_ENAPRB			BIT(17)
+#define ADPCTL_RTIM_MASK		(0x7ff << 6)
+#define ADPCTL_RTIM_SHIFT		6
+#define ADPCTL_PRB_PER_MASK		(0x3 << 4)
+#define ADPCTL_PRB_PER_SHIFT		4
+#define ADPCTL_PRB_DELTA_MASK		(0x3 << 2)
+#define ADPCTL_PRB_DELTA_SHIFT		2
+#define ADPCTL_PRB_DSCHRG_MASK		(0x3 << 0)
+#define ADPCTL_PRB_DSCHRG_SHIFT		0
+
+#define GREFCLK				    HSOTG_REG(0x0064)
+#define GREFCLK_REFCLKPER_MASK		    (0x1ffff << 15)
+#define GREFCLK_REFCLKPER_SHIFT		    15
+#define GREFCLK_REF_CLK_MODE		    BIT(14)
+#define GREFCLK_SOF_CNT_WKUP_ALERT_MASK	    (0x3ff)
+#define GREFCLK_SOF_CNT_WKUP_ALERT_SHIFT    0
+
+#define GINTMSK2			HSOTG_REG(0x0068)
+#define GINTMSK2_WKUP_ALERT_INT_MSK	BIT(0)
+
+#define GINTSTS2			HSOTG_REG(0x006c)
+#define GINTSTS2_WKUP_ALERT_INT		BIT(0)
+
+#define HPTXFSIZ			HSOTG_REG(0x100)
+/* Use FIFOSIZE_* constants to access this register */
+
+#define DPTXFSIZN(_a)			HSOTG_REG(0x104 + (((_a) - 1) * 4))
+/* Use FIFOSIZE_* constants to access this register */
+
+/* These apply to the GNPTXFSIZ, HPTXFSIZ and DPTXFSIZN registers */
+#define FIFOSIZE_DEPTH_MASK		(0xffff << 16)
+#define FIFOSIZE_DEPTH_SHIFT		16
+#define FIFOSIZE_STARTADDR_MASK		(0xffff << 0)
+#define FIFOSIZE_STARTADDR_SHIFT	0
+#define FIFOSIZE_DEPTH_GET(_x)		(((_x) >> 16) & 0xffff)
+
+/* Device mode registers */
+
+#define DCFG				HSOTG_REG(0x800)
+#define DCFG_DESCDMA_EN			BIT(23)
+#define DCFG_EPMISCNT_MASK		(0x1f << 18)
+#define DCFG_EPMISCNT_SHIFT		18
+#define DCFG_EPMISCNT_LIMIT		0x1f
+#define DCFG_EPMISCNT(_x)		((_x) << 18)
+#define DCFG_IPG_ISOC_SUPPORDED		BIT(17)
+#define DCFG_PERFRINT_MASK		(0x3 << 11)
+#define DCFG_PERFRINT_SHIFT		11
+#define DCFG_PERFRINT_LIMIT		0x3
+#define DCFG_PERFRINT(_x)		((_x) << 11)
+#define DCFG_DEVADDR_MASK		(0x7f << 4)
+#define DCFG_DEVADDR_SHIFT		4
+#define DCFG_DEVADDR_LIMIT		0x7f
+#define DCFG_DEVADDR(_x)		((_x) << 4)
+#define DCFG_NZ_STS_OUT_HSHK		BIT(2)
+#define DCFG_DEVSPD_MASK		(0x3 << 0)
+#define DCFG_DEVSPD_SHIFT		0
+#define DCFG_DEVSPD_HS			0
+#define DCFG_DEVSPD_FS			1
+#define DCFG_DEVSPD_LS			2
+#define DCFG_DEVSPD_FS48		3
+
+#define DCTL				HSOTG_REG(0x804)
+#define DCTL_SERVICE_INTERVAL_SUPPORTED BIT(19)
+#define DCTL_PWRONPRGDONE		BIT(11)
+#define DCTL_CGOUTNAK			BIT(10)
+#define DCTL_SGOUTNAK			BIT(9)
+#define DCTL_CGNPINNAK			BIT(8)
+#define DCTL_SGNPINNAK			BIT(7)
+#define DCTL_TSTCTL_MASK		(0x7 << 4)
+#define DCTL_TSTCTL_SHIFT		4
+#define DCTL_GOUTNAKSTS			BIT(3)
+#define DCTL_GNPINNAKSTS		BIT(2)
+#define DCTL_SFTDISCON			BIT(1)
+#define DCTL_RMTWKUPSIG			BIT(0)
+
+#define DSTS				HSOTG_REG(0x808)
+#define DSTS_SOFFN_MASK			(0x3fff << 8)
+#define DSTS_SOFFN_SHIFT		8
+#define DSTS_SOFFN_LIMIT		0x3fff
+#define DSTS_SOFFN(_x)			((_x) << 8)
+#define DSTS_ERRATICERR			BIT(3)
+#define DSTS_ENUMSPD_MASK		(0x3 << 1)
+#define DSTS_ENUMSPD_SHIFT		1
+#define DSTS_ENUMSPD_HS			0
+#define DSTS_ENUMSPD_FS			1
+#define DSTS_ENUMSPD_LS			2
+#define DSTS_ENUMSPD_FS48		3
+#define DSTS_SUSPSTS			BIT(0)
+
+#define DIEPMSK				HSOTG_REG(0x810)
+#define DIEPMSK_NAKMSK			BIT(13)
+#define DIEPMSK_BNAININTRMSK		BIT(9)
+#define DIEPMSK_TXFIFOUNDRNMSK		BIT(8)
+#define DIEPMSK_TXFIFOEMPTY		BIT(7)
+#define DIEPMSK_INEPNAKEFFMSK		BIT(6)
+#define DIEPMSK_INTKNEPMISMSK		BIT(5)
+#define DIEPMSK_INTKNTXFEMPMSK		BIT(4)
+#define DIEPMSK_TIMEOUTMSK		BIT(3)
+#define DIEPMSK_AHBERRMSK		BIT(2)
+#define DIEPMSK_EPDISBLDMSK		BIT(1)
+#define DIEPMSK_XFERCOMPLMSK		BIT(0)
+
+#define DOEPMSK				HSOTG_REG(0x814)
+#define DOEPMSK_BNAMSK			BIT(9)
+#define DOEPMSK_BACK2BACKSETUP		BIT(6)
+#define DOEPMSK_STSPHSERCVDMSK		BIT(5)
+#define DOEPMSK_OUTTKNEPDISMSK		BIT(4)
+#define DOEPMSK_SETUPMSK		BIT(3)
+#define DOEPMSK_AHBERRMSK		BIT(2)
+#define DOEPMSK_EPDISBLDMSK		BIT(1)
+#define DOEPMSK_XFERCOMPLMSK		BIT(0)
+
+#define DAINT				HSOTG_REG(0x818)
+#define DAINTMSK			HSOTG_REG(0x81C)
+#define DAINT_OUTEP_SHIFT		16
+#define DAINT_OUTEP(_x)			(1 << ((_x) + 16))
+#define DAINT_INEP(_x)			(1 << (_x))
+
+#define DTKNQR1				HSOTG_REG(0x820)
+#define DTKNQR2				HSOTG_REG(0x824)
+#define DTKNQR3				HSOTG_REG(0x830)
+#define DTKNQR4				HSOTG_REG(0x834)
+#define DIEPEMPMSK			HSOTG_REG(0x834)
+
+#define DVBUSDIS			HSOTG_REG(0x828)
+#define DVBUSPULSE			HSOTG_REG(0x82C)
+
+#define DIEPCTL0			HSOTG_REG(0x900)
+#define DIEPCTL(_a)			HSOTG_REG(0x900 + ((_a) * 0x20))
+
+#define DOEPCTL0			HSOTG_REG(0xB00)
+#define DOEPCTL(_a)			HSOTG_REG(0xB00 + ((_a) * 0x20))
+
+/* EP0 specialness:
+ * bits[29..28] - reserved (no SetD0PID, SetD1PID)
+ * bits[25..22] - should always be zero, this isn't a periodic endpoint
+ * bits[10..0]  - MPS setting different for EP0
+ */
+#define D0EPCTL_MPS_MASK		(0x3 << 0)
+#define D0EPCTL_MPS_SHIFT		0
+#define D0EPCTL_MPS_64			0
+#define D0EPCTL_MPS_32			1
+#define D0EPCTL_MPS_16			2
+#define D0EPCTL_MPS_8			3
+
+#define DXEPCTL_EPENA			BIT(31)
+#define DXEPCTL_EPDIS			BIT(30)
+#define DXEPCTL_SETD1PID		BIT(29)
+#define DXEPCTL_SETODDFR		BIT(29)
+#define DXEPCTL_SETD0PID		BIT(28)
+#define DXEPCTL_SETEVENFR		BIT(28)
+#define DXEPCTL_SNAK			BIT(27)
+#define DXEPCTL_CNAK			BIT(26)
+#define DXEPCTL_TXFNUM_MASK		(0xf << 22)
+#define DXEPCTL_TXFNUM_SHIFT		22
+#define DXEPCTL_TXFNUM_LIMIT		0xf
+#define DXEPCTL_TXFNUM(_x)		((_x) << 22)
+#define DXEPCTL_STALL			BIT(21)
+#define DXEPCTL_SNP			BIT(20)
+#define DXEPCTL_EPTYPE_MASK		(0x3 << 18)
+#define DXEPCTL_EPTYPE_CONTROL		(0x0 << 18)
+#define DXEPCTL_EPTYPE_ISO		(0x1 << 18)
+#define DXEPCTL_EPTYPE_BULK		(0x2 << 18)
+#define DXEPCTL_EPTYPE_INTERRUPT	(0x3 << 18)
+
+#define DXEPCTL_NAKSTS			BIT(17)
+#define DXEPCTL_DPID			BIT(16)
+#define DXEPCTL_EOFRNUM			BIT(16)
+#define DXEPCTL_USBACTEP		BIT(15)
+#define DXEPCTL_NEXTEP_MASK		(0xf << 11)
+#define DXEPCTL_NEXTEP_SHIFT		11
+#define DXEPCTL_NEXTEP_LIMIT		0xf
+#define DXEPCTL_NEXTEP(_x)		((_x) << 11)
+#define DXEPCTL_MPS_MASK		(0x7ff << 0)
+#define DXEPCTL_MPS_SHIFT		0
+#define DXEPCTL_MPS_LIMIT		0x7ff
+#define DXEPCTL_MPS(_x)			((_x) << 0)
+
+#define DIEPINT(_a)			HSOTG_REG(0x908 + ((_a) * 0x20))
+#define DOEPINT(_a)			HSOTG_REG(0xB08 + ((_a) * 0x20))
+#define DXEPINT_SETUP_RCVD		BIT(15)
+#define DXEPINT_NYETINTRPT		BIT(14)
+#define DXEPINT_NAKINTRPT		BIT(13)
+#define DXEPINT_BBLEERRINTRPT		BIT(12)
+#define DXEPINT_PKTDRPSTS		BIT(11)
+#define DXEPINT_BNAINTR			BIT(9)
+#define DXEPINT_TXFIFOUNDRN		BIT(8)
+#define DXEPINT_OUTPKTERR		BIT(8)
+#define DXEPINT_TXFEMP			BIT(7)
+#define DXEPINT_INEPNAKEFF		BIT(6)
+#define DXEPINT_BACK2BACKSETUP		BIT(6)
+#define DXEPINT_INTKNEPMIS		BIT(5)
+#define DXEPINT_STSPHSERCVD		BIT(5)
+#define DXEPINT_INTKNTXFEMP		BIT(4)
+#define DXEPINT_OUTTKNEPDIS		BIT(4)
+#define DXEPINT_TIMEOUT			BIT(3)
+#define DXEPINT_SETUP			BIT(3)
+#define DXEPINT_AHBERR			BIT(2)
+#define DXEPINT_EPDISBLD		BIT(1)
+#define DXEPINT_XFERCOMPL		BIT(0)
+
+#define DIEPTSIZ0			HSOTG_REG(0x910)
+#define DIEPTSIZ0_PKTCNT_MASK		(0x3 << 19)
+#define DIEPTSIZ0_PKTCNT_SHIFT		19
+#define DIEPTSIZ0_PKTCNT_LIMIT		0x3
+#define DIEPTSIZ0_PKTCNT(_x)		((_x) << 19)
+#define DIEPTSIZ0_XFERSIZE_MASK		(0x7f << 0)
+#define DIEPTSIZ0_XFERSIZE_SHIFT	0
+#define DIEPTSIZ0_XFERSIZE_LIMIT	0x7f
+#define DIEPTSIZ0_XFERSIZE(_x)		((_x) << 0)
+
+#define DOEPTSIZ0			HSOTG_REG(0xB10)
+#define DOEPTSIZ0_SUPCNT_MASK		(0x3 << 29)
+#define DOEPTSIZ0_SUPCNT_SHIFT		29
+#define DOEPTSIZ0_SUPCNT_LIMIT		0x3
+#define DOEPTSIZ0_SUPCNT(_x)		((_x) << 29)
+#define DOEPTSIZ0_PKTCNT		BIT(19)
+#define DOEPTSIZ0_XFERSIZE_MASK		(0x7f << 0)
+#define DOEPTSIZ0_XFERSIZE_SHIFT	0
+
+#define DIEPTSIZ(_a)			HSOTG_REG(0x910 + ((_a) * 0x20))
+#define DOEPTSIZ(_a)			HSOTG_REG(0xB10 + ((_a) * 0x20))
+#define DXEPTSIZ_MC_MASK		(0x3 << 29)
+#define DXEPTSIZ_MC_SHIFT		29
+#define DXEPTSIZ_MC_LIMIT		0x3
+#define DXEPTSIZ_MC(_x)			((_x) << 29)
+#define DXEPTSIZ_PKTCNT_MASK		(0x3ff << 19)
+#define DXEPTSIZ_PKTCNT_SHIFT		19
+#define DXEPTSIZ_PKTCNT_LIMIT		0x3ff
+#define DXEPTSIZ_PKTCNT_GET(_v)		(((_v) >> 19) & 0x3ff)
+#define DXEPTSIZ_PKTCNT(_x)		((_x) << 19)
+#define DXEPTSIZ_XFERSIZE_MASK		(0x7ffff << 0)
+#define DXEPTSIZ_XFERSIZE_SHIFT		0
+#define DXEPTSIZ_XFERSIZE_LIMIT		0x7ffff
+#define DXEPTSIZ_XFERSIZE_GET(_v)	(((_v) >> 0) & 0x7ffff)
+#define DXEPTSIZ_XFERSIZE(_x)		((_x) << 0)
+
+#define DIEPDMA(_a)			HSOTG_REG(0x914 + ((_a) * 0x20))
+#define DOEPDMA(_a)			HSOTG_REG(0xB14 + ((_a) * 0x20))
+
+#define DTXFSTS(_a)			HSOTG_REG(0x918 + ((_a) * 0x20))
+
+#define PCGCTL				HSOTG_REG(0x0e00)
+#define PCGCTL_IF_DEV_MODE		BIT(31)
+#define PCGCTL_P2HD_PRT_SPD_MASK	(0x3 << 29)
+#define PCGCTL_P2HD_PRT_SPD_SHIFT	29
+#define PCGCTL_P2HD_DEV_ENUM_SPD_MASK	(0x3 << 27)
+#define PCGCTL_P2HD_DEV_ENUM_SPD_SHIFT	27
+#define PCGCTL_MAC_DEV_ADDR_MASK	(0x7f << 20)
+#define PCGCTL_MAC_DEV_ADDR_SHIFT	20
+#define PCGCTL_MAX_TERMSEL		BIT(19)
+#define PCGCTL_MAX_XCVRSELECT_MASK	(0x3 << 17)
+#define PCGCTL_MAX_XCVRSELECT_SHIFT	17
+#define PCGCTL_PORT_POWER		BIT(16)
+#define PCGCTL_PRT_CLK_SEL_MASK		(0x3 << 14)
+#define PCGCTL_PRT_CLK_SEL_SHIFT	14
+#define PCGCTL_ESS_REG_RESTORED		BIT(13)
+#define PCGCTL_EXTND_HIBER_SWITCH	BIT(12)
+#define PCGCTL_EXTND_HIBER_PWRCLMP	BIT(11)
+#define PCGCTL_ENBL_EXTND_HIBER		BIT(10)
+#define PCGCTL_RESTOREMODE		BIT(9)
+#define PCGCTL_RESETAFTSUSP		BIT(8)
+#define PCGCTL_DEEP_SLEEP		BIT(7)
+#define PCGCTL_PHY_IN_SLEEP		BIT(6)
+#define PCGCTL_ENBL_SLEEP_GATING	BIT(5)
+#define PCGCTL_RSTPDWNMODULE		BIT(3)
+#define PCGCTL_PWRCLMP			BIT(2)
+#define PCGCTL_GATEHCLK			BIT(1)
+#define PCGCTL_STOPPCLK			BIT(0)
+
+#define PCGCCTL1                        HSOTG_REG(0xe04)
+#define PCGCCTL1_TIMER                  (0x3 << 1)
+#define PCGCCTL1_GATEEN                 BIT(0)
+
+#define EPFIFO(_a)			HSOTG_REG(0x1000 + ((_a) * 0x1000))
+
+/* Host Mode Registers */
+
+#define HCFG				HSOTG_REG(0x0400)
+#define HCFG_MODECHTIMEN		BIT(31)
+#define HCFG_PERSCHEDENA		BIT(26)
+#define HCFG_FRLISTEN_MASK		(0x3 << 24)
+#define HCFG_FRLISTEN_SHIFT		24
+#define HCFG_FRLISTEN_8				(0 << 24)
+#define FRLISTEN_8_SIZE				8
+#define HCFG_FRLISTEN_16			BIT(24)
+#define FRLISTEN_16_SIZE			16
+#define HCFG_FRLISTEN_32			(2 << 24)
+#define FRLISTEN_32_SIZE			32
+#define HCFG_FRLISTEN_64			(3 << 24)
+#define FRLISTEN_64_SIZE			64
+#define HCFG_DESCDMA			BIT(23)
+#define HCFG_RESVALID_MASK		(0xff << 8)
+#define HCFG_RESVALID_SHIFT		8
+#define HCFG_ENA32KHZ			BIT(7)
+#define HCFG_FSLSSUPP			BIT(2)
+#define HCFG_FSLSPCLKSEL_MASK		(0x3 << 0)
+#define HCFG_FSLSPCLKSEL_SHIFT		0
+#define HCFG_FSLSPCLKSEL_30_60_MHZ	0
+#define HCFG_FSLSPCLKSEL_48_MHZ		1
+#define HCFG_FSLSPCLKSEL_6_MHZ		2
+
+#define HFIR				HSOTG_REG(0x0404)
+#define HFIR_FRINT_MASK			(0xffff << 0)
+#define HFIR_FRINT_SHIFT		0
+#define HFIR_RLDCTRL			BIT(16)
+
+#define HFNUM				HSOTG_REG(0x0408)
+#define HFNUM_FRREM_MASK		(0xffff << 16)
+#define HFNUM_FRREM_SHIFT		16
+#define HFNUM_FRNUM_MASK		(0xffff << 0)
+#define HFNUM_FRNUM_SHIFT		0
+#define HFNUM_MAX_FRNUM			0x3fff
+
+#define HPTXSTS				HSOTG_REG(0x0410)
+#define TXSTS_QTOP_ODD			BIT(31)
+#define TXSTS_QTOP_CHNEP_MASK		(0xf << 27)
+#define TXSTS_QTOP_CHNEP_SHIFT		27
+#define TXSTS_QTOP_TOKEN_MASK		(0x3 << 25)
+#define TXSTS_QTOP_TOKEN_SHIFT		25
+#define TXSTS_QTOP_TERMINATE		BIT(24)
+#define TXSTS_QSPCAVAIL_MASK		(0xff << 16)
+#define TXSTS_QSPCAVAIL_SHIFT		16
+#define TXSTS_FSPCAVAIL_MASK		(0xffff << 0)
+#define TXSTS_FSPCAVAIL_SHIFT		0
+
+#define HAINT				HSOTG_REG(0x0414)
+#define HAINTMSK			HSOTG_REG(0x0418)
+#define HFLBADDR			HSOTG_REG(0x041c)
+
+#define HPRT0				HSOTG_REG(0x0440)
+#define HPRT0_SPD_MASK			(0x3 << 17)
+#define HPRT0_SPD_SHIFT			17
+#define HPRT0_SPD_HIGH_SPEED		0
+#define HPRT0_SPD_FULL_SPEED		1
+#define HPRT0_SPD_LOW_SPEED		2
+#define HPRT0_TSTCTL_MASK		(0xf << 13)
+#define HPRT0_TSTCTL_SHIFT		13
+#define HPRT0_PWR			BIT(12)
+#define HPRT0_LNSTS_MASK		(0x3 << 10)
+#define HPRT0_LNSTS_SHIFT		10
+#define HPRT0_RST			BIT(8)
+#define HPRT0_SUSP			BIT(7)
+#define HPRT0_RES			BIT(6)
+#define HPRT0_OVRCURRCHG		BIT(5)
+#define HPRT0_OVRCURRACT		BIT(4)
+#define HPRT0_ENACHG			BIT(3)
+#define HPRT0_ENA			BIT(2)
+#define HPRT0_CONNDET			BIT(1)
+#define HPRT0_CONNSTS			BIT(0)
+
+#define HCCHAR(_ch)			HSOTG_REG(0x0500 + 0x20 * (_ch))
+#define HCCHAR_CHENA			BIT(31)
+#define HCCHAR_CHDIS			BIT(30)
+#define HCCHAR_ODDFRM			BIT(29)
+#define HCCHAR_DEVADDR_MASK		(0x7f << 22)
+#define HCCHAR_DEVADDR_SHIFT		22
+#define HCCHAR_MULTICNT_MASK		(0x3 << 20)
+#define HCCHAR_MULTICNT_SHIFT		20
+#define HCCHAR_EPTYPE_MASK		(0x3 << 18)
+#define HCCHAR_EPTYPE_SHIFT		18
+#define HCCHAR_LSPDDEV			BIT(17)
+#define HCCHAR_EPDIR			BIT(15)
+#define HCCHAR_EPNUM_MASK		(0xf << 11)
+#define HCCHAR_EPNUM_SHIFT		11
+#define HCCHAR_MPS_MASK			(0x7ff << 0)
+#define HCCHAR_MPS_SHIFT		0
+
+#define HCSPLT(_ch)			HSOTG_REG(0x0504 + 0x20 * (_ch))
+#define HCSPLT_SPLTENA			BIT(31)
+#define HCSPLT_COMPSPLT			BIT(16)
+#define HCSPLT_XACTPOS_MASK		(0x3 << 14)
+#define HCSPLT_XACTPOS_SHIFT		14
+#define HCSPLT_XACTPOS_MID		0
+#define HCSPLT_XACTPOS_END		1
+#define HCSPLT_XACTPOS_BEGIN		2
+#define HCSPLT_XACTPOS_ALL		3
+#define HCSPLT_HUBADDR_MASK		(0x7f << 7)
+#define HCSPLT_HUBADDR_SHIFT		7
+#define HCSPLT_PRTADDR_MASK		(0x7f << 0)
+#define HCSPLT_PRTADDR_SHIFT		0
+
+#define HCINT(_ch)			HSOTG_REG(0x0508 + 0x20 * (_ch))
+#define HCINTMSK(_ch)			HSOTG_REG(0x050c + 0x20 * (_ch))
+#define HCINTMSK_RESERVED14_31		(0x3ffff << 14)
+#define HCINTMSK_FRM_LIST_ROLL		BIT(13)
+#define HCINTMSK_XCS_XACT		BIT(12)
+#define HCINTMSK_BNA			BIT(11)
+#define HCINTMSK_DATATGLERR		BIT(10)
+#define HCINTMSK_FRMOVRUN		BIT(9)
+#define HCINTMSK_BBLERR			BIT(8)
+#define HCINTMSK_XACTERR		BIT(7)
+#define HCINTMSK_NYET			BIT(6)
+#define HCINTMSK_ACK			BIT(5)
+#define HCINTMSK_NAK			BIT(4)
+#define HCINTMSK_STALL			BIT(3)
+#define HCINTMSK_AHBERR			BIT(2)
+#define HCINTMSK_CHHLTD			BIT(1)
+#define HCINTMSK_XFERCOMPL		BIT(0)
+
+#define HCTSIZ(_ch)			HSOTG_REG(0x0510 + 0x20 * (_ch))
+#define TSIZ_DOPNG			BIT(31)
+#define TSIZ_SC_MC_PID_MASK		(0x3 << 29)
+#define TSIZ_SC_MC_PID_SHIFT		29
+#define TSIZ_SC_MC_PID_DATA0		0
+#define TSIZ_SC_MC_PID_DATA2		1
+#define TSIZ_SC_MC_PID_DATA1		2
+#define TSIZ_SC_MC_PID_MDATA		3
+#define TSIZ_SC_MC_PID_SETUP		3
+#define TSIZ_PKTCNT_MASK		(0x3ff << 19)
+#define TSIZ_PKTCNT_SHIFT		19
+#define TSIZ_NTD_MASK			(0xff << 8)
+#define TSIZ_NTD_SHIFT			8
+#define TSIZ_SCHINFO_MASK		(0xff << 0)
+#define TSIZ_SCHINFO_SHIFT		0
+#define TSIZ_XFERSIZE_MASK		(0x7ffff << 0)
+#define TSIZ_XFERSIZE_SHIFT		0
+
+#define HCDMA(_ch)			HSOTG_REG(0x0514 + 0x20 * (_ch))
+
+#define HCDMAB(_ch)			HSOTG_REG(0x051c + 0x20 * (_ch))
+
+#define HCFIFO(_ch)			HSOTG_REG(0x1000 + 0x1000 * (_ch))
+
+/**
+ * struct dwc2_dma_desc - DMA descriptor structure,
+ * used for both host and gadget modes
+ *
+ * @status: DMA descriptor status quadlet
+ * @buf:    DMA descriptor data buffer pointer
+ *
+ * DMA Descriptor structure contains two quadlets:
+ * Status quadlet and Data buffer pointer.
+ */
+struct dwc2_dma_desc {
+	uint32_t status;
+	uint32_t buf;
+} __packed;
+
+/* Host Mode DMA descriptor status quadlet */
+
+#define HOST_DMA_A			BIT(31)
+#define HOST_DMA_STS_MASK		(0x3 << 28)
+#define HOST_DMA_STS_SHIFT		28
+#define HOST_DMA_STS_PKTERR		BIT(28)
+#define HOST_DMA_EOL			BIT(26)
+#define HOST_DMA_IOC			BIT(25)
+#define HOST_DMA_SUP			BIT(24)
+#define HOST_DMA_ALT_QTD		BIT(23)
+#define HOST_DMA_QTD_OFFSET_MASK	(0x3f << 17)
+#define HOST_DMA_QTD_OFFSET_SHIFT	17
+#define HOST_DMA_ISOC_NBYTES_MASK	(0xfff << 0)
+#define HOST_DMA_ISOC_NBYTES_SHIFT	0
+#define HOST_DMA_NBYTES_MASK		(0x1ffff << 0)
+#define HOST_DMA_NBYTES_SHIFT		0
+#define HOST_DMA_NBYTES_LIMIT		131071
+
+/* Device Mode DMA descriptor status quadlet */
+
+#define DEV_DMA_BUFF_STS_MASK		(0x3 << 30)
+#define DEV_DMA_BUFF_STS_SHIFT		30
+#define DEV_DMA_BUFF_STS_HREADY		0
+#define DEV_DMA_BUFF_STS_DMABUSY	1
+#define DEV_DMA_BUFF_STS_DMADONE	2
+#define DEV_DMA_BUFF_STS_HBUSY		3
+#define DEV_DMA_STS_MASK		(0x3 << 28)
+#define DEV_DMA_STS_SHIFT		28
+#define DEV_DMA_STS_SUCC		0
+#define DEV_DMA_STS_BUFF_FLUSH		1
+#define DEV_DMA_STS_BUFF_ERR		3
+#define DEV_DMA_L			BIT(27)
+#define DEV_DMA_SHORT			BIT(26)
+#define DEV_DMA_IOC			BIT(25)
+#define DEV_DMA_SR			BIT(24)
+#define DEV_DMA_MTRF			BIT(23)
+#define DEV_DMA_ISOC_PID_MASK		(0x3 << 23)
+#define DEV_DMA_ISOC_PID_SHIFT		23
+#define DEV_DMA_ISOC_PID_DATA0		0
+#define DEV_DMA_ISOC_PID_DATA2		1
+#define DEV_DMA_ISOC_PID_DATA1		2
+#define DEV_DMA_ISOC_PID_MDATA		3
+#define DEV_DMA_ISOC_FRNUM_MASK		(0x7ff << 12)
+#define DEV_DMA_ISOC_FRNUM_SHIFT	12
+#define DEV_DMA_ISOC_TX_NBYTES_MASK	(0xfff << 0)
+#define DEV_DMA_ISOC_TX_NBYTES_LIMIT	0xfff
+#define DEV_DMA_ISOC_RX_NBYTES_MASK	(0x7ff << 0)
+#define DEV_DMA_ISOC_RX_NBYTES_LIMIT	0x7ff
+#define DEV_DMA_ISOC_NBYTES_SHIFT	0
+#define DEV_DMA_NBYTES_MASK		(0xffff << 0)
+#define DEV_DMA_NBYTES_SHIFT		0
+#define DEV_DMA_NBYTES_LIMIT		0xffff
+
+#define MAX_DMA_DESC_NUM_GENERIC	64
+#define MAX_DMA_DESC_NUM_HS_ISOC	256
+
+#endif /* __DWC2_HW_H__ */
-- 
2.18.4



^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PULL 3/7] dwc-hsotg (dwc2) USB host controller state definitions
  2020-05-14 12:23 [PULL 0/7] Usb 20200514 patches Gerd Hoffmann
  2020-05-14 12:23 ` [PULL 1/7] raspi: add BCM2835 SOC MPHI emulation Gerd Hoffmann
  2020-05-14 12:23 ` [PULL 2/7] dwc-hsotg (dwc2) USB host controller register definitions Gerd Hoffmann
@ 2020-05-14 12:23 ` Gerd Hoffmann
  2020-05-14 12:23 ` [PULL 4/7] dwc-hsotg (dwc2) USB host controller emulation Gerd Hoffmann
                   ` (5 subsequent siblings)
  8 siblings, 0 replies; 10+ messages in thread
From: Gerd Hoffmann @ 2020-05-14 12:23 UTC (permalink / raw)
  To: qemu-devel
  Cc: Peter Maydell, Andrew Baumann, Paul Zimmerman, qemu-arm,
	Gerd Hoffmann, Philippe Mathieu-Daudé

From: Paul Zimmerman <pauldzim@gmail.com>

Add the dwc-hsotg (dwc2) USB host controller state definitions.
Mostly based on hw/usb/hcd-ehci.h.

Signed-off-by: Paul Zimmerman <pauldzim@gmail.com>
Message-id: 20200512064900.28554-4-pauldzim@gmail.com
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 hw/usb/hcd-dwc2.h | 173 ++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 173 insertions(+)
 create mode 100644 hw/usb/hcd-dwc2.h

diff --git a/hw/usb/hcd-dwc2.h b/hw/usb/hcd-dwc2.h
new file mode 100644
index 000000000000..7d7ea604a433
--- /dev/null
+++ b/hw/usb/hcd-dwc2.h
@@ -0,0 +1,173 @@
+/*
+ * dwc-hsotg (dwc2) USB host controller state definitions
+ *
+ * Based on hw/usb/hcd-ehci.h
+ *
+ * Copyright (c) 2020 Paul Zimmerman <pauldzim@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef HW_USB_DWC2_H
+#define HW_USB_DWC2_H
+
+#include "qemu/timer.h"
+#include "hw/irq.h"
+#include "hw/sysbus.h"
+#include "hw/usb.h"
+#include "sysemu/dma.h"
+
+#define DWC2_MMIO_SIZE      0x11000
+
+#define DWC2_NB_CHAN        8       /* Number of host channels */
+#define DWC2_MAX_XFER_SIZE  65536   /* Max transfer size expected in HCTSIZ */
+
+typedef struct DWC2Packet DWC2Packet;
+typedef struct DWC2State DWC2State;
+
+enum async_state {
+    DWC2_ASYNC_NONE = 0,
+    DWC2_ASYNC_INITIALIZED,
+    DWC2_ASYNC_INFLIGHT,
+    DWC2_ASYNC_FINISHED,
+};
+
+struct DWC2Packet {
+    USBPacket packet;
+    uint32_t devadr;
+    uint32_t epnum;
+    uint32_t epdir;
+    uint32_t mps;
+    uint32_t pid;
+    uint32_t index;
+    uint32_t pcnt;
+    uint32_t len;
+    int32_t async;
+    bool small;
+    bool needs_service;
+};
+
+struct DWC2State {
+    SysBusDevice parent_obj;
+    USBBus bus;
+    qemu_irq irq;
+    MemoryRegion *dma_mr;
+    AddressSpace dma_as;
+    MemoryRegion container;
+    MemoryRegion hsotg;
+    MemoryRegion fifos;
+
+    union {
+#define DWC2_GLBREG_SIZE    0x70
+        uint32_t glbreg[DWC2_GLBREG_SIZE / sizeof(uint32_t)];
+        struct {
+            uint32_t gotgctl;       /* 00 */
+            uint32_t gotgint;       /* 04 */
+            uint32_t gahbcfg;       /* 08 */
+            uint32_t gusbcfg;       /* 0c */
+            uint32_t grstctl;       /* 10 */
+            uint32_t gintsts;       /* 14 */
+            uint32_t gintmsk;       /* 18 */
+            uint32_t grxstsr;       /* 1c */
+            uint32_t grxstsp;       /* 20 */
+            uint32_t grxfsiz;       /* 24 */
+            uint32_t gnptxfsiz;     /* 28 */
+            uint32_t gnptxsts;      /* 2c */
+            uint32_t gi2cctl;       /* 30 */
+            uint32_t gpvndctl;      /* 34 */
+            uint32_t ggpio;         /* 38 */
+            uint32_t guid;          /* 3c */
+            uint32_t gsnpsid;       /* 40 */
+            uint32_t ghwcfg1;       /* 44 */
+            uint32_t ghwcfg2;       /* 48 */
+            uint32_t ghwcfg3;       /* 4c */
+            uint32_t ghwcfg4;       /* 50 */
+            uint32_t glpmcfg;       /* 54 */
+            uint32_t gpwrdn;        /* 58 */
+            uint32_t gdfifocfg;     /* 5c */
+            uint32_t gadpctl;       /* 60 */
+            uint32_t grefclk;       /* 64 */
+            uint32_t gintmsk2;      /* 68 */
+            uint32_t gintsts2;      /* 6c */
+        };
+    };
+
+    union {
+#define DWC2_FSZREG_SIZE    0x04
+        uint32_t fszreg[DWC2_FSZREG_SIZE / sizeof(uint32_t)];
+        struct {
+            uint32_t hptxfsiz;      /* 100 */
+        };
+    };
+
+    union {
+#define DWC2_HREG0_SIZE     0x44
+        uint32_t hreg0[DWC2_HREG0_SIZE / sizeof(uint32_t)];
+        struct {
+            uint32_t hcfg;          /* 400 */
+            uint32_t hfir;          /* 404 */
+            uint32_t hfnum;         /* 408 */
+            uint32_t rsvd0;         /* 40c */
+            uint32_t hptxsts;       /* 410 */
+            uint32_t haint;         /* 414 */
+            uint32_t haintmsk;      /* 418 */
+            uint32_t hflbaddr;      /* 41c */
+            uint32_t rsvd1[8];      /* 420-43c */
+            uint32_t hprt0;         /* 440 */
+        };
+    };
+
+#define DWC2_HREG1_SIZE     (0x20 * DWC2_NB_CHAN)
+    uint32_t hreg1[DWC2_HREG1_SIZE / sizeof(uint32_t)];
+
+#define hcchar(_ch)     hreg1[((_ch) << 3) + 0] /* 500, 520, ... */
+#define hcsplt(_ch)     hreg1[((_ch) << 3) + 1] /* 504, 524, ... */
+#define hcint(_ch)      hreg1[((_ch) << 3) + 2] /* 508, 528, ... */
+#define hcintmsk(_ch)   hreg1[((_ch) << 3) + 3] /* 50c, 52c, ... */
+#define hctsiz(_ch)     hreg1[((_ch) << 3) + 4] /* 510, 530, ... */
+#define hcdma(_ch)      hreg1[((_ch) << 3) + 5] /* 514, 534, ... */
+#define hcdmab(_ch)     hreg1[((_ch) << 3) + 7] /* 51c, 53c, ... */
+
+    union {
+#define DWC2_PCGREG_SIZE    0x08
+        uint32_t pcgreg[DWC2_PCGREG_SIZE / sizeof(uint32_t)];
+        struct {
+            uint32_t pcgctl;        /* e00 */
+            uint32_t pcgcctl1;      /* e04 */
+        };
+    };
+
+    /* TODO - implement FIFO registers for slave mode */
+#define DWC2_HFIFO_SIZE     (0x1000 * DWC2_NB_CHAN)
+
+    /*
+     *  Internal state
+     */
+    QEMUTimer *eof_timer;
+    QEMUTimer *frame_timer;
+    QEMUBH *async_bh;
+    int64_t sof_time;
+    int64_t usb_frame_time;
+    int64_t usb_bit_time;
+    uint32_t usb_version;
+    uint16_t frame_number;
+    uint16_t fi;
+    uint16_t next_chan;
+    bool working;
+    USBPort uport;
+    DWC2Packet packet[DWC2_NB_CHAN];                   /* one packet per chan */
+    uint8_t usb_buf[DWC2_NB_CHAN][DWC2_MAX_XFER_SIZE]; /* one buffer per chan */
+};
+
+#define TYPE_DWC2_USB   "dwc2-usb"
+#define DWC2_USB(obj)   OBJECT_CHECK(DWC2State, (obj), TYPE_DWC2_USB)
+
+#endif
-- 
2.18.4



^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PULL 4/7] dwc-hsotg (dwc2) USB host controller emulation
  2020-05-14 12:23 [PULL 0/7] Usb 20200514 patches Gerd Hoffmann
                   ` (2 preceding siblings ...)
  2020-05-14 12:23 ` [PULL 3/7] dwc-hsotg (dwc2) USB host controller state definitions Gerd Hoffmann
@ 2020-05-14 12:23 ` Gerd Hoffmann
  2020-05-14 12:23 ` [PULL 5/7] usb: add short-packet handling to usb-storage driver Gerd Hoffmann
                   ` (4 subsequent siblings)
  8 siblings, 0 replies; 10+ messages in thread
From: Gerd Hoffmann @ 2020-05-14 12:23 UTC (permalink / raw)
  To: qemu-devel
  Cc: Peter Maydell, Andrew Baumann, Paul Zimmerman, qemu-arm,
	Gerd Hoffmann, Philippe Mathieu-Daudé

From: Paul Zimmerman <pauldzim@gmail.com>

Add the dwc-hsotg (dwc2) USB host controller emulation code.
Based on hw/usb/hcd-ehci.c and hw/usb/hcd-ohci.c.

Note that to use this with the dwc-otg driver in the Raspbian
kernel, you must pass the option "dwc_otg.fiq_fsm_enable=0" on
the kernel command line.

Emulation of slave mode and of descriptor-DMA mode has not been
implemented yet. These modes are seldom used.

I have used some on-line sources of information while developing
this emulation, including:

http://www.capital-micro.com/PDF/CME-M7_Family_User_Guide_EN.pdf
which has a pretty complete description of the controller starting
on page 370.

https://sourceforge.net/p/wive-ng/wive-ng-mt/ci/master/tree/docs/DataSheets/RT3050_5x_V2.0_081408_0902.pdf
which has a description of the controller registers starting on
page 130.

Thanks to Felippe Mathieu-Daude for providing a cleaner method
of implementing the memory regions for the controller registers.

Signed-off-by: Paul Zimmerman <pauldzim@gmail.com>
Message-id: 20200512064900.28554-5-pauldzim@gmail.com
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 hw/usb/hcd-dwc2.c    | 1372 ++++++++++++++++++++++++++++++++++++++++++
 hw/usb/Kconfig       |    5 +
 hw/usb/Makefile.objs |    1 +
 hw/usb/trace-events  |   47 ++
 4 files changed, 1425 insertions(+)
 create mode 100644 hw/usb/hcd-dwc2.c

diff --git a/hw/usb/hcd-dwc2.c b/hw/usb/hcd-dwc2.c
new file mode 100644
index 000000000000..29f259997492
--- /dev/null
+++ b/hw/usb/hcd-dwc2.c
@@ -0,0 +1,1372 @@
+/*
+ * dwc-hsotg (dwc2) USB host controller emulation
+ *
+ * Based on hw/usb/hcd-ehci.c and hw/usb/hcd-ohci.c
+ *
+ * Note that to use this emulation with the dwc-otg driver in the
+ * Raspbian kernel, you must pass the option "dwc_otg.fiq_fsm_enable=0"
+ * on the kernel command line.
+ *
+ * Some useful documentation used to develop this emulation can be
+ * found online (as of April 2020) at:
+ *
+ * http://www.capital-micro.com/PDF/CME-M7_Family_User_Guide_EN.pdf
+ * which has a pretty complete description of the controller starting
+ * on page 370.
+ *
+ * https://sourceforge.net/p/wive-ng/wive-ng-mt/ci/master/tree/docs/DataSheets/RT3050_5x_V2.0_081408_0902.pdf
+ * which has a description of the controller registers starting on
+ * page 130.
+ *
+ * Copyright (c) 2020 Paul Zimmerman <pauldzim@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include "qemu/osdep.h"
+#include "qemu/units.h"
+#include "qapi/error.h"
+#include "hw/usb/dwc2-regs.h"
+#include "hw/usb/hcd-dwc2.h"
+#include "migration/vmstate.h"
+#include "trace.h"
+#include "qemu/error-report.h"
+#include "qemu/main-loop.h"
+#include "hw/qdev-properties.h"
+
+#define USB_HZ_FS       12000000
+#define USB_HZ_HS       96000000
+#define USB_FRMINTVL    12000
+
+/* nifty macros from Arnon's EHCI version  */
+#define get_field(data, field) \
+    (((data) & field##_MASK) >> field##_SHIFT)
+
+#define set_field(data, newval, field) do { \
+    uint32_t val = *(data); \
+    val &= ~field##_MASK; \
+    val |= ((newval) << field##_SHIFT) & field##_MASK; \
+    *(data) = val; \
+} while (0)
+
+#define get_bit(data, bitmask) \
+    (!!((data) & (bitmask)))
+
+/* update irq line */
+static inline void dwc2_update_irq(DWC2State *s)
+{
+    static int oldlevel;
+    int level = 0;
+
+    if ((s->gintsts & s->gintmsk) && (s->gahbcfg & GAHBCFG_GLBL_INTR_EN)) {
+        level = 1;
+    }
+    if (level != oldlevel) {
+        oldlevel = level;
+        trace_usb_dwc2_update_irq(level);
+        qemu_set_irq(s->irq, level);
+    }
+}
+
+/* flag interrupt condition */
+static inline void dwc2_raise_global_irq(DWC2State *s, uint32_t intr)
+{
+    if (!(s->gintsts & intr)) {
+        s->gintsts |= intr;
+        trace_usb_dwc2_raise_global_irq(intr);
+        dwc2_update_irq(s);
+    }
+}
+
+static inline void dwc2_lower_global_irq(DWC2State *s, uint32_t intr)
+{
+    if (s->gintsts & intr) {
+        s->gintsts &= ~intr;
+        trace_usb_dwc2_lower_global_irq(intr);
+        dwc2_update_irq(s);
+    }
+}
+
+static inline void dwc2_raise_host_irq(DWC2State *s, uint32_t host_intr)
+{
+    if (!(s->haint & host_intr)) {
+        s->haint |= host_intr;
+        s->haint &= 0xffff;
+        trace_usb_dwc2_raise_host_irq(host_intr);
+        if (s->haint & s->haintmsk) {
+            dwc2_raise_global_irq(s, GINTSTS_HCHINT);
+        }
+    }
+}
+
+static inline void dwc2_lower_host_irq(DWC2State *s, uint32_t host_intr)
+{
+    if (s->haint & host_intr) {
+        s->haint &= ~host_intr;
+        trace_usb_dwc2_lower_host_irq(host_intr);
+        if (!(s->haint & s->haintmsk)) {
+            dwc2_lower_global_irq(s, GINTSTS_HCHINT);
+        }
+    }
+}
+
+static inline void dwc2_update_hc_irq(DWC2State *s, int index)
+{
+    uint32_t host_intr = 1 << (index >> 3);
+
+    if (s->hreg1[index + 2] & s->hreg1[index + 3]) {
+        dwc2_raise_host_irq(s, host_intr);
+    } else {
+        dwc2_lower_host_irq(s, host_intr);
+    }
+}
+
+/* set a timer for EOF */
+static void dwc2_eof_timer(DWC2State *s)
+{
+    timer_mod(s->eof_timer, s->sof_time + s->usb_frame_time);
+}
+
+/* Set a timer for EOF and generate SOF event */
+static void dwc2_sof(DWC2State *s)
+{
+    s->sof_time += s->usb_frame_time;
+    trace_usb_dwc2_sof(s->sof_time);
+    dwc2_eof_timer(s);
+    dwc2_raise_global_irq(s, GINTSTS_SOF);
+}
+
+/* Do frame processing on frame boundary */
+static void dwc2_frame_boundary(void *opaque)
+{
+    DWC2State *s = opaque;
+    int64_t now;
+    uint16_t frcnt;
+
+    now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
+
+    /* Frame boundary, so do EOF stuff here */
+
+    /* Increment frame number */
+    frcnt = (uint16_t)((now - s->sof_time) / s->fi);
+    s->frame_number = (s->frame_number + frcnt) & 0xffff;
+    s->hfnum = s->frame_number & HFNUM_MAX_FRNUM;
+
+    /* Do SOF stuff here */
+    dwc2_sof(s);
+}
+
+/* Start sending SOF tokens on the USB bus */
+static void dwc2_bus_start(DWC2State *s)
+{
+    trace_usb_dwc2_bus_start();
+    s->sof_time = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
+    dwc2_eof_timer(s);
+}
+
+/* Stop sending SOF tokens on the USB bus */
+static void dwc2_bus_stop(DWC2State *s)
+{
+    trace_usb_dwc2_bus_stop();
+    timer_del(s->eof_timer);
+}
+
+static USBDevice *dwc2_find_device(DWC2State *s, uint8_t addr)
+{
+    USBDevice *dev;
+
+    trace_usb_dwc2_find_device(addr);
+
+    if (!(s->hprt0 & HPRT0_ENA)) {
+        trace_usb_dwc2_port_disabled(0);
+    } else {
+        dev = usb_find_device(&s->uport, addr);
+        if (dev != NULL) {
+            trace_usb_dwc2_device_found(0);
+            return dev;
+        }
+    }
+
+    trace_usb_dwc2_device_not_found();
+    return NULL;
+}
+
+static const char *pstatus[] = {
+    "USB_RET_SUCCESS", "USB_RET_NODEV", "USB_RET_NAK", "USB_RET_STALL",
+    "USB_RET_BABBLE", "USB_RET_IOERROR", "USB_RET_ASYNC",
+    "USB_RET_ADD_TO_QUEUE", "USB_RET_REMOVE_FROM_QUEUE"
+};
+
+static uint32_t pintr[] = {
+    HCINTMSK_XFERCOMPL, HCINTMSK_XACTERR, HCINTMSK_NAK, HCINTMSK_STALL,
+    HCINTMSK_BBLERR, HCINTMSK_XACTERR, HCINTMSK_XACTERR, HCINTMSK_XACTERR,
+    HCINTMSK_XACTERR
+};
+
+static const char *types[] = {
+    "Ctrl", "Isoc", "Bulk", "Intr"
+};
+
+static const char *dirs[] = {
+    "Out", "In"
+};
+
+static void dwc2_handle_packet(DWC2State *s, uint32_t devadr, USBDevice *dev,
+                               USBEndpoint *ep, uint32_t index, bool send)
+{
+    DWC2Packet *p;
+    uint32_t hcchar = s->hreg1[index];
+    uint32_t hctsiz = s->hreg1[index + 4];
+    uint32_t hcdma = s->hreg1[index + 5];
+    uint32_t chan, epnum, epdir, eptype, mps, pid, pcnt, len, tlen, intr = 0;
+    uint32_t tpcnt, stsidx, actual = 0;
+    bool do_intr = false, done = false;
+
+    epnum = get_field(hcchar, HCCHAR_EPNUM);
+    epdir = get_bit(hcchar, HCCHAR_EPDIR);
+    eptype = get_field(hcchar, HCCHAR_EPTYPE);
+    mps = get_field(hcchar, HCCHAR_MPS);
+    pid = get_field(hctsiz, TSIZ_SC_MC_PID);
+    pcnt = get_field(hctsiz, TSIZ_PKTCNT);
+    len = get_field(hctsiz, TSIZ_XFERSIZE);
+    assert(len <= DWC2_MAX_XFER_SIZE);
+    chan = index >> 3;
+    p = &s->packet[chan];
+
+    trace_usb_dwc2_handle_packet(chan, dev, &p->packet, epnum, types[eptype],
+                                 dirs[epdir], mps, len, pcnt);
+
+    if (eptype == USB_ENDPOINT_XFER_CONTROL && pid == TSIZ_SC_MC_PID_SETUP) {
+        pid = USB_TOKEN_SETUP;
+    } else {
+        pid = epdir ? USB_TOKEN_IN : USB_TOKEN_OUT;
+    }
+
+    if (send) {
+        tlen = len;
+        if (p->small) {
+            if (tlen > mps) {
+                tlen = mps;
+            }
+        }
+
+        if (pid != USB_TOKEN_IN) {
+            trace_usb_dwc2_memory_read(hcdma, tlen);
+            if (dma_memory_read(&s->dma_as, hcdma,
+                                s->usb_buf[chan], tlen) != MEMTX_OK) {
+                fprintf(stderr, "%s: dma_memory_read failed\n", __func__);
+            }
+        }
+
+        usb_packet_init(&p->packet);
+        usb_packet_setup(&p->packet, pid, ep, 0, hcdma,
+                         pid != USB_TOKEN_IN, true);
+        usb_packet_addbuf(&p->packet, s->usb_buf[chan], tlen);
+        p->async = DWC2_ASYNC_NONE;
+        usb_handle_packet(dev, &p->packet);
+    } else {
+        tlen = p->len;
+    }
+
+    stsidx = -p->packet.status;
+    assert(stsidx < sizeof(pstatus) / sizeof(*pstatus));
+    actual = p->packet.actual_length;
+    trace_usb_dwc2_packet_status(pstatus[stsidx], actual);
+
+babble:
+    if (p->packet.status != USB_RET_SUCCESS &&
+            p->packet.status != USB_RET_NAK &&
+            p->packet.status != USB_RET_STALL &&
+            p->packet.status != USB_RET_ASYNC) {
+        fprintf(stderr, "%s: packet status %s actual %d\n", __func__,
+                pstatus[stsidx], actual);
+    }
+
+    if (p->packet.status == USB_RET_ASYNC) {
+        trace_usb_dwc2_async_packet(&p->packet, chan, dev, epnum,
+                                    dirs[epdir], tlen);
+        usb_device_flush_ep_queue(dev, ep);
+        assert(p->async != DWC2_ASYNC_INFLIGHT);
+        p->devadr = devadr;
+        p->epnum = epnum;
+        p->epdir = epdir;
+        p->mps = mps;
+        p->pid = pid;
+        p->index = index;
+        p->pcnt = pcnt;
+        p->len = tlen;
+        p->async = DWC2_ASYNC_INFLIGHT;
+        p->needs_service = false;
+        return;
+    }
+
+    if (p->packet.status == USB_RET_SUCCESS) {
+        if (actual > tlen) {
+            p->packet.status = USB_RET_BABBLE;
+            goto babble;
+        }
+
+        if (pid == USB_TOKEN_IN) {
+            trace_usb_dwc2_memory_write(hcdma, actual);
+            if (dma_memory_write(&s->dma_as, hcdma, s->usb_buf[chan],
+                                 actual) != MEMTX_OK) {
+                fprintf(stderr, "%s: dma_memory_write failed\n", __func__);
+            }
+        }
+
+        tpcnt = actual / mps;
+        if (actual % mps) {
+            tpcnt++;
+            if (pid == USB_TOKEN_IN) {
+                done = true;
+            }
+        }
+
+        pcnt -= tpcnt < pcnt ? tpcnt : pcnt;
+        set_field(&hctsiz, pcnt, TSIZ_PKTCNT);
+        len -= actual < len ? actual : len;
+        set_field(&hctsiz, len, TSIZ_XFERSIZE);
+        s->hreg1[index + 4] = hctsiz;
+        hcdma += actual;
+        s->hreg1[index + 5] = hcdma;
+
+        if (!pcnt || len == 0 || actual == 0) {
+            done = true;
+        }
+    } else {
+        intr |= pintr[stsidx];
+        if (p->packet.status == USB_RET_NAK &&
+            (eptype == USB_ENDPOINT_XFER_CONTROL ||
+             eptype == USB_ENDPOINT_XFER_BULK)) {
+            /*
+             * for ctrl/bulk, automatically retry on NAK,
+             * but send the interrupt anyway
+             */
+            intr &= ~HCINTMSK_RESERVED14_31;
+            s->hreg1[index + 2] |= intr;
+            do_intr = true;
+        } else {
+            intr |= HCINTMSK_CHHLTD;
+            done = true;
+        }
+    }
+
+    usb_packet_cleanup(&p->packet);
+
+    if (done) {
+        hcchar &= ~HCCHAR_CHENA;
+        s->hreg1[index] = hcchar;
+        if (!(intr & HCINTMSK_CHHLTD)) {
+            intr |= HCINTMSK_CHHLTD | HCINTMSK_XFERCOMPL;
+        }
+        intr &= ~HCINTMSK_RESERVED14_31;
+        s->hreg1[index + 2] |= intr;
+        p->needs_service = false;
+        trace_usb_dwc2_packet_done(pstatus[stsidx], actual, len, pcnt);
+        dwc2_update_hc_irq(s, index);
+        return;
+    }
+
+    p->devadr = devadr;
+    p->epnum = epnum;
+    p->epdir = epdir;
+    p->mps = mps;
+    p->pid = pid;
+    p->index = index;
+    p->pcnt = pcnt;
+    p->len = len;
+    p->needs_service = true;
+    trace_usb_dwc2_packet_next(pstatus[stsidx], len, pcnt);
+    if (do_intr) {
+        dwc2_update_hc_irq(s, index);
+    }
+}
+
+/* Attach or detach a device on root hub */
+
+static const char *speeds[] = {
+    "low", "full", "high"
+};
+
+static void dwc2_attach(USBPort *port)
+{
+    DWC2State *s = port->opaque;
+    int hispd = 0;
+
+    trace_usb_dwc2_attach(port);
+    assert(port->index == 0);
+
+    if (!port->dev || !port->dev->attached) {
+        return;
+    }
+
+    assert(port->dev->speed <= USB_SPEED_HIGH);
+    trace_usb_dwc2_attach_speed(speeds[port->dev->speed]);
+    s->hprt0 &= ~HPRT0_SPD_MASK;
+
+    switch (port->dev->speed) {
+    case USB_SPEED_LOW:
+        s->hprt0 |= HPRT0_SPD_LOW_SPEED << HPRT0_SPD_SHIFT;
+        break;
+    case USB_SPEED_FULL:
+        s->hprt0 |= HPRT0_SPD_FULL_SPEED << HPRT0_SPD_SHIFT;
+        break;
+    case USB_SPEED_HIGH:
+        s->hprt0 |= HPRT0_SPD_HIGH_SPEED << HPRT0_SPD_SHIFT;
+        hispd = 1;
+        break;
+    }
+
+    if (hispd) {
+        s->usb_frame_time = NANOSECONDS_PER_SECOND / 8000;        /* 125000 */
+        if (NANOSECONDS_PER_SECOND >= USB_HZ_HS) {
+            s->usb_bit_time = NANOSECONDS_PER_SECOND / USB_HZ_HS; /* 10.4 */
+        } else {
+            s->usb_bit_time = 1;
+        }
+    } else {
+        s->usb_frame_time = NANOSECONDS_PER_SECOND / 1000;        /* 1000000 */
+        if (NANOSECONDS_PER_SECOND >= USB_HZ_FS) {
+            s->usb_bit_time = NANOSECONDS_PER_SECOND / USB_HZ_FS; /* 83.3 */
+        } else {
+            s->usb_bit_time = 1;
+        }
+    }
+
+    s->fi = USB_FRMINTVL - 1;
+    s->hprt0 |= HPRT0_CONNDET | HPRT0_CONNSTS;
+
+    dwc2_bus_start(s);
+    dwc2_raise_global_irq(s, GINTSTS_PRTINT);
+}
+
+static void dwc2_detach(USBPort *port)
+{
+    DWC2State *s = port->opaque;
+
+    trace_usb_dwc2_detach(port);
+    assert(port->index == 0);
+
+    dwc2_bus_stop(s);
+
+    s->hprt0 &= ~(HPRT0_SPD_MASK | HPRT0_SUSP | HPRT0_ENA | HPRT0_CONNSTS);
+    s->hprt0 |= HPRT0_CONNDET | HPRT0_ENACHG;
+
+    dwc2_raise_global_irq(s, GINTSTS_PRTINT);
+}
+
+static void dwc2_child_detach(USBPort *port, USBDevice *child)
+{
+    trace_usb_dwc2_child_detach(port, child);
+    assert(port->index == 0);
+}
+
+static void dwc2_wakeup(USBPort *port)
+{
+    DWC2State *s = port->opaque;
+
+    trace_usb_dwc2_wakeup(port);
+    assert(port->index == 0);
+
+    if (s->hprt0 & HPRT0_SUSP) {
+        s->hprt0 |= HPRT0_RES;
+        dwc2_raise_global_irq(s, GINTSTS_PRTINT);
+    }
+
+    qemu_bh_schedule(s->async_bh);
+}
+
+static void dwc2_async_packet_complete(USBPort *port, USBPacket *packet)
+{
+    DWC2State *s = port->opaque;
+    DWC2Packet *p;
+    USBDevice *dev;
+    USBEndpoint *ep;
+
+    assert(port->index == 0);
+    p = container_of(packet, DWC2Packet, packet);
+    dev = dwc2_find_device(s, p->devadr);
+    ep = usb_ep_get(dev, p->pid, p->epnum);
+    trace_usb_dwc2_async_packet_complete(port, packet, p->index >> 3, dev,
+                                         p->epnum, dirs[p->epdir], p->len);
+    assert(p->async == DWC2_ASYNC_INFLIGHT);
+
+    if (packet->status == USB_RET_REMOVE_FROM_QUEUE) {
+        usb_cancel_packet(packet);
+        usb_packet_cleanup(packet);
+        return;
+    }
+
+    dwc2_handle_packet(s, p->devadr, dev, ep, p->index, false);
+
+    p->async = DWC2_ASYNC_FINISHED;
+    qemu_bh_schedule(s->async_bh);
+}
+
+static USBPortOps dwc2_port_ops = {
+    .attach = dwc2_attach,
+    .detach = dwc2_detach,
+    .child_detach = dwc2_child_detach,
+    .wakeup = dwc2_wakeup,
+    .complete = dwc2_async_packet_complete,
+};
+
+static uint32_t dwc2_get_frame_remaining(DWC2State *s)
+{
+    uint32_t fr = 0;
+    int64_t tks;
+
+    tks = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - s->sof_time;
+    if (tks < 0) {
+        tks = 0;
+    }
+
+    /* avoid muldiv if possible */
+    if (tks >= s->usb_frame_time) {
+        goto out;
+    }
+    if (tks < s->usb_bit_time) {
+        fr = s->fi;
+        goto out;
+    }
+
+    /* tks = number of ns since SOF, divided by 83 (fs) or 10 (hs) */
+    tks = tks / s->usb_bit_time;
+    if (tks >= (int64_t)s->fi) {
+        goto out;
+    }
+
+    /* remaining = frame interval minus tks */
+    fr = (uint32_t)((int64_t)s->fi - tks);
+
+out:
+    return fr;
+}
+
+static void dwc2_work_bh(void *opaque)
+{
+    DWC2State *s = opaque;
+    DWC2Packet *p;
+    USBDevice *dev;
+    USBEndpoint *ep;
+    int64_t t_now, expire_time;
+    int chan;
+    bool found = false;
+
+    trace_usb_dwc2_work_bh();
+    if (s->working) {
+        return;
+    }
+    s->working = true;
+
+    t_now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
+    chan = s->next_chan;
+
+    do {
+        p = &s->packet[chan];
+        if (p->needs_service) {
+            dev = dwc2_find_device(s, p->devadr);
+            ep = usb_ep_get(dev, p->pid, p->epnum);
+            trace_usb_dwc2_work_bh_service(s->next_chan, chan, dev, p->epnum);
+            dwc2_handle_packet(s, p->devadr, dev, ep, p->index, true);
+            found = true;
+        }
+        if (++chan == DWC2_NB_CHAN) {
+            chan = 0;
+        }
+        if (found) {
+            s->next_chan = chan;
+            trace_usb_dwc2_work_bh_next(chan);
+        }
+    } while (chan != s->next_chan);
+
+    if (found) {
+        expire_time = t_now + NANOSECONDS_PER_SECOND / 4000;
+        timer_mod(s->frame_timer, expire_time);
+    }
+    s->working = false;
+}
+
+static void dwc2_enable_chan(DWC2State *s,  uint32_t index)
+{
+    USBDevice *dev;
+    USBEndpoint *ep;
+    uint32_t hcchar;
+    uint32_t hctsiz;
+    uint32_t devadr, epnum, epdir, eptype, pid, len;
+    DWC2Packet *p;
+
+    assert((index >> 3) < DWC2_NB_CHAN);
+    p = &s->packet[index >> 3];
+    hcchar = s->hreg1[index];
+    hctsiz = s->hreg1[index + 4];
+    devadr = get_field(hcchar, HCCHAR_DEVADDR);
+    epnum = get_field(hcchar, HCCHAR_EPNUM);
+    epdir = get_bit(hcchar, HCCHAR_EPDIR);
+    eptype = get_field(hcchar, HCCHAR_EPTYPE);
+    pid = get_field(hctsiz, TSIZ_SC_MC_PID);
+    len = get_field(hctsiz, TSIZ_XFERSIZE);
+
+    dev = dwc2_find_device(s, devadr);
+
+    trace_usb_dwc2_enable_chan(index >> 3, dev, &p->packet, epnum);
+    if (dev == NULL) {
+        fprintf(stderr, "%s: no device found\n", __func__);
+        return;
+    }
+
+    if (eptype == USB_ENDPOINT_XFER_CONTROL && pid == TSIZ_SC_MC_PID_SETUP) {
+        pid = USB_TOKEN_SETUP;
+    } else {
+        pid = epdir ? USB_TOKEN_IN : USB_TOKEN_OUT;
+    }
+
+    ep = usb_ep_get(dev, pid, epnum);
+
+    /*
+     * Hack: Networking doesn't like us delivering large transfers, it kind
+     * of works but the latency is horrible. So if the transfer is <= the mtu
+     * size, we take that as a hint that this might be a network transfer,
+     * and do the transfer packet-by-packet.
+     */
+    if (len > 1536) {
+        p->small = false;
+    } else {
+        p->small = true;
+    }
+
+    dwc2_handle_packet(s, devadr, dev, ep, index, true);
+    qemu_bh_schedule(s->async_bh);
+}
+
+static const char *glbregnm[] = {
+    "GOTGCTL  ", "GOTGINT  ", "GAHBCFG  ", "GUSBCFG  ", "GRSTCTL  ",
+    "GINTSTS  ", "GINTMSK  ", "GRXSTSR  ", "GRXSTSP  ", "GRXFSIZ  ",
+    "GNPTXFSIZ", "GNPTXSTS ", "GI2CCTL  ", "GPVNDCTL ", "GGPIO    ",
+    "GUID     ", "GSNPSID  ", "GHWCFG1  ", "GHWCFG2  ", "GHWCFG3  ",
+    "GHWCFG4  ", "GLPMCFG  ", "GPWRDN   ", "GDFIFOCFG", "GADPCTL  ",
+    "GREFCLK  ", "GINTMSK2 ", "GINTSTS2 "
+};
+
+static uint64_t dwc2_glbreg_read(void *ptr, hwaddr addr, int index,
+                                 unsigned size)
+{
+    DWC2State *s = ptr;
+    uint32_t val;
+
+    assert(addr <= GINTSTS2);
+    val = s->glbreg[index];
+
+    switch (addr) {
+    case GRSTCTL:
+        /* clear any self-clearing bits that were set */
+        val &= ~(GRSTCTL_TXFFLSH | GRSTCTL_RXFFLSH | GRSTCTL_IN_TKNQ_FLSH |
+                 GRSTCTL_FRMCNTRRST | GRSTCTL_HSFTRST | GRSTCTL_CSFTRST);
+        s->glbreg[index] = val;
+        break;
+    default:
+        break;
+    }
+
+    trace_usb_dwc2_glbreg_read(addr, glbregnm[index], val);
+    return val;
+}
+
+static void dwc2_glbreg_write(void *ptr, hwaddr addr, int index, uint64_t val,
+                              unsigned size)
+{
+    DWC2State *s = ptr;
+    uint64_t orig = val;
+    uint32_t *mmio;
+    uint32_t old;
+    int iflg = 0;
+
+    assert(addr <= GINTSTS2);
+    mmio = &s->glbreg[index];
+    old = *mmio;
+
+    switch (addr) {
+    case GOTGCTL:
+        /* don't allow setting of read-only bits */
+        val &= ~(GOTGCTL_MULT_VALID_BC_MASK | GOTGCTL_BSESVLD |
+                 GOTGCTL_ASESVLD | GOTGCTL_DBNC_SHORT | GOTGCTL_CONID_B |
+                 GOTGCTL_HSTNEGSCS | GOTGCTL_SESREQSCS);
+        /* don't allow clearing of read-only bits */
+        val |= old & (GOTGCTL_MULT_VALID_BC_MASK | GOTGCTL_BSESVLD |
+                      GOTGCTL_ASESVLD | GOTGCTL_DBNC_SHORT | GOTGCTL_CONID_B |
+                      GOTGCTL_HSTNEGSCS | GOTGCTL_SESREQSCS);
+        break;
+    case GAHBCFG:
+        if ((val & GAHBCFG_GLBL_INTR_EN) && !(old & GAHBCFG_GLBL_INTR_EN)) {
+            iflg = 1;
+        }
+        break;
+    case GRSTCTL:
+        val |= GRSTCTL_AHBIDLE;
+        val &= ~GRSTCTL_DMAREQ;
+        if (!(old & GRSTCTL_TXFFLSH) && (val & GRSTCTL_TXFFLSH)) {
+                /* TODO - TX fifo flush */
+        }
+        if (!(old & GRSTCTL_RXFFLSH) && (val & GRSTCTL_RXFFLSH)) {
+                /* TODO - RX fifo flush */
+        }
+        if (!(old & GRSTCTL_IN_TKNQ_FLSH) && (val & GRSTCTL_IN_TKNQ_FLSH)) {
+                /* TODO - device IN token queue flush */
+        }
+        if (!(old & GRSTCTL_FRMCNTRRST) && (val & GRSTCTL_FRMCNTRRST)) {
+                /* TODO - host frame counter reset */
+        }
+        if (!(old & GRSTCTL_HSFTRST) && (val & GRSTCTL_HSFTRST)) {
+                /* TODO - ? soft reset */
+        }
+        if (!(old & GRSTCTL_CSFTRST) && (val & GRSTCTL_CSFTRST)) {
+                /* TODO - core soft reset */
+        }
+        /* don't allow clearing of self-clearing bits */
+        val |= old & (GRSTCTL_TXFFLSH | GRSTCTL_RXFFLSH |
+                      GRSTCTL_IN_TKNQ_FLSH | GRSTCTL_FRMCNTRRST |
+                      GRSTCTL_HSFTRST | GRSTCTL_CSFTRST);
+        break;
+    case GINTSTS:
+        /* clear the write-1-to-clear bits */
+        val |= ~old;
+        val = ~val;
+        /* don't allow clearing of read-only bits */
+        val |= old & (GINTSTS_PTXFEMP | GINTSTS_HCHINT | GINTSTS_PRTINT |
+                      GINTSTS_OEPINT | GINTSTS_IEPINT | GINTSTS_GOUTNAKEFF |
+                      GINTSTS_GINNAKEFF | GINTSTS_NPTXFEMP | GINTSTS_RXFLVL |
+                      GINTSTS_OTGINT | GINTSTS_CURMODE_HOST);
+        iflg = 1;
+        break;
+    case GINTMSK:
+        iflg = 1;
+        break;
+    default:
+        break;
+    }
+
+    trace_usb_dwc2_glbreg_write(addr, glbregnm[index], orig, old, val);
+    *mmio = val;
+
+    if (iflg) {
+        dwc2_update_irq(s);
+    }
+}
+
+static uint64_t dwc2_fszreg_read(void *ptr, hwaddr addr, int index,
+                                 unsigned size)
+{
+    DWC2State *s = ptr;
+    uint32_t val;
+
+    assert(addr == HPTXFSIZ);
+    val = s->fszreg[index];
+
+    trace_usb_dwc2_fszreg_read(addr, val);
+    return val;
+}
+
+static void dwc2_fszreg_write(void *ptr, hwaddr addr, int index, uint64_t val,
+                              unsigned size)
+{
+    DWC2State *s = ptr;
+    uint64_t orig = val;
+    uint32_t *mmio;
+    uint32_t old;
+
+    assert(addr == HPTXFSIZ);
+    mmio = &s->fszreg[index];
+    old = *mmio;
+
+    trace_usb_dwc2_fszreg_write(addr, orig, old, val);
+    *mmio = val;
+}
+
+static const char *hreg0nm[] = {
+    "HCFG     ", "HFIR     ", "HFNUM    ", "<rsvd>   ", "HPTXSTS  ",
+    "HAINT    ", "HAINTMSK ", "HFLBADDR ", "<rsvd>   ", "<rsvd>   ",
+    "<rsvd>   ", "<rsvd>   ", "<rsvd>   ", "<rsvd>   ", "<rsvd>   ",
+    "<rsvd>   ", "HPRT0    "
+};
+
+static uint64_t dwc2_hreg0_read(void *ptr, hwaddr addr, int index,
+                                unsigned size)
+{
+    DWC2State *s = ptr;
+    uint32_t val;
+
+    assert(addr >= HCFG && addr <= HPRT0);
+    val = s->hreg0[index];
+
+    switch (addr) {
+    case HFNUM:
+        val = (dwc2_get_frame_remaining(s) << HFNUM_FRREM_SHIFT) |
+              (s->hfnum << HFNUM_FRNUM_SHIFT);
+        break;
+    default:
+        break;
+    }
+
+    trace_usb_dwc2_hreg0_read(addr, hreg0nm[index], val);
+    return val;
+}
+
+static void dwc2_hreg0_write(void *ptr, hwaddr addr, int index, uint64_t val,
+                             unsigned size)
+{
+    DWC2State *s = ptr;
+    USBDevice *dev = s->uport.dev;
+    uint64_t orig = val;
+    uint32_t *mmio;
+    uint32_t tval, told, old;
+    int prst = 0;
+    int iflg = 0;
+
+    assert(addr >= HCFG && addr <= HPRT0);
+    mmio = &s->hreg0[index];
+    old = *mmio;
+
+    switch (addr) {
+    case HFIR:
+        break;
+    case HFNUM:
+    case HPTXSTS:
+    case HAINT:
+        fprintf(stderr, "%s: write to read-only register\n", __func__);
+        return;
+    case HAINTMSK:
+        val &= 0xffff;
+        break;
+    case HPRT0:
+        /* don't allow clearing of read-only bits */
+        val |= old & (HPRT0_SPD_MASK | HPRT0_LNSTS_MASK | HPRT0_OVRCURRACT |
+                      HPRT0_CONNSTS);
+        /* don't allow clearing of self-clearing bits */
+        val |= old & (HPRT0_SUSP | HPRT0_RES);
+        /* don't allow setting of self-setting bits */
+        if (!(old & HPRT0_ENA) && (val & HPRT0_ENA)) {
+            val &= ~HPRT0_ENA;
+        }
+        /* clear the write-1-to-clear bits */
+        tval = val & (HPRT0_OVRCURRCHG | HPRT0_ENACHG | HPRT0_ENA |
+                      HPRT0_CONNDET);
+        told = old & (HPRT0_OVRCURRCHG | HPRT0_ENACHG | HPRT0_ENA |
+                      HPRT0_CONNDET);
+        tval |= ~told;
+        tval = ~tval;
+        tval &= (HPRT0_OVRCURRCHG | HPRT0_ENACHG | HPRT0_ENA |
+                 HPRT0_CONNDET);
+        val &= ~(HPRT0_OVRCURRCHG | HPRT0_ENACHG | HPRT0_ENA |
+                 HPRT0_CONNDET);
+        val |= tval;
+        if (!(val & HPRT0_RST) && (old & HPRT0_RST)) {
+            if (dev && dev->attached) {
+                val |= HPRT0_ENA | HPRT0_ENACHG;
+                prst = 1;
+            }
+        }
+        if (val & (HPRT0_OVRCURRCHG | HPRT0_ENACHG | HPRT0_CONNDET)) {
+            iflg = 1;
+        } else {
+            iflg = -1;
+        }
+        break;
+    default:
+        break;
+    }
+
+    if (prst) {
+        trace_usb_dwc2_hreg0_write(addr, hreg0nm[index], orig, old,
+                                   val & ~HPRT0_CONNDET);
+        trace_usb_dwc2_hreg0_action("call usb_port_reset");
+        usb_port_reset(&s->uport);
+        val &= ~HPRT0_CONNDET;
+    } else {
+        trace_usb_dwc2_hreg0_write(addr, hreg0nm[index], orig, old, val);
+    }
+
+    *mmio = val;
+
+    if (iflg > 0) {
+        trace_usb_dwc2_hreg0_action("enable PRTINT");
+        dwc2_raise_global_irq(s, GINTSTS_PRTINT);
+    } else if (iflg < 0) {
+        trace_usb_dwc2_hreg0_action("disable PRTINT");
+        dwc2_lower_global_irq(s, GINTSTS_PRTINT);
+    }
+}
+
+static const char *hreg1nm[] = {
+    "HCCHAR  ", "HCSPLT  ", "HCINT   ", "HCINTMSK", "HCTSIZ  ", "HCDMA   ",
+    "<rsvd>  ", "HCDMAB  "
+};
+
+static uint64_t dwc2_hreg1_read(void *ptr, hwaddr addr, int index,
+                                unsigned size)
+{
+    DWC2State *s = ptr;
+    uint32_t val;
+
+    assert(addr >= HCCHAR(0) && addr <= HCDMAB(DWC2_NB_CHAN - 1));
+    val = s->hreg1[index];
+
+    trace_usb_dwc2_hreg1_read(addr, hreg1nm[index & 7], addr >> 5, val);
+    return val;
+}
+
+static void dwc2_hreg1_write(void *ptr, hwaddr addr, int index, uint64_t val,
+                             unsigned size)
+{
+    DWC2State *s = ptr;
+    uint64_t orig = val;
+    uint32_t *mmio;
+    uint32_t old;
+    int iflg = 0;
+    int enflg = 0;
+    int disflg = 0;
+
+    assert(addr >= HCCHAR(0) && addr <= HCDMAB(DWC2_NB_CHAN - 1));
+    mmio = &s->hreg1[index];
+    old = *mmio;
+
+    switch (HSOTG_REG(0x500) + (addr & 0x1c)) {
+    case HCCHAR(0):
+        if ((val & HCCHAR_CHDIS) && !(old & HCCHAR_CHDIS)) {
+            val &= ~(HCCHAR_CHENA | HCCHAR_CHDIS);
+            disflg = 1;
+        } else {
+            val |= old & HCCHAR_CHDIS;
+            if ((val & HCCHAR_CHENA) && !(old & HCCHAR_CHENA)) {
+                val &= ~HCCHAR_CHDIS;
+                enflg = 1;
+            } else {
+                val |= old & HCCHAR_CHENA;
+            }
+        }
+        break;
+    case HCINT(0):
+        /* clear the write-1-to-clear bits */
+        val |= ~old;
+        val = ~val;
+        val &= ~HCINTMSK_RESERVED14_31;
+        iflg = 1;
+        break;
+    case HCINTMSK(0):
+        val &= ~HCINTMSK_RESERVED14_31;
+        iflg = 1;
+        break;
+    case HCDMAB(0):
+        fprintf(stderr, "%s: write to read-only register\n", __func__);
+        return;
+    default:
+        break;
+    }
+
+    trace_usb_dwc2_hreg1_write(addr, hreg1nm[index & 7], index >> 3, orig,
+                               old, val);
+    *mmio = val;
+
+    if (disflg) {
+        /* set ChHltd in HCINT */
+        s->hreg1[(index & ~7) + 2] |= HCINTMSK_CHHLTD;
+        iflg = 1;
+    }
+
+    if (enflg) {
+        dwc2_enable_chan(s, index & ~7);
+    }
+
+    if (iflg) {
+        dwc2_update_hc_irq(s, index & ~7);
+    }
+}
+
+static const char *pcgregnm[] = {
+        "PCGCTL   ", "PCGCCTL1 "
+};
+
+static uint64_t dwc2_pcgreg_read(void *ptr, hwaddr addr, int index,
+                                 unsigned size)
+{
+    DWC2State *s = ptr;
+    uint32_t val;
+
+    assert(addr >= PCGCTL && addr <= PCGCCTL1);
+    val = s->pcgreg[index];
+
+    trace_usb_dwc2_pcgreg_read(addr, pcgregnm[index], val);
+    return val;
+}
+
+static void dwc2_pcgreg_write(void *ptr, hwaddr addr, int index,
+                              uint64_t val, unsigned size)
+{
+    DWC2State *s = ptr;
+    uint64_t orig = val;
+    uint32_t *mmio;
+    uint32_t old;
+
+    assert(addr >= PCGCTL && addr <= PCGCCTL1);
+    mmio = &s->pcgreg[index];
+    old = *mmio;
+
+    trace_usb_dwc2_pcgreg_write(addr, pcgregnm[index], orig, old, val);
+    *mmio = val;
+}
+
+static uint64_t dwc2_hsotg_read(void *ptr, hwaddr addr, unsigned size)
+{
+    uint64_t val;
+
+    switch (addr) {
+    case HSOTG_REG(0x000) ... HSOTG_REG(0x0fc):
+        val = dwc2_glbreg_read(ptr, addr, (addr - HSOTG_REG(0x000)) >> 2, size);
+        break;
+    case HSOTG_REG(0x100):
+        val = dwc2_fszreg_read(ptr, addr, (addr - HSOTG_REG(0x100)) >> 2, size);
+        break;
+    case HSOTG_REG(0x104) ... HSOTG_REG(0x3fc):
+        /* Gadget-mode registers, just return 0 for now */
+        val = 0;
+        break;
+    case HSOTG_REG(0x400) ... HSOTG_REG(0x4fc):
+        val = dwc2_hreg0_read(ptr, addr, (addr - HSOTG_REG(0x400)) >> 2, size);
+        break;
+    case HSOTG_REG(0x500) ... HSOTG_REG(0x7fc):
+        val = dwc2_hreg1_read(ptr, addr, (addr - HSOTG_REG(0x500)) >> 2, size);
+        break;
+    case HSOTG_REG(0x800) ... HSOTG_REG(0xdfc):
+        /* Gadget-mode registers, just return 0 for now */
+        val = 0;
+        break;
+    case HSOTG_REG(0xe00) ... HSOTG_REG(0xffc):
+        val = dwc2_pcgreg_read(ptr, addr, (addr - HSOTG_REG(0xe00)) >> 2, size);
+        break;
+    default:
+        g_assert_not_reached();
+    }
+
+    return val;
+}
+
+static void dwc2_hsotg_write(void *ptr, hwaddr addr, uint64_t val,
+                             unsigned size)
+{
+    switch (addr) {
+    case HSOTG_REG(0x000) ... HSOTG_REG(0x0fc):
+        dwc2_glbreg_write(ptr, addr, (addr - HSOTG_REG(0x000)) >> 2, val, size);
+        break;
+    case HSOTG_REG(0x100):
+        dwc2_fszreg_write(ptr, addr, (addr - HSOTG_REG(0x100)) >> 2, val, size);
+        break;
+    case HSOTG_REG(0x104) ... HSOTG_REG(0x3fc):
+        /* Gadget-mode registers, do nothing for now */
+        break;
+    case HSOTG_REG(0x400) ... HSOTG_REG(0x4fc):
+        dwc2_hreg0_write(ptr, addr, (addr - HSOTG_REG(0x400)) >> 2, val, size);
+        break;
+    case HSOTG_REG(0x500) ... HSOTG_REG(0x7fc):
+        dwc2_hreg1_write(ptr, addr, (addr - HSOTG_REG(0x500)) >> 2, val, size);
+        break;
+    case HSOTG_REG(0x800) ... HSOTG_REG(0xdfc):
+        /* Gadget-mode registers, do nothing for now */
+        break;
+    case HSOTG_REG(0xe00) ... HSOTG_REG(0xffc):
+        dwc2_pcgreg_write(ptr, addr, (addr - HSOTG_REG(0xe00)) >> 2, val, size);
+        break;
+    default:
+        g_assert_not_reached();
+    }
+}
+
+static const MemoryRegionOps dwc2_mmio_hsotg_ops = {
+    .read = dwc2_hsotg_read,
+    .write = dwc2_hsotg_write,
+    .impl.min_access_size = 4,
+    .impl.max_access_size = 4,
+    .endianness = DEVICE_LITTLE_ENDIAN,
+};
+
+static uint64_t dwc2_hreg2_read(void *ptr, hwaddr addr, unsigned size)
+{
+    /* TODO - implement FIFOs to support slave mode */
+    trace_usb_dwc2_hreg2_read(addr, addr >> 12, 0);
+    return 0;
+}
+
+static void dwc2_hreg2_write(void *ptr, hwaddr addr, uint64_t val,
+                             unsigned size)
+{
+    uint64_t orig = val;
+
+    /* TODO - implement FIFOs to support slave mode */
+    trace_usb_dwc2_hreg2_write(addr, addr >> 12, orig, 0, val);
+}
+
+static const MemoryRegionOps dwc2_mmio_hreg2_ops = {
+    .read = dwc2_hreg2_read,
+    .write = dwc2_hreg2_write,
+    .impl.min_access_size = 4,
+    .impl.max_access_size = 4,
+    .endianness = DEVICE_LITTLE_ENDIAN,
+};
+
+static void dwc2_wakeup_endpoint(USBBus *bus, USBEndpoint *ep,
+                                 unsigned int stream)
+{
+    DWC2State *s = container_of(bus, DWC2State, bus);
+
+    trace_usb_dwc2_wakeup_endpoint(ep, stream);
+
+    /* TODO - do something here? */
+    qemu_bh_schedule(s->async_bh);
+}
+
+static USBBusOps dwc2_bus_ops = {
+    .wakeup_endpoint = dwc2_wakeup_endpoint,
+};
+
+static void dwc2_work_timer(void *opaque)
+{
+    DWC2State *s = opaque;
+
+    trace_usb_dwc2_work_timer();
+    qemu_bh_schedule(s->async_bh);
+}
+
+static void dwc2_reset(DeviceState *dev)
+{
+    DWC2State *s = DWC2_USB(dev);
+    int i;
+
+    trace_usb_dwc2_reset();
+    timer_del(s->frame_timer);
+    qemu_bh_cancel(s->async_bh);
+
+    if (s->uport.dev && s->uport.dev->attached) {
+        usb_detach(&s->uport);
+    }
+
+    dwc2_bus_stop(s);
+
+    s->gotgctl = GOTGCTL_BSESVLD | GOTGCTL_ASESVLD | GOTGCTL_CONID_B;
+    s->gotgint = 0;
+    s->gahbcfg = 0;
+    s->gusbcfg = 5 << GUSBCFG_USBTRDTIM_SHIFT;
+    s->grstctl = GRSTCTL_AHBIDLE;
+    s->gintsts = GINTSTS_CONIDSTSCHNG | GINTSTS_PTXFEMP | GINTSTS_NPTXFEMP |
+                 GINTSTS_CURMODE_HOST;
+    s->gintmsk = 0;
+    s->grxstsr = 0;
+    s->grxstsp = 0;
+    s->grxfsiz = 1024;
+    s->gnptxfsiz = 1024 << FIFOSIZE_DEPTH_SHIFT;
+    s->gnptxsts = (4 << FIFOSIZE_DEPTH_SHIFT) | 1024;
+    s->gi2cctl = GI2CCTL_I2CDATSE0 | GI2CCTL_ACK;
+    s->gpvndctl = 0;
+    s->ggpio = 0;
+    s->guid = 0;
+    s->gsnpsid = 0x4f54294a;
+    s->ghwcfg1 = 0;
+    s->ghwcfg2 = (8 << GHWCFG2_DEV_TOKEN_Q_DEPTH_SHIFT) |
+                 (4 << GHWCFG2_HOST_PERIO_TX_Q_DEPTH_SHIFT) |
+                 (4 << GHWCFG2_NONPERIO_TX_Q_DEPTH_SHIFT) |
+                 GHWCFG2_DYNAMIC_FIFO |
+                 GHWCFG2_PERIO_EP_SUPPORTED |
+                 ((DWC2_NB_CHAN - 1) << GHWCFG2_NUM_HOST_CHAN_SHIFT) |
+                 (GHWCFG2_INT_DMA_ARCH << GHWCFG2_ARCHITECTURE_SHIFT) |
+                 (GHWCFG2_OP_MODE_NO_SRP_CAPABLE_HOST << GHWCFG2_OP_MODE_SHIFT);
+    s->ghwcfg3 = (4096 << GHWCFG3_DFIFO_DEPTH_SHIFT) |
+                 (4 << GHWCFG3_PACKET_SIZE_CNTR_WIDTH_SHIFT) |
+                 (4 << GHWCFG3_XFER_SIZE_CNTR_WIDTH_SHIFT);
+    s->ghwcfg4 = 0;
+    s->glpmcfg = 0;
+    s->gpwrdn = GPWRDN_PWRDNRSTN;
+    s->gdfifocfg = 0;
+    s->gadpctl = 0;
+    s->grefclk = 0;
+    s->gintmsk2 = 0;
+    s->gintsts2 = 0;
+
+    s->hptxfsiz = 500 << FIFOSIZE_DEPTH_SHIFT;
+
+    s->hcfg = 2 << HCFG_RESVALID_SHIFT;
+    s->hfir = 60000;
+    s->hfnum = 0x3fff;
+    s->hptxsts = (16 << TXSTS_QSPCAVAIL_SHIFT) | 32768;
+    s->haint = 0;
+    s->haintmsk = 0;
+    s->hprt0 = 0;
+
+    memset(s->hreg1, 0, sizeof(s->hreg1));
+    memset(s->pcgreg, 0, sizeof(s->pcgreg));
+
+    s->sof_time = 0;
+    s->frame_number = 0;
+    s->fi = USB_FRMINTVL - 1;
+    s->next_chan = 0;
+    s->working = false;
+
+    for (i = 0; i < DWC2_NB_CHAN; i++) {
+        s->packet[i].needs_service = false;
+    }
+
+    dwc2_update_irq(s);
+
+    s->hprt0 = HPRT0_PWR;
+    if (s->uport.dev && s->uport.dev->attached) {
+        usb_attach(&s->uport);
+        usb_device_reset(s->uport.dev);
+    }
+}
+
+static void dwc2_realize(DeviceState *dev, Error **errp)
+{
+    SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
+    DWC2State *s = DWC2_USB(dev);
+    Object *obj;
+    Error *err = NULL;
+
+    obj = object_property_get_link(OBJECT(dev), "dma-mr", &err);
+    if (err) {
+        error_setg(errp, "dwc2: required dma-mr link not found: %s",
+                   error_get_pretty(err));
+        return;
+    }
+    assert(obj != NULL);
+
+    s->dma_mr = MEMORY_REGION(obj);
+    address_space_init(&s->dma_as, s->dma_mr, "dwc2");
+
+    usb_bus_new(&s->bus, sizeof(s->bus), &dwc2_bus_ops, dev);
+    usb_register_port(&s->bus, &s->uport, s, 0, &dwc2_port_ops,
+                      USB_SPEED_MASK_LOW | USB_SPEED_MASK_FULL |
+                      (s->usb_version == 2 ? USB_SPEED_MASK_HIGH : 0));
+    s->uport.dev = 0;
+
+    s->usb_frame_time = NANOSECONDS_PER_SECOND / 1000;          /* 1000000 */
+    if (NANOSECONDS_PER_SECOND >= USB_HZ_FS) {
+        s->usb_bit_time = NANOSECONDS_PER_SECOND / USB_HZ_FS;   /* 83.3 */
+    } else {
+        s->usb_bit_time = 1;
+    }
+
+    s->fi = USB_FRMINTVL - 1;
+    s->eof_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, dwc2_frame_boundary, s);
+    s->frame_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, dwc2_work_timer, s);
+    s->async_bh = qemu_bh_new(dwc2_work_bh, s);
+
+    sysbus_init_irq(sbd, &s->irq);
+}
+
+static void dwc2_init(Object *obj)
+{
+    SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
+    DWC2State *s = DWC2_USB(obj);
+
+    memory_region_init(&s->container, obj, "dwc2", DWC2_MMIO_SIZE);
+    sysbus_init_mmio(sbd, &s->container);
+
+    memory_region_init_io(&s->hsotg, obj, &dwc2_mmio_hsotg_ops, s,
+                          "dwc2-io", 4 * KiB);
+    memory_region_add_subregion(&s->container, 0x0000, &s->hsotg);
+
+    memory_region_init_io(&s->fifos, obj, &dwc2_mmio_hreg2_ops, s,
+                          "dwc2-fifo", 64 * KiB);
+    memory_region_add_subregion(&s->container, 0x1000, &s->fifos);
+}
+
+static const VMStateDescription vmstate_dwc2_state_packet = {
+    .name = "dwc2/packet",
+    .version_id = 1,
+    .minimum_version_id = 1,
+    .fields = (VMStateField[]) {
+        VMSTATE_UINT32(devadr, DWC2Packet),
+        VMSTATE_UINT32(epnum, DWC2Packet),
+        VMSTATE_UINT32(epdir, DWC2Packet),
+        VMSTATE_UINT32(mps, DWC2Packet),
+        VMSTATE_UINT32(pid, DWC2Packet),
+        VMSTATE_UINT32(index, DWC2Packet),
+        VMSTATE_UINT32(pcnt, DWC2Packet),
+        VMSTATE_UINT32(len, DWC2Packet),
+        VMSTATE_INT32(async, DWC2Packet),
+        VMSTATE_BOOL(small, DWC2Packet),
+        VMSTATE_BOOL(needs_service, DWC2Packet),
+        VMSTATE_END_OF_LIST()
+    },
+};
+
+const VMStateDescription vmstate_dwc2_state = {
+    .name = "dwc2",
+    .version_id = 1,
+    .minimum_version_id = 1,
+    .fields = (VMStateField[]) {
+        VMSTATE_UINT32_ARRAY(glbreg, DWC2State,
+                             DWC2_GLBREG_SIZE / sizeof(uint32_t)),
+        VMSTATE_UINT32_ARRAY(fszreg, DWC2State,
+                             DWC2_FSZREG_SIZE / sizeof(uint32_t)),
+        VMSTATE_UINT32_ARRAY(hreg0, DWC2State,
+                             DWC2_HREG0_SIZE / sizeof(uint32_t)),
+        VMSTATE_UINT32_ARRAY(hreg1, DWC2State,
+                             DWC2_HREG1_SIZE / sizeof(uint32_t)),
+        VMSTATE_UINT32_ARRAY(pcgreg, DWC2State,
+                             DWC2_PCGREG_SIZE / sizeof(uint32_t)),
+
+        VMSTATE_TIMER_PTR(eof_timer, DWC2State),
+        VMSTATE_TIMER_PTR(frame_timer, DWC2State),
+        VMSTATE_INT64(sof_time, DWC2State),
+        VMSTATE_INT64(usb_frame_time, DWC2State),
+        VMSTATE_INT64(usb_bit_time, DWC2State),
+        VMSTATE_UINT32(usb_version, DWC2State),
+        VMSTATE_UINT16(frame_number, DWC2State),
+        VMSTATE_UINT16(fi, DWC2State),
+        VMSTATE_UINT16(next_chan, DWC2State),
+        VMSTATE_BOOL(working, DWC2State),
+
+        VMSTATE_STRUCT_ARRAY(packet, DWC2State, DWC2_NB_CHAN, 1,
+                             vmstate_dwc2_state_packet, DWC2Packet),
+        VMSTATE_UINT8_2DARRAY(usb_buf, DWC2State, DWC2_NB_CHAN,
+                              DWC2_MAX_XFER_SIZE),
+
+        VMSTATE_END_OF_LIST()
+    }
+};
+
+static Property dwc2_usb_properties[] = {
+    DEFINE_PROP_UINT32("usb_version", DWC2State, usb_version, 2),
+    DEFINE_PROP_END_OF_LIST(),
+};
+
+static void dwc2_class_init(ObjectClass *klass, void *data)
+{
+    DeviceClass *dc = DEVICE_CLASS(klass);
+
+    dc->realize = dwc2_realize;
+    dc->reset = dwc2_reset;
+    dc->vmsd = &vmstate_dwc2_state;
+    set_bit(DEVICE_CATEGORY_USB, dc->categories);
+    device_class_set_props(dc, dwc2_usb_properties);
+}
+
+static const TypeInfo dwc2_usb_type_info = {
+    .name          = TYPE_DWC2_USB,
+    .parent        = TYPE_SYS_BUS_DEVICE,
+    .instance_size = sizeof(DWC2State),
+    .instance_init = dwc2_init,
+    .class_init    = dwc2_class_init,
+};
+
+static void dwc2_usb_register_types(void)
+{
+    type_register_static(&dwc2_usb_type_info);
+}
+
+type_init(dwc2_usb_register_types)
diff --git a/hw/usb/Kconfig b/hw/usb/Kconfig
index 464348ba1429..d4d8c37c2897 100644
--- a/hw/usb/Kconfig
+++ b/hw/usb/Kconfig
@@ -46,6 +46,11 @@ config USB_MUSB
     bool
     select USB
 
+config USB_DWC2
+    bool
+    default y
+    select USB
+
 config TUSB6010
     bool
     select USB_MUSB
diff --git a/hw/usb/Makefile.objs b/hw/usb/Makefile.objs
index 66835e5bf732..fa5c3fa1b877 100644
--- a/hw/usb/Makefile.objs
+++ b/hw/usb/Makefile.objs
@@ -12,6 +12,7 @@ common-obj-$(CONFIG_USB_EHCI_SYSBUS) += hcd-ehci-sysbus.o
 common-obj-$(CONFIG_USB_XHCI) += hcd-xhci.o
 common-obj-$(CONFIG_USB_XHCI_NEC) += hcd-xhci-nec.o
 common-obj-$(CONFIG_USB_MUSB) += hcd-musb.o
+common-obj-$(CONFIG_USB_DWC2) += hcd-dwc2.o
 
 common-obj-$(CONFIG_TUSB6010) += tusb6010.o
 common-obj-$(CONFIG_IMX)      += chipidea.o
diff --git a/hw/usb/trace-events b/hw/usb/trace-events
index 1c24d82c09c0..58dabc05d781 100644
--- a/hw/usb/trace-events
+++ b/hw/usb/trace-events
@@ -176,6 +176,53 @@ usb_xhci_xfer_error(void *xfer, uint32_t ret) "%p: ret %d"
 usb_xhci_unimplemented(const char *item, int nr) "%s (0x%x)"
 usb_xhci_enforced_limit(const char *item) "%s"
 
+# hcd-dwc2.c
+usb_dwc2_update_irq(uint32_t level) "level=%d"
+usb_dwc2_raise_global_irq(uint32_t intr) "0x%08x"
+usb_dwc2_lower_global_irq(uint32_t intr) "0x%08x"
+usb_dwc2_raise_host_irq(uint32_t intr) "0x%04x"
+usb_dwc2_lower_host_irq(uint32_t intr) "0x%04x"
+usb_dwc2_sof(int64_t next) "next SOF %" PRId64
+usb_dwc2_bus_start(void) "start SOFs"
+usb_dwc2_bus_stop(void) "stop SOFs"
+usb_dwc2_find_device(uint8_t addr) "%d"
+usb_dwc2_port_disabled(uint32_t pnum) "port %d disabled"
+usb_dwc2_device_found(uint32_t pnum) "device found on port %d"
+usb_dwc2_device_not_found(void) "device not found"
+usb_dwc2_handle_packet(uint32_t chan, void *dev, void *pkt, uint32_t ep, const char *type, const char *dir, uint32_t mps, uint32_t len, uint32_t pcnt) "ch %d dev %p pkt %p ep %d type %s dir %s mps %d len %d pcnt %d"
+usb_dwc2_memory_read(uint32_t addr, uint32_t len) "addr %d len %d"
+usb_dwc2_packet_status(const char *status, uint32_t len) "status %s len %d"
+usb_dwc2_async_packet(void *pkt, uint32_t chan, void *dev, uint32_t ep, const char *dir, uint32_t len) "pkt %p ch %d dev %p ep %d %s len %d"
+usb_dwc2_memory_write(uint32_t addr, uint32_t len) "addr %d len %d"
+usb_dwc2_packet_done(const char *status, uint32_t actual, uint32_t len, uint32_t pcnt) "status %s actual %d len %d pcnt %d"
+usb_dwc2_packet_next(const char *status, uint32_t len, uint32_t pcnt) "status %s len %d pcnt %d"
+usb_dwc2_attach(void *port) "port %p"
+usb_dwc2_attach_speed(const char *speed) "%s-speed device attached"
+usb_dwc2_detach(void *port) "port %p"
+usb_dwc2_child_detach(void *port, void *child) "port %p child %p"
+usb_dwc2_wakeup(void *port) "port %p"
+usb_dwc2_async_packet_complete(void *port, void *pkt, uint32_t chan, void *dev, uint32_t ep, const char *dir, uint32_t len) "port %p packet %p ch %d dev %p ep %d %s len %d"
+usb_dwc2_work_bh(void) ""
+usb_dwc2_work_bh_service(uint32_t first, uint32_t current, void *dev, uint32_t ep) "first %d servicing %d dev %p ep %d"
+usb_dwc2_work_bh_next(uint32_t chan) "next %d"
+usb_dwc2_enable_chan(uint32_t chan, void *dev, void *pkt, uint32_t ep) "ch %d dev %p pkt %p ep %d"
+usb_dwc2_glbreg_read(uint64_t addr, const char *reg, uint32_t val) " 0x%04" PRIx64 " %s val 0x%08x"
+usb_dwc2_glbreg_write(uint64_t addr, const char *reg, uint64_t val, uint32_t old, uint64_t result) "0x%04" PRIx64 " %s val 0x%08" PRIx64 " old 0x%08x result 0x%08" PRIx64
+usb_dwc2_fszreg_read(uint64_t addr, uint32_t val) " 0x%04" PRIx64 " HPTXFSIZ  val 0x%08x"
+usb_dwc2_fszreg_write(uint64_t addr, uint64_t val, uint32_t old, uint64_t result) "0x%04" PRIx64 " HPTXFSIZ  val 0x%08" PRIx64 " old 0x%08x result 0x%08" PRIx64
+usb_dwc2_hreg0_read(uint64_t addr, const char *reg, uint32_t val) "  0x%04" PRIx64 " %s val 0x%08x"
+usb_dwc2_hreg0_write(uint64_t addr, const char *reg, uint64_t val, uint32_t old, uint64_t result) " 0x%04" PRIx64 " %s val 0x%08" PRIx64 " old 0x%08x result 0x%08" PRIx64
+usb_dwc2_hreg1_read(uint64_t addr, const char *reg, uint64_t chan, uint32_t val) "  0x%04" PRIx64 " %s%" PRId64 " val 0x%08x"
+usb_dwc2_hreg1_write(uint64_t addr, const char *reg, uint64_t chan, uint64_t val, uint32_t old, uint64_t result) " 0x%04" PRIx64 " %s%" PRId64 " val 0x%08" PRIx64 " old 0x%08x result 0x%08" PRIx64
+usb_dwc2_pcgreg_read(uint64_t addr, const char *reg, uint32_t val) " 0x%04" PRIx64 " %s val 0x%08x"
+usb_dwc2_pcgreg_write(uint64_t addr, const char *reg, uint64_t val, uint32_t old, uint64_t result) "0x%04" PRIx64 " %s val 0x%08" PRIx64 " old 0x%08x result 0x%08" PRIx64
+usb_dwc2_hreg2_read(uint64_t addr, uint64_t fifo, uint32_t val) "  0x%04" PRIx64 " FIFO%" PRId64 "     val 0x%08x"
+usb_dwc2_hreg2_write(uint64_t addr, uint64_t fifo, uint64_t val, uint32_t old, uint64_t result) " 0x%04" PRIx64 " FIFO%" PRId64 "     val 0x%08" PRIx64 " old 0x%08x result 0x%08" PRIx64
+usb_dwc2_hreg0_action(const char *s) "%s"
+usb_dwc2_wakeup_endpoint(void *ep, uint32_t stream) "endp %p stream %d"
+usb_dwc2_work_timer(void) ""
+usb_dwc2_reset(void) "=== RESET ==="
+
 # desc.c
 usb_desc_device(int addr, int len, int ret) "dev %d query device, len %d, ret %d"
 usb_desc_device_qualifier(int addr, int len, int ret) "dev %d query device qualifier, len %d, ret %d"
-- 
2.18.4



^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PULL 5/7] usb: add short-packet handling to usb-storage driver
  2020-05-14 12:23 [PULL 0/7] Usb 20200514 patches Gerd Hoffmann
                   ` (3 preceding siblings ...)
  2020-05-14 12:23 ` [PULL 4/7] dwc-hsotg (dwc2) USB host controller emulation Gerd Hoffmann
@ 2020-05-14 12:23 ` Gerd Hoffmann
  2020-05-14 12:23 ` [PULL 6/7] wire in the dwc-hsotg (dwc2) USB host controller emulation Gerd Hoffmann
                   ` (3 subsequent siblings)
  8 siblings, 0 replies; 10+ messages in thread
From: Gerd Hoffmann @ 2020-05-14 12:23 UTC (permalink / raw)
  To: qemu-devel
  Cc: Peter Maydell, Andrew Baumann, Paul Zimmerman, qemu-arm,
	Gerd Hoffmann, Philippe Mathieu-Daudé

From: Paul Zimmerman <pauldzim@gmail.com>

The dwc-hsotg (dwc2) USB host depends on a short packet to
indicate the end of an IN transfer. The usb-storage driver
currently doesn't provide this, so fix it.

I have tested this change rather extensively using a PC
emulation with xhci, ehci, and uhci controllers, and have
not observed any regressions.

Signed-off-by: Paul Zimmerman <pauldzim@gmail.com>
Message-id: 20200512064900.28554-6-pauldzim@gmail.com
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 hw/usb/dev-storage.c | 15 ++++++++++++++-
 1 file changed, 14 insertions(+), 1 deletion(-)

diff --git a/hw/usb/dev-storage.c b/hw/usb/dev-storage.c
index 5c4b57b06b6f..ae3c5500424f 100644
--- a/hw/usb/dev-storage.c
+++ b/hw/usb/dev-storage.c
@@ -229,6 +229,9 @@ static void usb_msd_copy_data(MSDState *s, USBPacket *p)
     usb_packet_copy(p, scsi_req_get_buf(s->req) + s->scsi_off, len);
     s->scsi_len -= len;
     s->scsi_off += len;
+    if (len > s->data_len) {
+        len = s->data_len;
+    }
     s->data_len -= len;
     if (s->scsi_len == 0 || s->data_len == 0) {
         scsi_req_continue(s->req);
@@ -303,6 +306,9 @@ static void usb_msd_command_complete(SCSIRequest *req, uint32_t status, size_t r
             if (s->data_len) {
                 int len = (p->iov.size - p->actual_length);
                 usb_packet_skip(p, len);
+                if (len > s->data_len) {
+                    len = s->data_len;
+                }
                 s->data_len -= len;
             }
             if (s->data_len == 0) {
@@ -469,6 +475,9 @@ static void usb_msd_handle_data(USBDevice *dev, USBPacket *p)
                 int len = p->iov.size - p->actual_length;
                 if (len) {
                     usb_packet_skip(p, len);
+                    if (len > s->data_len) {
+                        len = s->data_len;
+                    }
                     s->data_len -= len;
                     if (s->data_len == 0) {
                         s->mode = USB_MSDM_CSW;
@@ -528,13 +537,17 @@ static void usb_msd_handle_data(USBDevice *dev, USBPacket *p)
                 int len = p->iov.size - p->actual_length;
                 if (len) {
                     usb_packet_skip(p, len);
+                    if (len > s->data_len) {
+                        len = s->data_len;
+                    }
                     s->data_len -= len;
                     if (s->data_len == 0) {
                         s->mode = USB_MSDM_CSW;
                     }
                 }
             }
-            if (p->actual_length < p->iov.size) {
+            if (p->actual_length < p->iov.size && (p->short_not_ok ||
+                    s->scsi_len >= p->ep->max_packet_size)) {
                 DPRINTF("Deferring packet %p [wait data-in]\n", p);
                 s->packet = p;
                 p->status = USB_RET_ASYNC;
-- 
2.18.4



^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PULL 6/7] wire in the dwc-hsotg (dwc2) USB host controller emulation
  2020-05-14 12:23 [PULL 0/7] Usb 20200514 patches Gerd Hoffmann
                   ` (4 preceding siblings ...)
  2020-05-14 12:23 ` [PULL 5/7] usb: add short-packet handling to usb-storage driver Gerd Hoffmann
@ 2020-05-14 12:23 ` Gerd Hoffmann
  2020-05-14 12:23 ` [PULL 7/7] raspi2 acceptance test: add test for dwc-hsotg (dwc2) USB host Gerd Hoffmann
                   ` (2 subsequent siblings)
  8 siblings, 0 replies; 10+ messages in thread
From: Gerd Hoffmann @ 2020-05-14 12:23 UTC (permalink / raw)
  To: qemu-devel
  Cc: Peter Maydell, Andrew Baumann, Paul Zimmerman, qemu-arm,
	Gerd Hoffmann, Philippe Mathieu-Daudé

From: Paul Zimmerman <pauldzim@gmail.com>

Wire the dwc-hsotg (dwc2) emulation into Qemu

Reviewed-by: Philippe Mathieu-Daude <f4bug@amsat.org>
Signed-off-by: Paul Zimmerman <pauldzim@gmail.com>
Message-id: 20200512064900.28554-7-pauldzim@gmail.com
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 include/hw/arm/bcm2835_peripherals.h |  3 ++-
 hw/arm/bcm2835_peripherals.c         | 21 ++++++++++++++++++++-
 2 files changed, 22 insertions(+), 2 deletions(-)

diff --git a/include/hw/arm/bcm2835_peripherals.h b/include/hw/arm/bcm2835_peripherals.h
index 7a7a8f614146..48a0ad163358 100644
--- a/include/hw/arm/bcm2835_peripherals.h
+++ b/include/hw/arm/bcm2835_peripherals.h
@@ -27,6 +27,7 @@
 #include "hw/sd/bcm2835_sdhost.h"
 #include "hw/gpio/bcm2835_gpio.h"
 #include "hw/timer/bcm2835_systmr.h"
+#include "hw/usb/hcd-dwc2.h"
 #include "hw/misc/unimp.h"
 
 #define TYPE_BCM2835_PERIPHERALS "bcm2835-peripherals"
@@ -67,7 +68,7 @@ typedef struct BCM2835PeripheralState {
     UnimplementedDeviceState ave0;
     UnimplementedDeviceState bscsl;
     UnimplementedDeviceState smi;
-    UnimplementedDeviceState dwc2;
+    DWC2State dwc2;
     UnimplementedDeviceState sdramc;
 } BCM2835PeripheralState;
 
diff --git a/hw/arm/bcm2835_peripherals.c b/hw/arm/bcm2835_peripherals.c
index 5e2c832d95f6..3b554cfac0c8 100644
--- a/hw/arm/bcm2835_peripherals.c
+++ b/hw/arm/bcm2835_peripherals.c
@@ -128,6 +128,13 @@ static void bcm2835_peripherals_init(Object *obj)
     sysbus_init_child_obj(obj, "mphi", &s->mphi, sizeof(s->mphi),
                           TYPE_BCM2835_MPHI);
 
+    /* DWC2 */
+    sysbus_init_child_obj(obj, "dwc2", &s->dwc2, sizeof(s->dwc2),
+                          TYPE_DWC2_USB);
+
+    object_property_add_const_link(OBJECT(&s->dwc2), "dma-mr",
+                                   OBJECT(&s->gpu_bus_mr), &error_abort);
+
     object_property_add_const_link(OBJECT(&s->gpio), "sdbus-sdhci",
                                    OBJECT(&s->sdhci.sdbus), &error_abort);
     object_property_add_const_link(OBJECT(&s->gpio), "sdbus-sdhost",
@@ -385,6 +392,19 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp)
         qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
                                INTERRUPT_HOSTPORT));
 
+    /* DWC2 */
+    object_property_set_bool(OBJECT(&s->dwc2), true, "realized", &err);
+    if (err) {
+        error_propagate(errp, err);
+        return;
+    }
+
+    memory_region_add_subregion(&s->peri_mr, USB_OTG_OFFSET,
+                sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->dwc2), 0));
+    sysbus_connect_irq(SYS_BUS_DEVICE(&s->dwc2), 0,
+        qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
+                               INTERRUPT_USB));
+
     create_unimp(s, &s->armtmr, "bcm2835-sp804", ARMCTRL_TIMER0_1_OFFSET, 0x40);
     create_unimp(s, &s->cprman, "bcm2835-cprman", CPRMAN_OFFSET, 0x1000);
     create_unimp(s, &s->a2w, "bcm2835-a2w", A2W_OFFSET, 0x1000);
@@ -398,7 +418,6 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp)
     create_unimp(s, &s->otp, "bcm2835-otp", OTP_OFFSET, 0x80);
     create_unimp(s, &s->dbus, "bcm2835-dbus", DBUS_OFFSET, 0x8000);
     create_unimp(s, &s->ave0, "bcm2835-ave0", AVE0_OFFSET, 0x8000);
-    create_unimp(s, &s->dwc2, "dwc-usb2", USB_OTG_OFFSET, 0x1000);
     create_unimp(s, &s->sdramc, "bcm2835-sdramc", SDRAMC_OFFSET, 0x100);
 }
 
-- 
2.18.4



^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PULL 7/7] raspi2 acceptance test: add test for dwc-hsotg (dwc2) USB host
  2020-05-14 12:23 [PULL 0/7] Usb 20200514 patches Gerd Hoffmann
                   ` (5 preceding siblings ...)
  2020-05-14 12:23 ` [PULL 6/7] wire in the dwc-hsotg (dwc2) USB host controller emulation Gerd Hoffmann
@ 2020-05-14 12:23 ` Gerd Hoffmann
  2020-05-14 12:43 ` [PULL 0/7] Usb 20200514 patches Peter Maydell
  2020-05-14 16:45 ` no-reply
  8 siblings, 0 replies; 10+ messages in thread
From: Gerd Hoffmann @ 2020-05-14 12:23 UTC (permalink / raw)
  To: qemu-devel
  Cc: Peter Maydell, Andrew Baumann, Paul Zimmerman, qemu-arm,
	Gerd Hoffmann, Philippe Mathieu-Daudé

From: Paul Zimmerman <pauldzim@gmail.com>

Add a check for functional dwc-hsotg (dwc2) USB host emulation to
the Raspi 2 acceptance test

Reviewed-by: Philippe Mathieu-Daude <f4bug@amsat.org>
Signed-off-by: Paul Zimmerman <pauldzim@gmail.com>
Message-id: 20200512064900.28554-8-pauldzim@gmail.com
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 tests/acceptance/boot_linux_console.py | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/tests/acceptance/boot_linux_console.py b/tests/acceptance/boot_linux_console.py
index c6b06a1a138f..abb5ca3dd4ae 100644
--- a/tests/acceptance/boot_linux_console.py
+++ b/tests/acceptance/boot_linux_console.py
@@ -378,13 +378,18 @@ class BootLinuxConsole(Test):
 
         self.vm.set_console()
         kernel_command_line = (self.KERNEL_COMMON_COMMAND_LINE +
-                               serial_kernel_cmdline[uart_id])
+                               serial_kernel_cmdline[uart_id] +
+                               ' root=/dev/mmcblk0p2 rootwait ' +
+                               'dwc_otg.fiq_fsm_enable=0')
         self.vm.add_args('-kernel', kernel_path,
                          '-dtb', dtb_path,
-                         '-append', kernel_command_line)
+                         '-append', kernel_command_line,
+                         '-device', 'usb-kbd')
         self.vm.launch()
         console_pattern = 'Kernel command line: %s' % kernel_command_line
         self.wait_for_console_pattern(console_pattern)
+        console_pattern = 'Product: QEMU USB Keyboard'
+        self.wait_for_console_pattern(console_pattern)
 
     def test_arm_raspi2_uart0(self):
         """
-- 
2.18.4



^ permalink raw reply related	[flat|nested] 10+ messages in thread

* Re: [PULL 0/7] Usb 20200514 patches
  2020-05-14 12:23 [PULL 0/7] Usb 20200514 patches Gerd Hoffmann
                   ` (6 preceding siblings ...)
  2020-05-14 12:23 ` [PULL 7/7] raspi2 acceptance test: add test for dwc-hsotg (dwc2) USB host Gerd Hoffmann
@ 2020-05-14 12:43 ` Peter Maydell
  2020-05-14 16:45 ` no-reply
  8 siblings, 0 replies; 10+ messages in thread
From: Peter Maydell @ 2020-05-14 12:43 UTC (permalink / raw)
  To: Gerd Hoffmann
  Cc: qemu-arm, Philippe Mathieu-Daudé, QEMU Developers, Andrew Baumann

On Thu, 14 May 2020 at 13:23, Gerd Hoffmann <kraxel@redhat.com> wrote:
>
> The following changes since commit d5c75ec500d96f1d93447f990cd5a4ef5ba27fae:
>
>   Merge remote-tracking branch 'remotes/stefanberger/tags/pull-tpm-2020-05-08-1' into staging (2020-05-12 17:00:10 +0100)
>
> are available in the Git repository at:
>
>   git://git.kraxel.org/qemu tags/usb-20200514-pull-request
>
> for you to fetch changes up to 8b2b45c506f4d71b831473d8de93b3cedaea4844:
>
>   raspi2 acceptance test: add test for dwc-hsotg (dwc2) USB host (2020-05-13 11:06:37 +0200)
>
> ----------------------------------------------------------------
> usb: add dwc2 emulation for raspi machines.
>
> ----------------------------------------------------------------
>
> Paul Zimmerman (7):
>   raspi: add BCM2835 SOC MPHI emulation
>   dwc-hsotg (dwc2) USB host controller register definitions
>   dwc-hsotg (dwc2) USB host controller state definitions
>   dwc-hsotg (dwc2) USB host controller emulation
>   usb: add short-packet handling to usb-storage driver
>   wire in the dwc-hsotg (dwc2) USB host controller emulation
>   raspi2 acceptance test: add test for dwc-hsotg (dwc2) USB host

Could we wait til we've had the patches reviewed first, please?

thanks
-- PMM


^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PULL 0/7] Usb 20200514 patches
  2020-05-14 12:23 [PULL 0/7] Usb 20200514 patches Gerd Hoffmann
                   ` (7 preceding siblings ...)
  2020-05-14 12:43 ` [PULL 0/7] Usb 20200514 patches Peter Maydell
@ 2020-05-14 16:45 ` no-reply
  8 siblings, 0 replies; 10+ messages in thread
From: no-reply @ 2020-05-14 16:45 UTC (permalink / raw)
  To: kraxel
  Cc: peter.maydell, qemu-devel, Andrew.Baumann, qemu-arm, kraxel, philmd

Patchew URL: https://patchew.org/QEMU/20200514122334.25089-1-kraxel@redhat.com/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Message-id: 20200514122334.25089-1-kraxel@redhat.com
Subject: [PULL 0/7] Usb 20200514 patches
Type: series

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

From https://github.com/patchew-project/qemu
   035b448..0ffd3d6  master     -> master
Switched to a new branch 'test'
a9690c1 raspi2 acceptance test: add test for dwc-hsotg (dwc2) USB host
0135f05 wire in the dwc-hsotg (dwc2) USB host controller emulation
47c6b53 usb: add short-packet handling to usb-storage driver
15b6d6f dwc-hsotg (dwc2) USB host controller emulation
6888aac dwc-hsotg (dwc2) USB host controller state definitions
3a4176b dwc-hsotg (dwc2) USB host controller register definitions
b61f205 raspi: add BCM2835 SOC MPHI emulation

=== OUTPUT BEGIN ===
1/7 Checking commit b61f2055e776 (raspi: add BCM2835 SOC MPHI emulation)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#65: 
new file mode 100644

WARNING: line over 80 characters
#213: FILE: hw/misc/bcm2835_mphi.c:144:
+    memory_region_init_io(&s->iomem, obj, &mphi_mmio_ops, s, "mphi", MPHI_MMIO_SIZE);

total: 0 errors, 2 warnings, 278 lines checked

Patch 1/7 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
2/7 Checking commit 3a4176b5e43c (dwc-hsotg (dwc2) USB host controller register definitions)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#20: 
new file mode 100644

WARNING: architecture specific defines should be avoided
#62: FILE: include/hw/usb/dwc2-regs.h:38:
+#ifndef __DWC2_HW_H__

ERROR: code indent should never use tabs
#65: FILE: include/hw/usb/dwc2-regs.h:41:
+#define HSOTG_REG(x)^I(x)$

ERROR: code indent should never use tabs
#67: FILE: include/hw/usb/dwc2-regs.h:43:
+#define GOTGCTL^I^I^I^IHSOTG_REG(0x000)$

ERROR: code indent should never use tabs
#68: FILE: include/hw/usb/dwc2-regs.h:44:
+#define GOTGCTL_CHIRPEN^I^I^IBIT(27)$

ERROR: code indent should never use tabs
#69: FILE: include/hw/usb/dwc2-regs.h:45:
+#define GOTGCTL_MULT_VALID_BC_MASK^I(0x1f << 22)$

ERROR: code indent should never use tabs
#70: FILE: include/hw/usb/dwc2-regs.h:46:
+#define GOTGCTL_MULT_VALID_BC_SHIFT^I22$

ERROR: code indent should never use tabs
#71: FILE: include/hw/usb/dwc2-regs.h:47:
+#define GOTGCTL_OTGVER^I^I^IBIT(20)$

ERROR: code indent should never use tabs
#72: FILE: include/hw/usb/dwc2-regs.h:48:
+#define GOTGCTL_BSESVLD^I^I^IBIT(19)$

ERROR: code indent should never use tabs
#73: FILE: include/hw/usb/dwc2-regs.h:49:
+#define GOTGCTL_ASESVLD^I^I^IBIT(18)$

ERROR: code indent should never use tabs
#74: FILE: include/hw/usb/dwc2-regs.h:50:
+#define GOTGCTL_DBNC_SHORT^I^IBIT(17)$

ERROR: code indent should never use tabs
#75: FILE: include/hw/usb/dwc2-regs.h:51:
+#define GOTGCTL_CONID_B^I^I^IBIT(16)$

ERROR: code indent should never use tabs
#76: FILE: include/hw/usb/dwc2-regs.h:52:
+#define GOTGCTL_DBNCE_FLTR_BYPASS^IBIT(15)$

ERROR: code indent should never use tabs
#77: FILE: include/hw/usb/dwc2-regs.h:53:
+#define GOTGCTL_DEVHNPEN^I^IBIT(11)$

ERROR: code indent should never use tabs
#78: FILE: include/hw/usb/dwc2-regs.h:54:
+#define GOTGCTL_HSTSETHNPEN^I^IBIT(10)$

ERROR: code indent should never use tabs
#79: FILE: include/hw/usb/dwc2-regs.h:55:
+#define GOTGCTL_HNPREQ^I^I^IBIT(9)$

ERROR: code indent should never use tabs
#80: FILE: include/hw/usb/dwc2-regs.h:56:
+#define GOTGCTL_HSTNEGSCS^I^IBIT(8)$

ERROR: code indent should never use tabs
#81: FILE: include/hw/usb/dwc2-regs.h:57:
+#define GOTGCTL_SESREQ^I^I^IBIT(1)$

ERROR: code indent should never use tabs
#82: FILE: include/hw/usb/dwc2-regs.h:58:
+#define GOTGCTL_SESREQSCS^I^IBIT(0)$

ERROR: code indent should never use tabs
#84: FILE: include/hw/usb/dwc2-regs.h:60:
+#define GOTGINT^I^I^I^IHSOTG_REG(0x004)$

ERROR: code indent should never use tabs
#85: FILE: include/hw/usb/dwc2-regs.h:61:
+#define GOTGINT_DBNCE_DONE^I^IBIT(19)$

ERROR: code indent should never use tabs
#86: FILE: include/hw/usb/dwc2-regs.h:62:
+#define GOTGINT_A_DEV_TOUT_CHG^I^IBIT(18)$

ERROR: code indent should never use tabs
#87: FILE: include/hw/usb/dwc2-regs.h:63:
+#define GOTGINT_HST_NEG_DET^I^IBIT(17)$

ERROR: code indent should never use tabs
#88: FILE: include/hw/usb/dwc2-regs.h:64:
+#define GOTGINT_HST_NEG_SUC_STS_CHNG^IBIT(9)$

ERROR: code indent should never use tabs
#89: FILE: include/hw/usb/dwc2-regs.h:65:
+#define GOTGINT_SES_REQ_SUC_STS_CHNG^IBIT(8)$

ERROR: code indent should never use tabs
#90: FILE: include/hw/usb/dwc2-regs.h:66:
+#define GOTGINT_SES_END_DET^I^IBIT(2)$

ERROR: code indent should never use tabs
#92: FILE: include/hw/usb/dwc2-regs.h:68:
+#define GAHBCFG^I^I^I^IHSOTG_REG(0x008)$

ERROR: code indent should never use tabs
#93: FILE: include/hw/usb/dwc2-regs.h:69:
+#define GAHBCFG_AHB_SINGLE^I^IBIT(23)$

ERROR: code indent should never use tabs
#94: FILE: include/hw/usb/dwc2-regs.h:70:
+#define GAHBCFG_NOTI_ALL_DMA_WRIT^IBIT(22)$

ERROR: code indent should never use tabs
#95: FILE: include/hw/usb/dwc2-regs.h:71:
+#define GAHBCFG_REM_MEM_SUPP^I^IBIT(21)$

ERROR: code indent should never use tabs
#96: FILE: include/hw/usb/dwc2-regs.h:72:
+#define GAHBCFG_P_TXF_EMP_LVL^I^IBIT(8)$

ERROR: code indent should never use tabs
#97: FILE: include/hw/usb/dwc2-regs.h:73:
+#define GAHBCFG_NP_TXF_EMP_LVL^I^IBIT(7)$

ERROR: code indent should never use tabs
#98: FILE: include/hw/usb/dwc2-regs.h:74:
+#define GAHBCFG_DMA_EN^I^I^IBIT(5)$

ERROR: code indent should never use tabs
#99: FILE: include/hw/usb/dwc2-regs.h:75:
+#define GAHBCFG_HBSTLEN_MASK^I^I(0xf << 1)$

ERROR: code indent should never use tabs
#100: FILE: include/hw/usb/dwc2-regs.h:76:
+#define GAHBCFG_HBSTLEN_SHIFT^I^I1$

ERROR: code indent should never use tabs
#101: FILE: include/hw/usb/dwc2-regs.h:77:
+#define GAHBCFG_HBSTLEN_SINGLE^I^I0$

ERROR: code indent should never use tabs
#102: FILE: include/hw/usb/dwc2-regs.h:78:
+#define GAHBCFG_HBSTLEN_INCR^I^I1$

ERROR: code indent should never use tabs
#103: FILE: include/hw/usb/dwc2-regs.h:79:
+#define GAHBCFG_HBSTLEN_INCR4^I^I3$

ERROR: code indent should never use tabs
#104: FILE: include/hw/usb/dwc2-regs.h:80:
+#define GAHBCFG_HBSTLEN_INCR8^I^I5$

ERROR: code indent should never use tabs
#105: FILE: include/hw/usb/dwc2-regs.h:81:
+#define GAHBCFG_HBSTLEN_INCR16^I^I7$

ERROR: code indent should never use tabs
#106: FILE: include/hw/usb/dwc2-regs.h:82:
+#define GAHBCFG_GLBL_INTR_EN^I^IBIT(0)$

ERROR: code indent should never use tabs
#107: FILE: include/hw/usb/dwc2-regs.h:83:
+#define GAHBCFG_CTRL_MASK^I^I(GAHBCFG_P_TXF_EMP_LVL | \$

ERROR: code indent should never use tabs
#108: FILE: include/hw/usb/dwc2-regs.h:84:
+^I^I^I^I^I GAHBCFG_NP_TXF_EMP_LVL | \$

ERROR: code indent should never use tabs
#109: FILE: include/hw/usb/dwc2-regs.h:85:
+^I^I^I^I^I GAHBCFG_DMA_EN | \$

ERROR: code indent should never use tabs
#110: FILE: include/hw/usb/dwc2-regs.h:86:
+^I^I^I^I^I GAHBCFG_GLBL_INTR_EN)$

ERROR: code indent should never use tabs
#112: FILE: include/hw/usb/dwc2-regs.h:88:
+#define GUSBCFG^I^I^I^IHSOTG_REG(0x00C)$

ERROR: code indent should never use tabs
#113: FILE: include/hw/usb/dwc2-regs.h:89:
+#define GUSBCFG_FORCEDEVMODE^I^IBIT(30)$

ERROR: code indent should never use tabs
#114: FILE: include/hw/usb/dwc2-regs.h:90:
+#define GUSBCFG_FORCEHOSTMODE^I^IBIT(29)$

ERROR: code indent should never use tabs
#115: FILE: include/hw/usb/dwc2-regs.h:91:
+#define GUSBCFG_TXENDDELAY^I^IBIT(28)$

ERROR: code indent should never use tabs
#116: FILE: include/hw/usb/dwc2-regs.h:92:
+#define GUSBCFG_ICTRAFFICPULLREMOVE^IBIT(27)$

ERROR: code indent should never use tabs
#117: FILE: include/hw/usb/dwc2-regs.h:93:
+#define GUSBCFG_ICUSBCAP^I^IBIT(26)$

ERROR: code indent should never use tabs
#118: FILE: include/hw/usb/dwc2-regs.h:94:
+#define GUSBCFG_ULPI_INT_PROT_DIS^IBIT(25)$

ERROR: code indent should never use tabs
#119: FILE: include/hw/usb/dwc2-regs.h:95:
+#define GUSBCFG_INDICATORPASSTHROUGH^IBIT(24)$

ERROR: code indent should never use tabs
#120: FILE: include/hw/usb/dwc2-regs.h:96:
+#define GUSBCFG_INDICATORCOMPLEMENT^IBIT(23)$

ERROR: code indent should never use tabs
#121: FILE: include/hw/usb/dwc2-regs.h:97:
+#define GUSBCFG_TERMSELDLPULSE^I^IBIT(22)$

ERROR: code indent should never use tabs
#122: FILE: include/hw/usb/dwc2-regs.h:98:
+#define GUSBCFG_ULPI_INT_VBUS_IND^IBIT(21)$

ERROR: code indent should never use tabs
#123: FILE: include/hw/usb/dwc2-regs.h:99:
+#define GUSBCFG_ULPI_EXT_VBUS_DRV^IBIT(20)$

ERROR: code indent should never use tabs
#124: FILE: include/hw/usb/dwc2-regs.h:100:
+#define GUSBCFG_ULPI_CLK_SUSP_M^I^IBIT(19)$

ERROR: code indent should never use tabs
#125: FILE: include/hw/usb/dwc2-regs.h:101:
+#define GUSBCFG_ULPI_AUTO_RES^I^IBIT(18)$

ERROR: code indent should never use tabs
#126: FILE: include/hw/usb/dwc2-regs.h:102:
+#define GUSBCFG_ULPI_FS_LS^I^IBIT(17)$

ERROR: code indent should never use tabs
#127: FILE: include/hw/usb/dwc2-regs.h:103:
+#define GUSBCFG_OTG_UTMI_FS_SEL^I^IBIT(16)$

ERROR: code indent should never use tabs
#128: FILE: include/hw/usb/dwc2-regs.h:104:
+#define GUSBCFG_PHY_LP_CLK_SEL^I^IBIT(15)$

ERROR: code indent should never use tabs
#129: FILE: include/hw/usb/dwc2-regs.h:105:
+#define GUSBCFG_USBTRDTIM_MASK^I^I(0xf << 10)$

ERROR: code indent should never use tabs
#130: FILE: include/hw/usb/dwc2-regs.h:106:
+#define GUSBCFG_USBTRDTIM_SHIFT^I^I10$

ERROR: code indent should never use tabs
#131: FILE: include/hw/usb/dwc2-regs.h:107:
+#define GUSBCFG_HNPCAP^I^I^IBIT(9)$

ERROR: code indent should never use tabs
#132: FILE: include/hw/usb/dwc2-regs.h:108:
+#define GUSBCFG_SRPCAP^I^I^IBIT(8)$

ERROR: code indent should never use tabs
#133: FILE: include/hw/usb/dwc2-regs.h:109:
+#define GUSBCFG_DDRSEL^I^I^IBIT(7)$

ERROR: code indent should never use tabs
#134: FILE: include/hw/usb/dwc2-regs.h:110:
+#define GUSBCFG_PHYSEL^I^I^IBIT(6)$

ERROR: code indent should never use tabs
#135: FILE: include/hw/usb/dwc2-regs.h:111:
+#define GUSBCFG_FSINTF^I^I^IBIT(5)$

ERROR: code indent should never use tabs
#136: FILE: include/hw/usb/dwc2-regs.h:112:
+#define GUSBCFG_ULPI_UTMI_SEL^I^IBIT(4)$

ERROR: code indent should never use tabs
#137: FILE: include/hw/usb/dwc2-regs.h:113:
+#define GUSBCFG_PHYIF16^I^I^IBIT(3)$

ERROR: code indent should never use tabs
#138: FILE: include/hw/usb/dwc2-regs.h:114:
+#define GUSBCFG_PHYIF8^I^I^I(0 << 3)$

ERROR: code indent should never use tabs
#139: FILE: include/hw/usb/dwc2-regs.h:115:
+#define GUSBCFG_TOUTCAL_MASK^I^I(0x7 << 0)$

ERROR: code indent should never use tabs
#140: FILE: include/hw/usb/dwc2-regs.h:116:
+#define GUSBCFG_TOUTCAL_SHIFT^I^I0$

ERROR: code indent should never use tabs
#141: FILE: include/hw/usb/dwc2-regs.h:117:
+#define GUSBCFG_TOUTCAL_LIMIT^I^I0x7$

ERROR: code indent should never use tabs
#142: FILE: include/hw/usb/dwc2-regs.h:118:
+#define GUSBCFG_TOUTCAL(_x)^I^I((_x) << 0)$

ERROR: code indent should never use tabs
#144: FILE: include/hw/usb/dwc2-regs.h:120:
+#define GRSTCTL^I^I^I^IHSOTG_REG(0x010)$

ERROR: code indent should never use tabs
#145: FILE: include/hw/usb/dwc2-regs.h:121:
+#define GRSTCTL_AHBIDLE^I^I^IBIT(31)$

ERROR: code indent should never use tabs
#146: FILE: include/hw/usb/dwc2-regs.h:122:
+#define GRSTCTL_DMAREQ^I^I^IBIT(30)$

ERROR: code indent should never use tabs
#147: FILE: include/hw/usb/dwc2-regs.h:123:
+#define GRSTCTL_TXFNUM_MASK^I^I(0x1f << 6)$

ERROR: code indent should never use tabs
#148: FILE: include/hw/usb/dwc2-regs.h:124:
+#define GRSTCTL_TXFNUM_SHIFT^I^I6$

ERROR: code indent should never use tabs
#149: FILE: include/hw/usb/dwc2-regs.h:125:
+#define GRSTCTL_TXFNUM_LIMIT^I^I0x1f$

ERROR: code indent should never use tabs
#150: FILE: include/hw/usb/dwc2-regs.h:126:
+#define GRSTCTL_TXFNUM(_x)^I^I((_x) << 6)$

ERROR: code indent should never use tabs
#151: FILE: include/hw/usb/dwc2-regs.h:127:
+#define GRSTCTL_TXFFLSH^I^I^IBIT(5)$

ERROR: code indent should never use tabs
#152: FILE: include/hw/usb/dwc2-regs.h:128:
+#define GRSTCTL_RXFFLSH^I^I^IBIT(4)$

ERROR: code indent should never use tabs
#153: FILE: include/hw/usb/dwc2-regs.h:129:
+#define GRSTCTL_IN_TKNQ_FLSH^I^IBIT(3)$

ERROR: code indent should never use tabs
#154: FILE: include/hw/usb/dwc2-regs.h:130:
+#define GRSTCTL_FRMCNTRRST^I^IBIT(2)$

ERROR: code indent should never use tabs
#155: FILE: include/hw/usb/dwc2-regs.h:131:
+#define GRSTCTL_HSFTRST^I^I^IBIT(1)$

ERROR: code indent should never use tabs
#156: FILE: include/hw/usb/dwc2-regs.h:132:
+#define GRSTCTL_CSFTRST^I^I^IBIT(0)$

ERROR: code indent should never use tabs
#158: FILE: include/hw/usb/dwc2-regs.h:134:
+#define GINTSTS^I^I^I^IHSOTG_REG(0x014)$

ERROR: code indent should never use tabs
#159: FILE: include/hw/usb/dwc2-regs.h:135:
+#define GINTMSK^I^I^I^IHSOTG_REG(0x018)$

ERROR: code indent should never use tabs
#160: FILE: include/hw/usb/dwc2-regs.h:136:
+#define GINTSTS_WKUPINT^I^I^IBIT(31)$

ERROR: code indent should never use tabs
#161: FILE: include/hw/usb/dwc2-regs.h:137:
+#define GINTSTS_SESSREQINT^I^IBIT(30)$

ERROR: code indent should never use tabs
#162: FILE: include/hw/usb/dwc2-regs.h:138:
+#define GINTSTS_DISCONNINT^I^IBIT(29)$

ERROR: code indent should never use tabs
#163: FILE: include/hw/usb/dwc2-regs.h:139:
+#define GINTSTS_CONIDSTSCHNG^I^IBIT(28)$

ERROR: code indent should never use tabs
#164: FILE: include/hw/usb/dwc2-regs.h:140:
+#define GINTSTS_LPMTRANRCVD^I^IBIT(27)$

ERROR: code indent should never use tabs
#165: FILE: include/hw/usb/dwc2-regs.h:141:
+#define GINTSTS_PTXFEMP^I^I^IBIT(26)$

ERROR: code indent should never use tabs
#166: FILE: include/hw/usb/dwc2-regs.h:142:
+#define GINTSTS_HCHINT^I^I^IBIT(25)$

ERROR: code indent should never use tabs
#167: FILE: include/hw/usb/dwc2-regs.h:143:
+#define GINTSTS_PRTINT^I^I^IBIT(24)$

ERROR: code indent should never use tabs
#168: FILE: include/hw/usb/dwc2-regs.h:144:
+#define GINTSTS_RESETDET^I^IBIT(23)$

ERROR: code indent should never use tabs
#169: FILE: include/hw/usb/dwc2-regs.h:145:
+#define GINTSTS_FET_SUSP^I^IBIT(22)$

ERROR: code indent should never use tabs
#170: FILE: include/hw/usb/dwc2-regs.h:146:
+#define GINTSTS_INCOMPL_IP^I^IBIT(21)$

ERROR: code indent should never use tabs
#171: FILE: include/hw/usb/dwc2-regs.h:147:
+#define GINTSTS_INCOMPL_SOOUT^I^IBIT(21)$

ERROR: code indent should never use tabs
#172: FILE: include/hw/usb/dwc2-regs.h:148:
+#define GINTSTS_INCOMPL_SOIN^I^IBIT(20)$

ERROR: code indent should never use tabs
#173: FILE: include/hw/usb/dwc2-regs.h:149:
+#define GINTSTS_OEPINT^I^I^IBIT(19)$

ERROR: code indent should never use tabs
#174: FILE: include/hw/usb/dwc2-regs.h:150:
+#define GINTSTS_IEPINT^I^I^IBIT(18)$

ERROR: code indent should never use tabs
#175: FILE: include/hw/usb/dwc2-regs.h:151:
+#define GINTSTS_EPMIS^I^I^IBIT(17)$

ERROR: code indent should never use tabs
#176: FILE: include/hw/usb/dwc2-regs.h:152:
+#define GINTSTS_RESTOREDONE^I^IBIT(16)$

ERROR: code indent should never use tabs
#177: FILE: include/hw/usb/dwc2-regs.h:153:
+#define GINTSTS_EOPF^I^I^IBIT(15)$

ERROR: code indent should never use tabs
#178: FILE: include/hw/usb/dwc2-regs.h:154:
+#define GINTSTS_ISOUTDROP^I^IBIT(14)$

ERROR: code indent should never use tabs
#179: FILE: include/hw/usb/dwc2-regs.h:155:
+#define GINTSTS_ENUMDONE^I^IBIT(13)$

ERROR: code indent should never use tabs
#180: FILE: include/hw/usb/dwc2-regs.h:156:
+#define GINTSTS_USBRST^I^I^IBIT(12)$

ERROR: code indent should never use tabs
#181: FILE: include/hw/usb/dwc2-regs.h:157:
+#define GINTSTS_USBSUSP^I^I^IBIT(11)$

ERROR: code indent should never use tabs
#182: FILE: include/hw/usb/dwc2-regs.h:158:
+#define GINTSTS_ERLYSUSP^I^IBIT(10)$

ERROR: code indent should never use tabs
#183: FILE: include/hw/usb/dwc2-regs.h:159:
+#define GINTSTS_I2CINT^I^I^IBIT(9)$

ERROR: code indent should never use tabs
#184: FILE: include/hw/usb/dwc2-regs.h:160:
+#define GINTSTS_ULPI_CK_INT^I^IBIT(8)$

ERROR: code indent should never use tabs
#185: FILE: include/hw/usb/dwc2-regs.h:161:
+#define GINTSTS_GOUTNAKEFF^I^IBIT(7)$

ERROR: code indent should never use tabs
#186: FILE: include/hw/usb/dwc2-regs.h:162:
+#define GINTSTS_GINNAKEFF^I^IBIT(6)$

ERROR: code indent should never use tabs
#187: FILE: include/hw/usb/dwc2-regs.h:163:
+#define GINTSTS_NPTXFEMP^I^IBIT(5)$

ERROR: code indent should never use tabs
#188: FILE: include/hw/usb/dwc2-regs.h:164:
+#define GINTSTS_RXFLVL^I^I^IBIT(4)$

ERROR: code indent should never use tabs
#189: FILE: include/hw/usb/dwc2-regs.h:165:
+#define GINTSTS_SOF^I^I^IBIT(3)$

ERROR: code indent should never use tabs
#190: FILE: include/hw/usb/dwc2-regs.h:166:
+#define GINTSTS_OTGINT^I^I^IBIT(2)$

ERROR: code indent should never use tabs
#191: FILE: include/hw/usb/dwc2-regs.h:167:
+#define GINTSTS_MODEMIS^I^I^IBIT(1)$

ERROR: code indent should never use tabs
#192: FILE: include/hw/usb/dwc2-regs.h:168:
+#define GINTSTS_CURMODE_HOST^I^IBIT(0)$

ERROR: code indent should never use tabs
#194: FILE: include/hw/usb/dwc2-regs.h:170:
+#define GRXSTSR^I^I^I^IHSOTG_REG(0x01C)$

ERROR: code indent should never use tabs
#195: FILE: include/hw/usb/dwc2-regs.h:171:
+#define GRXSTSP^I^I^I^IHSOTG_REG(0x020)$

ERROR: code indent should never use tabs
#196: FILE: include/hw/usb/dwc2-regs.h:172:
+#define GRXSTS_FN_MASK^I^I^I(0x7f << 25)$

ERROR: code indent should never use tabs
#197: FILE: include/hw/usb/dwc2-regs.h:173:
+#define GRXSTS_FN_SHIFT^I^I^I25$

ERROR: code indent should never use tabs
#198: FILE: include/hw/usb/dwc2-regs.h:174:
+#define GRXSTS_PKTSTS_MASK^I^I(0xf << 17)$

ERROR: code indent should never use tabs
#199: FILE: include/hw/usb/dwc2-regs.h:175:
+#define GRXSTS_PKTSTS_SHIFT^I^I17$

ERROR: code indent should never use tabs
#200: FILE: include/hw/usb/dwc2-regs.h:176:
+#define GRXSTS_PKTSTS_GLOBALOUTNAK^I1$

ERROR: code indent should never use tabs
#201: FILE: include/hw/usb/dwc2-regs.h:177:
+#define GRXSTS_PKTSTS_OUTRX^I^I2$

ERROR: code indent should never use tabs
#202: FILE: include/hw/usb/dwc2-regs.h:178:
+#define GRXSTS_PKTSTS_HCHIN^I^I2$

ERROR: code indent should never use tabs
#203: FILE: include/hw/usb/dwc2-regs.h:179:
+#define GRXSTS_PKTSTS_OUTDONE^I^I3$

ERROR: code indent should never use tabs
#204: FILE: include/hw/usb/dwc2-regs.h:180:
+#define GRXSTS_PKTSTS_HCHIN_XFER_COMP^I3$

ERROR: code indent should never use tabs
#205: FILE: include/hw/usb/dwc2-regs.h:181:
+#define GRXSTS_PKTSTS_SETUPDONE^I^I4$

ERROR: code indent should never use tabs
#206: FILE: include/hw/usb/dwc2-regs.h:182:
+#define GRXSTS_PKTSTS_DATATOGGLEERR^I5$

ERROR: code indent should never use tabs
#207: FILE: include/hw/usb/dwc2-regs.h:183:
+#define GRXSTS_PKTSTS_SETUPRX^I^I6$

ERROR: code indent should never use tabs
#208: FILE: include/hw/usb/dwc2-regs.h:184:
+#define GRXSTS_PKTSTS_HCHHALTED^I^I7$

ERROR: code indent should never use tabs
#209: FILE: include/hw/usb/dwc2-regs.h:185:
+#define GRXSTS_HCHNUM_MASK^I^I(0xf << 0)$

ERROR: code indent should never use tabs
#210: FILE: include/hw/usb/dwc2-regs.h:186:
+#define GRXSTS_HCHNUM_SHIFT^I^I0$

ERROR: code indent should never use tabs
#211: FILE: include/hw/usb/dwc2-regs.h:187:
+#define GRXSTS_DPID_MASK^I^I(0x3 << 15)$

ERROR: code indent should never use tabs
#212: FILE: include/hw/usb/dwc2-regs.h:188:
+#define GRXSTS_DPID_SHIFT^I^I15$

ERROR: code indent should never use tabs
#213: FILE: include/hw/usb/dwc2-regs.h:189:
+#define GRXSTS_BYTECNT_MASK^I^I(0x7ff << 4)$

ERROR: code indent should never use tabs
#214: FILE: include/hw/usb/dwc2-regs.h:190:
+#define GRXSTS_BYTECNT_SHIFT^I^I4$

ERROR: code indent should never use tabs
#215: FILE: include/hw/usb/dwc2-regs.h:191:
+#define GRXSTS_EPNUM_MASK^I^I(0xf << 0)$

ERROR: code indent should never use tabs
#216: FILE: include/hw/usb/dwc2-regs.h:192:
+#define GRXSTS_EPNUM_SHIFT^I^I0$

ERROR: code indent should never use tabs
#218: FILE: include/hw/usb/dwc2-regs.h:194:
+#define GRXFSIZ^I^I^I^IHSOTG_REG(0x024)$

ERROR: code indent should never use tabs
#219: FILE: include/hw/usb/dwc2-regs.h:195:
+#define GRXFSIZ_DEPTH_MASK^I^I(0xffff << 0)$

ERROR: code indent should never use tabs
#220: FILE: include/hw/usb/dwc2-regs.h:196:
+#define GRXFSIZ_DEPTH_SHIFT^I^I0$

ERROR: code indent should never use tabs
#222: FILE: include/hw/usb/dwc2-regs.h:198:
+#define GNPTXFSIZ^I^I^IHSOTG_REG(0x028)$

ERROR: code indent should never use tabs
#225: FILE: include/hw/usb/dwc2-regs.h:201:
+#define GNPTXSTS^I^I^IHSOTG_REG(0x02C)$

ERROR: code indent should never use tabs
#226: FILE: include/hw/usb/dwc2-regs.h:202:
+#define GNPTXSTS_NP_TXQ_TOP_MASK^I^I(0x7f << 24)$

ERROR: code indent should never use tabs
#227: FILE: include/hw/usb/dwc2-regs.h:203:
+#define GNPTXSTS_NP_TXQ_TOP_SHIFT^I^I24$

ERROR: code indent should never use tabs
#228: FILE: include/hw/usb/dwc2-regs.h:204:
+#define GNPTXSTS_NP_TXQ_SPC_AVAIL_MASK^I^I(0xff << 16)$

ERROR: code indent should never use tabs
#229: FILE: include/hw/usb/dwc2-regs.h:205:
+#define GNPTXSTS_NP_TXQ_SPC_AVAIL_SHIFT^I^I16$

ERROR: code indent should never use tabs
#230: FILE: include/hw/usb/dwc2-regs.h:206:
+#define GNPTXSTS_NP_TXQ_SPC_AVAIL_GET(_v)^I(((_v) >> 16) & 0xff)$

ERROR: code indent should never use tabs
#231: FILE: include/hw/usb/dwc2-regs.h:207:
+#define GNPTXSTS_NP_TXF_SPC_AVAIL_MASK^I^I(0xffff << 0)$

ERROR: code indent should never use tabs
#232: FILE: include/hw/usb/dwc2-regs.h:208:
+#define GNPTXSTS_NP_TXF_SPC_AVAIL_SHIFT^I^I0$

ERROR: code indent should never use tabs
#233: FILE: include/hw/usb/dwc2-regs.h:209:
+#define GNPTXSTS_NP_TXF_SPC_AVAIL_GET(_v)^I(((_v) >> 0) & 0xffff)$

ERROR: code indent should never use tabs
#235: FILE: include/hw/usb/dwc2-regs.h:211:
+#define GI2CCTL^I^I^I^IHSOTG_REG(0x0030)$

ERROR: code indent should never use tabs
#236: FILE: include/hw/usb/dwc2-regs.h:212:
+#define GI2CCTL_BSYDNE^I^I^IBIT(31)$

ERROR: code indent should never use tabs
#237: FILE: include/hw/usb/dwc2-regs.h:213:
+#define GI2CCTL_RW^I^I^IBIT(30)$

ERROR: code indent should never use tabs
#238: FILE: include/hw/usb/dwc2-regs.h:214:
+#define GI2CCTL_I2CDATSE0^I^IBIT(28)$

ERROR: code indent should never use tabs
#239: FILE: include/hw/usb/dwc2-regs.h:215:
+#define GI2CCTL_I2CDEVADDR_MASK^I^I(0x3 << 26)$

ERROR: code indent should never use tabs
#240: FILE: include/hw/usb/dwc2-regs.h:216:
+#define GI2CCTL_I2CDEVADDR_SHIFT^I26$

ERROR: code indent should never use tabs
#241: FILE: include/hw/usb/dwc2-regs.h:217:
+#define GI2CCTL_I2CSUSPCTL^I^IBIT(25)$

ERROR: code indent should never use tabs
#242: FILE: include/hw/usb/dwc2-regs.h:218:
+#define GI2CCTL_ACK^I^I^IBIT(24)$

ERROR: code indent should never use tabs
#243: FILE: include/hw/usb/dwc2-regs.h:219:
+#define GI2CCTL_I2CEN^I^I^IBIT(23)$

ERROR: code indent should never use tabs
#244: FILE: include/hw/usb/dwc2-regs.h:220:
+#define GI2CCTL_ADDR_MASK^I^I(0x7f << 16)$

ERROR: code indent should never use tabs
#245: FILE: include/hw/usb/dwc2-regs.h:221:
+#define GI2CCTL_ADDR_SHIFT^I^I16$

ERROR: code indent should never use tabs
#246: FILE: include/hw/usb/dwc2-regs.h:222:
+#define GI2CCTL_REGADDR_MASK^I^I(0xff << 8)$

ERROR: code indent should never use tabs
#247: FILE: include/hw/usb/dwc2-regs.h:223:
+#define GI2CCTL_REGADDR_SHIFT^I^I8$

ERROR: code indent should never use tabs
#248: FILE: include/hw/usb/dwc2-regs.h:224:
+#define GI2CCTL_RWDATA_MASK^I^I(0xff << 0)$

ERROR: code indent should never use tabs
#249: FILE: include/hw/usb/dwc2-regs.h:225:
+#define GI2CCTL_RWDATA_SHIFT^I^I0$

ERROR: code indent should never use tabs
#251: FILE: include/hw/usb/dwc2-regs.h:227:
+#define GPVNDCTL^I^I^IHSOTG_REG(0x0034)$

ERROR: code indent should never use tabs
#252: FILE: include/hw/usb/dwc2-regs.h:228:
+#define GGPIO^I^I^I^IHSOTG_REG(0x0038)$

ERROR: code indent should never use tabs
#253: FILE: include/hw/usb/dwc2-regs.h:229:
+#define GGPIO_STM32_OTG_GCCFG_PWRDWN^IBIT(16)$

ERROR: code indent should never use tabs
#255: FILE: include/hw/usb/dwc2-regs.h:231:
+#define GUID^I^I^I^IHSOTG_REG(0x003c)$

ERROR: code indent should never use tabs
#256: FILE: include/hw/usb/dwc2-regs.h:232:
+#define GSNPSID^I^I^I^IHSOTG_REG(0x0040)$

ERROR: code indent should never use tabs
#257: FILE: include/hw/usb/dwc2-regs.h:233:
+#define GHWCFG1^I^I^I^IHSOTG_REG(0x0044)$

ERROR: code indent should never use tabs
#258: FILE: include/hw/usb/dwc2-regs.h:234:
+#define GSNPSID_ID_MASK^I^I^IGENMASK(31, 16)$

ERROR: code indent should never use tabs
#260: FILE: include/hw/usb/dwc2-regs.h:236:
+#define GHWCFG2^I^I^I^IHSOTG_REG(0x0048)$

ERROR: code indent should never use tabs
#261: FILE: include/hw/usb/dwc2-regs.h:237:
+#define GHWCFG2_OTG_ENABLE_IC_USB^I^IBIT(31)$

ERROR: code indent should never use tabs
#262: FILE: include/hw/usb/dwc2-regs.h:238:
+#define GHWCFG2_DEV_TOKEN_Q_DEPTH_MASK^I^I(0x1f << 26)$

ERROR: code indent should never use tabs
#263: FILE: include/hw/usb/dwc2-regs.h:239:
+#define GHWCFG2_DEV_TOKEN_Q_DEPTH_SHIFT^I^I26$

ERROR: code indent should never use tabs
#264: FILE: include/hw/usb/dwc2-regs.h:240:
+#define GHWCFG2_HOST_PERIO_TX_Q_DEPTH_MASK^I(0x3 << 24)$

ERROR: code indent should never use tabs
#265: FILE: include/hw/usb/dwc2-regs.h:241:
+#define GHWCFG2_HOST_PERIO_TX_Q_DEPTH_SHIFT^I24$

ERROR: code indent should never use tabs
#266: FILE: include/hw/usb/dwc2-regs.h:242:
+#define GHWCFG2_NONPERIO_TX_Q_DEPTH_MASK^I(0x3 << 22)$

ERROR: code indent should never use tabs
#267: FILE: include/hw/usb/dwc2-regs.h:243:
+#define GHWCFG2_NONPERIO_TX_Q_DEPTH_SHIFT^I22$

ERROR: code indent should never use tabs
#268: FILE: include/hw/usb/dwc2-regs.h:244:
+#define GHWCFG2_MULTI_PROC_INT^I^I^IBIT(20)$

ERROR: code indent should never use tabs
#269: FILE: include/hw/usb/dwc2-regs.h:245:
+#define GHWCFG2_DYNAMIC_FIFO^I^I^IBIT(19)$

ERROR: code indent should never use tabs
#270: FILE: include/hw/usb/dwc2-regs.h:246:
+#define GHWCFG2_PERIO_EP_SUPPORTED^I^IBIT(18)$

ERROR: code indent should never use tabs
#271: FILE: include/hw/usb/dwc2-regs.h:247:
+#define GHWCFG2_NUM_HOST_CHAN_MASK^I^I(0xf << 14)$

ERROR: code indent should never use tabs
#272: FILE: include/hw/usb/dwc2-regs.h:248:
+#define GHWCFG2_NUM_HOST_CHAN_SHIFT^I^I14$

ERROR: code indent should never use tabs
#273: FILE: include/hw/usb/dwc2-regs.h:249:
+#define GHWCFG2_NUM_DEV_EP_MASK^I^I^I(0xf << 10)$

ERROR: code indent should never use tabs
#274: FILE: include/hw/usb/dwc2-regs.h:250:
+#define GHWCFG2_NUM_DEV_EP_SHIFT^I^I10$

ERROR: code indent should never use tabs
#275: FILE: include/hw/usb/dwc2-regs.h:251:
+#define GHWCFG2_FS_PHY_TYPE_MASK^I^I(0x3 << 8)$

ERROR: code indent should never use tabs
#276: FILE: include/hw/usb/dwc2-regs.h:252:
+#define GHWCFG2_FS_PHY_TYPE_SHIFT^I^I8$

ERROR: code indent should never use tabs
#277: FILE: include/hw/usb/dwc2-regs.h:253:
+#define GHWCFG2_FS_PHY_TYPE_NOT_SUPPORTED^I0$

ERROR: code indent should never use tabs
#278: FILE: include/hw/usb/dwc2-regs.h:254:
+#define GHWCFG2_FS_PHY_TYPE_DEDICATED^I^I1$

ERROR: code indent should never use tabs
#279: FILE: include/hw/usb/dwc2-regs.h:255:
+#define GHWCFG2_FS_PHY_TYPE_SHARED_UTMI^I^I2$

ERROR: code indent should never use tabs
#280: FILE: include/hw/usb/dwc2-regs.h:256:
+#define GHWCFG2_FS_PHY_TYPE_SHARED_ULPI^I^I3$

ERROR: code indent should never use tabs
#281: FILE: include/hw/usb/dwc2-regs.h:257:
+#define GHWCFG2_HS_PHY_TYPE_MASK^I^I(0x3 << 6)$

ERROR: code indent should never use tabs
#282: FILE: include/hw/usb/dwc2-regs.h:258:
+#define GHWCFG2_HS_PHY_TYPE_SHIFT^I^I6$

ERROR: code indent should never use tabs
#283: FILE: include/hw/usb/dwc2-regs.h:259:
+#define GHWCFG2_HS_PHY_TYPE_NOT_SUPPORTED^I0$

ERROR: code indent should never use tabs
#284: FILE: include/hw/usb/dwc2-regs.h:260:
+#define GHWCFG2_HS_PHY_TYPE_UTMI^I^I1$

ERROR: code indent should never use tabs
#285: FILE: include/hw/usb/dwc2-regs.h:261:
+#define GHWCFG2_HS_PHY_TYPE_ULPI^I^I2$

ERROR: code indent should never use tabs
#286: FILE: include/hw/usb/dwc2-regs.h:262:
+#define GHWCFG2_HS_PHY_TYPE_UTMI_ULPI^I^I3$

ERROR: code indent should never use tabs
#287: FILE: include/hw/usb/dwc2-regs.h:263:
+#define GHWCFG2_POINT2POINT^I^I^IBIT(5)$

ERROR: code indent should never use tabs
#288: FILE: include/hw/usb/dwc2-regs.h:264:
+#define GHWCFG2_ARCHITECTURE_MASK^I^I(0x3 << 3)$

ERROR: code indent should never use tabs
#289: FILE: include/hw/usb/dwc2-regs.h:265:
+#define GHWCFG2_ARCHITECTURE_SHIFT^I^I3$

ERROR: code indent should never use tabs
#290: FILE: include/hw/usb/dwc2-regs.h:266:
+#define GHWCFG2_SLAVE_ONLY_ARCH^I^I^I0$

ERROR: code indent should never use tabs
#291: FILE: include/hw/usb/dwc2-regs.h:267:
+#define GHWCFG2_EXT_DMA_ARCH^I^I^I1$

ERROR: code indent should never use tabs
#292: FILE: include/hw/usb/dwc2-regs.h:268:
+#define GHWCFG2_INT_DMA_ARCH^I^I^I2$

ERROR: code indent should never use tabs
#293: FILE: include/hw/usb/dwc2-regs.h:269:
+#define GHWCFG2_OP_MODE_MASK^I^I^I(0x7 << 0)$

ERROR: code indent should never use tabs
#294: FILE: include/hw/usb/dwc2-regs.h:270:
+#define GHWCFG2_OP_MODE_SHIFT^I^I^I0$

ERROR: code indent should never use tabs
#295: FILE: include/hw/usb/dwc2-regs.h:271:
+#define GHWCFG2_OP_MODE_HNP_SRP_CAPABLE^I^I0$

ERROR: code indent should never use tabs
#296: FILE: include/hw/usb/dwc2-regs.h:272:
+#define GHWCFG2_OP_MODE_SRP_ONLY_CAPABLE^I1$

ERROR: code indent should never use tabs
#297: FILE: include/hw/usb/dwc2-regs.h:273:
+#define GHWCFG2_OP_MODE_NO_HNP_SRP_CAPABLE^I2$

ERROR: code indent should never use tabs
#298: FILE: include/hw/usb/dwc2-regs.h:274:
+#define GHWCFG2_OP_MODE_SRP_CAPABLE_DEVICE^I3$

ERROR: code indent should never use tabs
#299: FILE: include/hw/usb/dwc2-regs.h:275:
+#define GHWCFG2_OP_MODE_NO_SRP_CAPABLE_DEVICE^I4$

ERROR: code indent should never use tabs
#300: FILE: include/hw/usb/dwc2-regs.h:276:
+#define GHWCFG2_OP_MODE_SRP_CAPABLE_HOST^I5$

ERROR: code indent should never use tabs
#301: FILE: include/hw/usb/dwc2-regs.h:277:
+#define GHWCFG2_OP_MODE_NO_SRP_CAPABLE_HOST^I6$

ERROR: code indent should never use tabs
#302: FILE: include/hw/usb/dwc2-regs.h:278:
+#define GHWCFG2_OP_MODE_UNDEFINED^I^I7$

ERROR: code indent should never use tabs
#304: FILE: include/hw/usb/dwc2-regs.h:280:
+#define GHWCFG3^I^I^I^IHSOTG_REG(0x004c)$

ERROR: code indent should never use tabs
#305: FILE: include/hw/usb/dwc2-regs.h:281:
+#define GHWCFG3_DFIFO_DEPTH_MASK^I^I(0xffff << 16)$

ERROR: code indent should never use tabs
#306: FILE: include/hw/usb/dwc2-regs.h:282:
+#define GHWCFG3_DFIFO_DEPTH_SHIFT^I^I16$

ERROR: code indent should never use tabs
#307: FILE: include/hw/usb/dwc2-regs.h:283:
+#define GHWCFG3_OTG_LPM_EN^I^I^IBIT(15)$

ERROR: code indent should never use tabs
#308: FILE: include/hw/usb/dwc2-regs.h:284:
+#define GHWCFG3_BC_SUPPORT^I^I^IBIT(14)$

ERROR: code indent should never use tabs
#309: FILE: include/hw/usb/dwc2-regs.h:285:
+#define GHWCFG3_OTG_ENABLE_HSIC^I^I^IBIT(13)$

ERROR: code indent should never use tabs
#310: FILE: include/hw/usb/dwc2-regs.h:286:
+#define GHWCFG3_ADP_SUPP^I^I^IBIT(12)$

ERROR: code indent should never use tabs
#311: FILE: include/hw/usb/dwc2-regs.h:287:
+#define GHWCFG3_SYNCH_RESET_TYPE^I^IBIT(11)$

ERROR: code indent should never use tabs
#312: FILE: include/hw/usb/dwc2-regs.h:288:
+#define GHWCFG3_OPTIONAL_FEATURES^I^IBIT(10)$

ERROR: code indent should never use tabs
#313: FILE: include/hw/usb/dwc2-regs.h:289:
+#define GHWCFG3_VENDOR_CTRL_IF^I^I^IBIT(9)$

ERROR: code indent should never use tabs
#314: FILE: include/hw/usb/dwc2-regs.h:290:
+#define GHWCFG3_I2C^I^I^I^IBIT(8)$

ERROR: code indent should never use tabs
#315: FILE: include/hw/usb/dwc2-regs.h:291:
+#define GHWCFG3_OTG_FUNC^I^I^IBIT(7)$

ERROR: code indent should never use tabs
#316: FILE: include/hw/usb/dwc2-regs.h:292:
+#define GHWCFG3_PACKET_SIZE_CNTR_WIDTH_MASK^I(0x7 << 4)$

ERROR: code indent should never use tabs
#317: FILE: include/hw/usb/dwc2-regs.h:293:
+#define GHWCFG3_PACKET_SIZE_CNTR_WIDTH_SHIFT^I4$

ERROR: code indent should never use tabs
#318: FILE: include/hw/usb/dwc2-regs.h:294:
+#define GHWCFG3_XFER_SIZE_CNTR_WIDTH_MASK^I(0xf << 0)$

ERROR: code indent should never use tabs
#319: FILE: include/hw/usb/dwc2-regs.h:295:
+#define GHWCFG3_XFER_SIZE_CNTR_WIDTH_SHIFT^I0$

ERROR: code indent should never use tabs
#321: FILE: include/hw/usb/dwc2-regs.h:297:
+#define GHWCFG4^I^I^I^IHSOTG_REG(0x0050)$

ERROR: code indent should never use tabs
#322: FILE: include/hw/usb/dwc2-regs.h:298:
+#define GHWCFG4_DESC_DMA_DYN^I^I^IBIT(31)$

ERROR: code indent should never use tabs
#323: FILE: include/hw/usb/dwc2-regs.h:299:
+#define GHWCFG4_DESC_DMA^I^I^IBIT(30)$

ERROR: code indent should never use tabs
#324: FILE: include/hw/usb/dwc2-regs.h:300:
+#define GHWCFG4_NUM_IN_EPS_MASK^I^I^I(0xf << 26)$

ERROR: code indent should never use tabs
#325: FILE: include/hw/usb/dwc2-regs.h:301:
+#define GHWCFG4_NUM_IN_EPS_SHIFT^I^I26$

ERROR: code indent should never use tabs
#326: FILE: include/hw/usb/dwc2-regs.h:302:
+#define GHWCFG4_DED_FIFO_EN^I^I^IBIT(25)$

ERROR: code indent should never use tabs
#327: FILE: include/hw/usb/dwc2-regs.h:303:
+#define GHWCFG4_DED_FIFO_SHIFT^I^I25$

ERROR: code indent should never use tabs
#328: FILE: include/hw/usb/dwc2-regs.h:304:
+#define GHWCFG4_SESSION_END_FILT_EN^I^IBIT(24)$

ERROR: code indent should never use tabs
#329: FILE: include/hw/usb/dwc2-regs.h:305:
+#define GHWCFG4_B_VALID_FILT_EN^I^I^IBIT(23)$

ERROR: code indent should never use tabs
#330: FILE: include/hw/usb/dwc2-regs.h:306:
+#define GHWCFG4_A_VALID_FILT_EN^I^I^IBIT(22)$

ERROR: code indent should never use tabs
#331: FILE: include/hw/usb/dwc2-regs.h:307:
+#define GHWCFG4_VBUS_VALID_FILT_EN^I^IBIT(21)$

ERROR: code indent should never use tabs
#332: FILE: include/hw/usb/dwc2-regs.h:308:
+#define GHWCFG4_IDDIG_FILT_EN^I^I^IBIT(20)$

ERROR: code indent should never use tabs
#333: FILE: include/hw/usb/dwc2-regs.h:309:
+#define GHWCFG4_NUM_DEV_MODE_CTRL_EP_MASK^I(0xf << 16)$

ERROR: code indent should never use tabs
#334: FILE: include/hw/usb/dwc2-regs.h:310:
+#define GHWCFG4_NUM_DEV_MODE_CTRL_EP_SHIFT^I16$

ERROR: code indent should never use tabs
#335: FILE: include/hw/usb/dwc2-regs.h:311:
+#define GHWCFG4_UTMI_PHY_DATA_WIDTH_MASK^I(0x3 << 14)$

ERROR: code indent should never use tabs
#336: FILE: include/hw/usb/dwc2-regs.h:312:
+#define GHWCFG4_UTMI_PHY_DATA_WIDTH_SHIFT^I14$

ERROR: code indent should never use tabs
#337: FILE: include/hw/usb/dwc2-regs.h:313:
+#define GHWCFG4_UTMI_PHY_DATA_WIDTH_8^I^I0$

ERROR: code indent should never use tabs
#338: FILE: include/hw/usb/dwc2-regs.h:314:
+#define GHWCFG4_UTMI_PHY_DATA_WIDTH_16^I^I1$

ERROR: code indent should never use tabs
#339: FILE: include/hw/usb/dwc2-regs.h:315:
+#define GHWCFG4_UTMI_PHY_DATA_WIDTH_8_OR_16^I2$

ERROR: code indent should never use tabs
#340: FILE: include/hw/usb/dwc2-regs.h:316:
+#define GHWCFG4_ACG_SUPPORTED^I^I^IBIT(12)$

ERROR: code indent should never use tabs
#341: FILE: include/hw/usb/dwc2-regs.h:317:
+#define GHWCFG4_IPG_ISOC_SUPPORTED^I^IBIT(11)$

ERROR: code indent should never use tabs
#343: FILE: include/hw/usb/dwc2-regs.h:319:
+#define GHWCFG4_XHIBER^I^I^I^IBIT(7)$

ERROR: code indent should never use tabs
#344: FILE: include/hw/usb/dwc2-regs.h:320:
+#define GHWCFG4_HIBER^I^I^I^IBIT(6)$

ERROR: code indent should never use tabs
#345: FILE: include/hw/usb/dwc2-regs.h:321:
+#define GHWCFG4_MIN_AHB_FREQ^I^I^IBIT(5)$

ERROR: code indent should never use tabs
#346: FILE: include/hw/usb/dwc2-regs.h:322:
+#define GHWCFG4_POWER_OPTIMIZ^I^I^IBIT(4)$

ERROR: code indent should never use tabs
#347: FILE: include/hw/usb/dwc2-regs.h:323:
+#define GHWCFG4_NUM_DEV_PERIO_IN_EP_MASK^I(0xf << 0)$

ERROR: code indent should never use tabs
#348: FILE: include/hw/usb/dwc2-regs.h:324:
+#define GHWCFG4_NUM_DEV_PERIO_IN_EP_SHIFT^I0$

ERROR: code indent should never use tabs
#350: FILE: include/hw/usb/dwc2-regs.h:326:
+#define GLPMCFG^I^I^I^IHSOTG_REG(0x0054)$

ERROR: code indent should never use tabs
#351: FILE: include/hw/usb/dwc2-regs.h:327:
+#define GLPMCFG_INVSELHSIC^I^IBIT(31)$

ERROR: code indent should never use tabs
#352: FILE: include/hw/usb/dwc2-regs.h:328:
+#define GLPMCFG_HSICCON^I^I^IBIT(30)$

ERROR: code indent should never use tabs
#353: FILE: include/hw/usb/dwc2-regs.h:329:
+#define GLPMCFG_RSTRSLPSTS^I^IBIT(29)$

ERROR: code indent should never use tabs
#354: FILE: include/hw/usb/dwc2-regs.h:330:
+#define GLPMCFG_ENBESL^I^I^IBIT(28)$

ERROR: code indent should never use tabs
#355: FILE: include/hw/usb/dwc2-regs.h:331:
+#define GLPMCFG_LPM_RETRYCNT_STS_MASK^I(0x7 << 25)$

ERROR: code indent should never use tabs
#356: FILE: include/hw/usb/dwc2-regs.h:332:
+#define GLPMCFG_LPM_RETRYCNT_STS_SHIFT^I25$

ERROR: code indent should never use tabs
#357: FILE: include/hw/usb/dwc2-regs.h:333:
+#define GLPMCFG_SNDLPM^I^I^IBIT(24)$

ERROR: code indent should never use tabs
#358: FILE: include/hw/usb/dwc2-regs.h:334:
+#define GLPMCFG_RETRY_CNT_MASK^I^I(0x7 << 21)$

ERROR: code indent should never use tabs
#359: FILE: include/hw/usb/dwc2-regs.h:335:
+#define GLPMCFG_RETRY_CNT_SHIFT^I^I21$

ERROR: code indent should never use tabs
#360: FILE: include/hw/usb/dwc2-regs.h:336:
+#define GLPMCFG_LPM_REJECT_CTRL_CONTROL^IBIT(21)$

ERROR: code indent should never use tabs
#361: FILE: include/hw/usb/dwc2-regs.h:337:
+#define GLPMCFG_LPM_ACCEPT_CTRL_ISOC^IBIT(22)$

ERROR: code indent should never use tabs
#362: FILE: include/hw/usb/dwc2-regs.h:338:
+#define GLPMCFG_LPM_CHNL_INDX_MASK^I(0xf << 17)$

ERROR: code indent should never use tabs
#363: FILE: include/hw/usb/dwc2-regs.h:339:
+#define GLPMCFG_LPM_CHNL_INDX_SHIFT^I17$

ERROR: code indent should never use tabs
#364: FILE: include/hw/usb/dwc2-regs.h:340:
+#define GLPMCFG_L1RESUMEOK^I^IBIT(16)$

ERROR: code indent should never use tabs
#365: FILE: include/hw/usb/dwc2-regs.h:341:
+#define GLPMCFG_SLPSTS^I^I^IBIT(15)$

ERROR: code indent should never use tabs
#366: FILE: include/hw/usb/dwc2-regs.h:342:
+#define GLPMCFG_COREL1RES_MASK^I^I(0x3 << 13)$

ERROR: code indent should never use tabs
#367: FILE: include/hw/usb/dwc2-regs.h:343:
+#define GLPMCFG_COREL1RES_SHIFT^I^I13$

ERROR: code indent should never use tabs
#368: FILE: include/hw/usb/dwc2-regs.h:344:
+#define GLPMCFG_HIRD_THRES_MASK^I^I(0x1f << 8)$

ERROR: code indent should never use tabs
#369: FILE: include/hw/usb/dwc2-regs.h:345:
+#define GLPMCFG_HIRD_THRES_SHIFT^I8$

ERROR: code indent should never use tabs
#370: FILE: include/hw/usb/dwc2-regs.h:346:
+#define GLPMCFG_HIRD_THRES_EN^I^I(0x10 << 8)$

ERROR: code indent should never use tabs
#371: FILE: include/hw/usb/dwc2-regs.h:347:
+#define GLPMCFG_ENBLSLPM^I^IBIT(7)$

ERROR: code indent should never use tabs
#372: FILE: include/hw/usb/dwc2-regs.h:348:
+#define GLPMCFG_BREMOTEWAKE^I^IBIT(6)$

ERROR: code indent should never use tabs
#373: FILE: include/hw/usb/dwc2-regs.h:349:
+#define GLPMCFG_HIRD_MASK^I^I(0xf << 2)$

ERROR: code indent should never use tabs
#374: FILE: include/hw/usb/dwc2-regs.h:350:
+#define GLPMCFG_HIRD_SHIFT^I^I2$

ERROR: code indent should never use tabs
#375: FILE: include/hw/usb/dwc2-regs.h:351:
+#define GLPMCFG_APPL1RES^I^IBIT(1)$

ERROR: code indent should never use tabs
#376: FILE: include/hw/usb/dwc2-regs.h:352:
+#define GLPMCFG_LPMCAP^I^I^IBIT(0)$

ERROR: code indent should never use tabs
#378: FILE: include/hw/usb/dwc2-regs.h:354:
+#define GPWRDN^I^I^I^IHSOTG_REG(0x0058)$

ERROR: code indent should never use tabs
#379: FILE: include/hw/usb/dwc2-regs.h:355:
+#define GPWRDN_MULT_VAL_ID_BC_MASK^I(0x1f << 24)$

ERROR: code indent should never use tabs
#380: FILE: include/hw/usb/dwc2-regs.h:356:
+#define GPWRDN_MULT_VAL_ID_BC_SHIFT^I24$

ERROR: code indent should never use tabs
#381: FILE: include/hw/usb/dwc2-regs.h:357:
+#define GPWRDN_ADP_INT^I^I^IBIT(23)$

ERROR: code indent should never use tabs
#382: FILE: include/hw/usb/dwc2-regs.h:358:
+#define GPWRDN_BSESSVLD^I^I^IBIT(22)$

ERROR: code indent should never use tabs
#383: FILE: include/hw/usb/dwc2-regs.h:359:
+#define GPWRDN_IDSTS^I^I^IBIT(21)$

ERROR: code indent should never use tabs
#384: FILE: include/hw/usb/dwc2-regs.h:360:
+#define GPWRDN_LINESTATE_MASK^I^I(0x3 << 19)$

ERROR: code indent should never use tabs
#385: FILE: include/hw/usb/dwc2-regs.h:361:
+#define GPWRDN_LINESTATE_SHIFT^I^I19$

ERROR: code indent should never use tabs
#386: FILE: include/hw/usb/dwc2-regs.h:362:
+#define GPWRDN_STS_CHGINT_MSK^I^IBIT(18)$

ERROR: code indent should never use tabs
#387: FILE: include/hw/usb/dwc2-regs.h:363:
+#define GPWRDN_STS_CHGINT^I^IBIT(17)$

ERROR: code indent should never use tabs
#388: FILE: include/hw/usb/dwc2-regs.h:364:
+#define GPWRDN_SRP_DET_MSK^I^IBIT(16)$

ERROR: code indent should never use tabs
#389: FILE: include/hw/usb/dwc2-regs.h:365:
+#define GPWRDN_SRP_DET^I^I^IBIT(15)$

ERROR: code indent should never use tabs
#390: FILE: include/hw/usb/dwc2-regs.h:366:
+#define GPWRDN_CONNECT_DET_MSK^I^IBIT(14)$

ERROR: code indent should never use tabs
#391: FILE: include/hw/usb/dwc2-regs.h:367:
+#define GPWRDN_CONNECT_DET^I^IBIT(13)$

ERROR: code indent should never use tabs
#392: FILE: include/hw/usb/dwc2-regs.h:368:
+#define GPWRDN_DISCONN_DET_MSK^I^IBIT(12)$

ERROR: code indent should never use tabs
#393: FILE: include/hw/usb/dwc2-regs.h:369:
+#define GPWRDN_DISCONN_DET^I^IBIT(11)$

ERROR: code indent should never use tabs
#394: FILE: include/hw/usb/dwc2-regs.h:370:
+#define GPWRDN_RST_DET_MSK^I^IBIT(10)$

ERROR: code indent should never use tabs
#395: FILE: include/hw/usb/dwc2-regs.h:371:
+#define GPWRDN_RST_DET^I^I^IBIT(9)$

ERROR: code indent should never use tabs
#396: FILE: include/hw/usb/dwc2-regs.h:372:
+#define GPWRDN_LNSTSCHG_MSK^I^IBIT(8)$

ERROR: code indent should never use tabs
#397: FILE: include/hw/usb/dwc2-regs.h:373:
+#define GPWRDN_LNSTSCHG^I^I^IBIT(7)$

ERROR: code indent should never use tabs
#398: FILE: include/hw/usb/dwc2-regs.h:374:
+#define GPWRDN_DIS_VBUS^I^I^IBIT(6)$

ERROR: code indent should never use tabs
#399: FILE: include/hw/usb/dwc2-regs.h:375:
+#define GPWRDN_PWRDNSWTCH^I^IBIT(5)$

ERROR: code indent should never use tabs
#400: FILE: include/hw/usb/dwc2-regs.h:376:
+#define GPWRDN_PWRDNRSTN^I^IBIT(4)$

ERROR: code indent should never use tabs
#401: FILE: include/hw/usb/dwc2-regs.h:377:
+#define GPWRDN_PWRDNCLMP^I^IBIT(3)$

ERROR: code indent should never use tabs
#402: FILE: include/hw/usb/dwc2-regs.h:378:
+#define GPWRDN_RESTORE^I^I^IBIT(2)$

ERROR: code indent should never use tabs
#403: FILE: include/hw/usb/dwc2-regs.h:379:
+#define GPWRDN_PMUACTV^I^I^IBIT(1)$

ERROR: code indent should never use tabs
#404: FILE: include/hw/usb/dwc2-regs.h:380:
+#define GPWRDN_PMUINTSEL^I^IBIT(0)$

ERROR: code indent should never use tabs
#406: FILE: include/hw/usb/dwc2-regs.h:382:
+#define GDFIFOCFG^I^I^IHSOTG_REG(0x005c)$

ERROR: code indent should never use tabs
#407: FILE: include/hw/usb/dwc2-regs.h:383:
+#define GDFIFOCFG_EPINFOBASE_MASK^I(0xffff << 16)$

ERROR: code indent should never use tabs
#408: FILE: include/hw/usb/dwc2-regs.h:384:
+#define GDFIFOCFG_EPINFOBASE_SHIFT^I16$

ERROR: code indent should never use tabs
#409: FILE: include/hw/usb/dwc2-regs.h:385:
+#define GDFIFOCFG_GDFIFOCFG_MASK^I(0xffff << 0)$

ERROR: code indent should never use tabs
#410: FILE: include/hw/usb/dwc2-regs.h:386:
+#define GDFIFOCFG_GDFIFOCFG_SHIFT^I0$

ERROR: code indent should never use tabs
#412: FILE: include/hw/usb/dwc2-regs.h:388:
+#define ADPCTL^I^I^I^IHSOTG_REG(0x0060)$

ERROR: code indent should never use tabs
#413: FILE: include/hw/usb/dwc2-regs.h:389:
+#define ADPCTL_AR_MASK^I^I^I(0x3 << 27)$

ERROR: code indent should never use tabs
#414: FILE: include/hw/usb/dwc2-regs.h:390:
+#define ADPCTL_AR_SHIFT^I^I^I27$

ERROR: code indent should never use tabs
#415: FILE: include/hw/usb/dwc2-regs.h:391:
+#define ADPCTL_ADP_TMOUT_INT_MSK^IBIT(26)$

ERROR: code indent should never use tabs
#416: FILE: include/hw/usb/dwc2-regs.h:392:
+#define ADPCTL_ADP_SNS_INT_MSK^I^IBIT(25)$

ERROR: code indent should never use tabs
#417: FILE: include/hw/usb/dwc2-regs.h:393:
+#define ADPCTL_ADP_PRB_INT_MSK^I^IBIT(24)$

ERROR: code indent should never use tabs
#418: FILE: include/hw/usb/dwc2-regs.h:394:
+#define ADPCTL_ADP_TMOUT_INT^I^IBIT(23)$

ERROR: code indent should never use tabs
#419: FILE: include/hw/usb/dwc2-regs.h:395:
+#define ADPCTL_ADP_SNS_INT^I^IBIT(22)$

ERROR: code indent should never use tabs
#420: FILE: include/hw/usb/dwc2-regs.h:396:
+#define ADPCTL_ADP_PRB_INT^I^IBIT(21)$

ERROR: code indent should never use tabs
#421: FILE: include/hw/usb/dwc2-regs.h:397:
+#define ADPCTL_ADPENA^I^I^IBIT(20)$

ERROR: code indent should never use tabs
#422: FILE: include/hw/usb/dwc2-regs.h:398:
+#define ADPCTL_ADPRES^I^I^IBIT(19)$

ERROR: code indent should never use tabs
#423: FILE: include/hw/usb/dwc2-regs.h:399:
+#define ADPCTL_ENASNS^I^I^IBIT(18)$

ERROR: code indent should never use tabs
#424: FILE: include/hw/usb/dwc2-regs.h:400:
+#define ADPCTL_ENAPRB^I^I^IBIT(17)$

ERROR: code indent should never use tabs
#425: FILE: include/hw/usb/dwc2-regs.h:401:
+#define ADPCTL_RTIM_MASK^I^I(0x7ff << 6)$

ERROR: code indent should never use tabs
#426: FILE: include/hw/usb/dwc2-regs.h:402:
+#define ADPCTL_RTIM_SHIFT^I^I6$

ERROR: code indent should never use tabs
#427: FILE: include/hw/usb/dwc2-regs.h:403:
+#define ADPCTL_PRB_PER_MASK^I^I(0x3 << 4)$

ERROR: code indent should never use tabs
#428: FILE: include/hw/usb/dwc2-regs.h:404:
+#define ADPCTL_PRB_PER_SHIFT^I^I4$

ERROR: code indent should never use tabs
#429: FILE: include/hw/usb/dwc2-regs.h:405:
+#define ADPCTL_PRB_DELTA_MASK^I^I(0x3 << 2)$

ERROR: code indent should never use tabs
#430: FILE: include/hw/usb/dwc2-regs.h:406:
+#define ADPCTL_PRB_DELTA_SHIFT^I^I2$

ERROR: code indent should never use tabs
#431: FILE: include/hw/usb/dwc2-regs.h:407:
+#define ADPCTL_PRB_DSCHRG_MASK^I^I(0x3 << 0)$

ERROR: code indent should never use tabs
#432: FILE: include/hw/usb/dwc2-regs.h:408:
+#define ADPCTL_PRB_DSCHRG_SHIFT^I^I0$

ERROR: code indent should never use tabs
#434: FILE: include/hw/usb/dwc2-regs.h:410:
+#define GREFCLK^I^I^I^I    HSOTG_REG(0x0064)$

ERROR: code indent should never use tabs
#435: FILE: include/hw/usb/dwc2-regs.h:411:
+#define GREFCLK_REFCLKPER_MASK^I^I    (0x1ffff << 15)$

ERROR: code indent should never use tabs
#436: FILE: include/hw/usb/dwc2-regs.h:412:
+#define GREFCLK_REFCLKPER_SHIFT^I^I    15$

ERROR: code indent should never use tabs
#437: FILE: include/hw/usb/dwc2-regs.h:413:
+#define GREFCLK_REF_CLK_MODE^I^I    BIT(14)$

ERROR: code indent should never use tabs
#438: FILE: include/hw/usb/dwc2-regs.h:414:
+#define GREFCLK_SOF_CNT_WKUP_ALERT_MASK^I    (0x3ff)$

ERROR: code indent should never use tabs
#441: FILE: include/hw/usb/dwc2-regs.h:417:
+#define GINTMSK2^I^I^IHSOTG_REG(0x0068)$

ERROR: code indent should never use tabs
#442: FILE: include/hw/usb/dwc2-regs.h:418:
+#define GINTMSK2_WKUP_ALERT_INT_MSK^IBIT(0)$

ERROR: code indent should never use tabs
#444: FILE: include/hw/usb/dwc2-regs.h:420:
+#define GINTSTS2^I^I^IHSOTG_REG(0x006c)$

ERROR: code indent should never use tabs
#445: FILE: include/hw/usb/dwc2-regs.h:421:
+#define GINTSTS2_WKUP_ALERT_INT^I^IBIT(0)$

ERROR: code indent should never use tabs
#447: FILE: include/hw/usb/dwc2-regs.h:423:
+#define HPTXFSIZ^I^I^IHSOTG_REG(0x100)$

ERROR: code indent should never use tabs
#450: FILE: include/hw/usb/dwc2-regs.h:426:
+#define DPTXFSIZN(_a)^I^I^IHSOTG_REG(0x104 + (((_a) - 1) * 4))$

ERROR: code indent should never use tabs
#454: FILE: include/hw/usb/dwc2-regs.h:430:
+#define FIFOSIZE_DEPTH_MASK^I^I(0xffff << 16)$

ERROR: code indent should never use tabs
#455: FILE: include/hw/usb/dwc2-regs.h:431:
+#define FIFOSIZE_DEPTH_SHIFT^I^I16$

ERROR: code indent should never use tabs
#456: FILE: include/hw/usb/dwc2-regs.h:432:
+#define FIFOSIZE_STARTADDR_MASK^I^I(0xffff << 0)$

ERROR: code indent should never use tabs
#457: FILE: include/hw/usb/dwc2-regs.h:433:
+#define FIFOSIZE_STARTADDR_SHIFT^I0$

ERROR: code indent should never use tabs
#458: FILE: include/hw/usb/dwc2-regs.h:434:
+#define FIFOSIZE_DEPTH_GET(_x)^I^I(((_x) >> 16) & 0xffff)$

ERROR: code indent should never use tabs
#462: FILE: include/hw/usb/dwc2-regs.h:438:
+#define DCFG^I^I^I^IHSOTG_REG(0x800)$

ERROR: code indent should never use tabs
#463: FILE: include/hw/usb/dwc2-regs.h:439:
+#define DCFG_DESCDMA_EN^I^I^IBIT(23)$

ERROR: code indent should never use tabs
#464: FILE: include/hw/usb/dwc2-regs.h:440:
+#define DCFG_EPMISCNT_MASK^I^I(0x1f << 18)$

ERROR: code indent should never use tabs
#465: FILE: include/hw/usb/dwc2-regs.h:441:
+#define DCFG_EPMISCNT_SHIFT^I^I18$

ERROR: code indent should never use tabs
#466: FILE: include/hw/usb/dwc2-regs.h:442:
+#define DCFG_EPMISCNT_LIMIT^I^I0x1f$

ERROR: code indent should never use tabs
#467: FILE: include/hw/usb/dwc2-regs.h:443:
+#define DCFG_EPMISCNT(_x)^I^I((_x) << 18)$

ERROR: code indent should never use tabs
#468: FILE: include/hw/usb/dwc2-regs.h:444:
+#define DCFG_IPG_ISOC_SUPPORDED^I^IBIT(17)$

ERROR: code indent should never use tabs
#469: FILE: include/hw/usb/dwc2-regs.h:445:
+#define DCFG_PERFRINT_MASK^I^I(0x3 << 11)$

ERROR: code indent should never use tabs
#470: FILE: include/hw/usb/dwc2-regs.h:446:
+#define DCFG_PERFRINT_SHIFT^I^I11$

ERROR: code indent should never use tabs
#471: FILE: include/hw/usb/dwc2-regs.h:447:
+#define DCFG_PERFRINT_LIMIT^I^I0x3$

ERROR: code indent should never use tabs
#472: FILE: include/hw/usb/dwc2-regs.h:448:
+#define DCFG_PERFRINT(_x)^I^I((_x) << 11)$

ERROR: code indent should never use tabs
#473: FILE: include/hw/usb/dwc2-regs.h:449:
+#define DCFG_DEVADDR_MASK^I^I(0x7f << 4)$

ERROR: code indent should never use tabs
#474: FILE: include/hw/usb/dwc2-regs.h:450:
+#define DCFG_DEVADDR_SHIFT^I^I4$

ERROR: code indent should never use tabs
#475: FILE: include/hw/usb/dwc2-regs.h:451:
+#define DCFG_DEVADDR_LIMIT^I^I0x7f$

ERROR: code indent should never use tabs
#476: FILE: include/hw/usb/dwc2-regs.h:452:
+#define DCFG_DEVADDR(_x)^I^I((_x) << 4)$

ERROR: code indent should never use tabs
#477: FILE: include/hw/usb/dwc2-regs.h:453:
+#define DCFG_NZ_STS_OUT_HSHK^I^IBIT(2)$

ERROR: code indent should never use tabs
#478: FILE: include/hw/usb/dwc2-regs.h:454:
+#define DCFG_DEVSPD_MASK^I^I(0x3 << 0)$

ERROR: code indent should never use tabs
#479: FILE: include/hw/usb/dwc2-regs.h:455:
+#define DCFG_DEVSPD_SHIFT^I^I0$

ERROR: code indent should never use tabs
#480: FILE: include/hw/usb/dwc2-regs.h:456:
+#define DCFG_DEVSPD_HS^I^I^I0$

ERROR: code indent should never use tabs
#481: FILE: include/hw/usb/dwc2-regs.h:457:
+#define DCFG_DEVSPD_FS^I^I^I1$

ERROR: code indent should never use tabs
#482: FILE: include/hw/usb/dwc2-regs.h:458:
+#define DCFG_DEVSPD_LS^I^I^I2$

ERROR: code indent should never use tabs
#483: FILE: include/hw/usb/dwc2-regs.h:459:
+#define DCFG_DEVSPD_FS48^I^I3$

ERROR: code indent should never use tabs
#485: FILE: include/hw/usb/dwc2-regs.h:461:
+#define DCTL^I^I^I^IHSOTG_REG(0x804)$

ERROR: code indent should never use tabs
#487: FILE: include/hw/usb/dwc2-regs.h:463:
+#define DCTL_PWRONPRGDONE^I^IBIT(11)$

ERROR: code indent should never use tabs
#488: FILE: include/hw/usb/dwc2-regs.h:464:
+#define DCTL_CGOUTNAK^I^I^IBIT(10)$

ERROR: code indent should never use tabs
#489: FILE: include/hw/usb/dwc2-regs.h:465:
+#define DCTL_SGOUTNAK^I^I^IBIT(9)$

ERROR: code indent should never use tabs
#490: FILE: include/hw/usb/dwc2-regs.h:466:
+#define DCTL_CGNPINNAK^I^I^IBIT(8)$

ERROR: code indent should never use tabs
#491: FILE: include/hw/usb/dwc2-regs.h:467:
+#define DCTL_SGNPINNAK^I^I^IBIT(7)$

ERROR: code indent should never use tabs
#492: FILE: include/hw/usb/dwc2-regs.h:468:
+#define DCTL_TSTCTL_MASK^I^I(0x7 << 4)$

ERROR: code indent should never use tabs
#493: FILE: include/hw/usb/dwc2-regs.h:469:
+#define DCTL_TSTCTL_SHIFT^I^I4$

ERROR: code indent should never use tabs
#494: FILE: include/hw/usb/dwc2-regs.h:470:
+#define DCTL_GOUTNAKSTS^I^I^IBIT(3)$

ERROR: code indent should never use tabs
#495: FILE: include/hw/usb/dwc2-regs.h:471:
+#define DCTL_GNPINNAKSTS^I^IBIT(2)$

ERROR: code indent should never use tabs
#496: FILE: include/hw/usb/dwc2-regs.h:472:
+#define DCTL_SFTDISCON^I^I^IBIT(1)$

ERROR: code indent should never use tabs
#497: FILE: include/hw/usb/dwc2-regs.h:473:
+#define DCTL_RMTWKUPSIG^I^I^IBIT(0)$

ERROR: code indent should never use tabs
#499: FILE: include/hw/usb/dwc2-regs.h:475:
+#define DSTS^I^I^I^IHSOTG_REG(0x808)$

ERROR: code indent should never use tabs
#500: FILE: include/hw/usb/dwc2-regs.h:476:
+#define DSTS_SOFFN_MASK^I^I^I(0x3fff << 8)$

ERROR: code indent should never use tabs
#501: FILE: include/hw/usb/dwc2-regs.h:477:
+#define DSTS_SOFFN_SHIFT^I^I8$

ERROR: code indent should never use tabs
#502: FILE: include/hw/usb/dwc2-regs.h:478:
+#define DSTS_SOFFN_LIMIT^I^I0x3fff$

ERROR: code indent should never use tabs
#503: FILE: include/hw/usb/dwc2-regs.h:479:
+#define DSTS_SOFFN(_x)^I^I^I((_x) << 8)$

ERROR: code indent should never use tabs
#504: FILE: include/hw/usb/dwc2-regs.h:480:
+#define DSTS_ERRATICERR^I^I^IBIT(3)$

ERROR: code indent should never use tabs
#505: FILE: include/hw/usb/dwc2-regs.h:481:
+#define DSTS_ENUMSPD_MASK^I^I(0x3 << 1)$

ERROR: code indent should never use tabs
#506: FILE: include/hw/usb/dwc2-regs.h:482:
+#define DSTS_ENUMSPD_SHIFT^I^I1$

ERROR: code indent should never use tabs
#507: FILE: include/hw/usb/dwc2-regs.h:483:
+#define DSTS_ENUMSPD_HS^I^I^I0$

ERROR: code indent should never use tabs
#508: FILE: include/hw/usb/dwc2-regs.h:484:
+#define DSTS_ENUMSPD_FS^I^I^I1$

ERROR: code indent should never use tabs
#509: FILE: include/hw/usb/dwc2-regs.h:485:
+#define DSTS_ENUMSPD_LS^I^I^I2$

ERROR: code indent should never use tabs
#510: FILE: include/hw/usb/dwc2-regs.h:486:
+#define DSTS_ENUMSPD_FS48^I^I3$

ERROR: code indent should never use tabs
#511: FILE: include/hw/usb/dwc2-regs.h:487:
+#define DSTS_SUSPSTS^I^I^IBIT(0)$

ERROR: code indent should never use tabs
#513: FILE: include/hw/usb/dwc2-regs.h:489:
+#define DIEPMSK^I^I^I^IHSOTG_REG(0x810)$

ERROR: code indent should never use tabs
#514: FILE: include/hw/usb/dwc2-regs.h:490:
+#define DIEPMSK_NAKMSK^I^I^IBIT(13)$

ERROR: code indent should never use tabs
#515: FILE: include/hw/usb/dwc2-regs.h:491:
+#define DIEPMSK_BNAININTRMSK^I^IBIT(9)$

ERROR: code indent should never use tabs
#516: FILE: include/hw/usb/dwc2-regs.h:492:
+#define DIEPMSK_TXFIFOUNDRNMSK^I^IBIT(8)$

ERROR: code indent should never use tabs
#517: FILE: include/hw/usb/dwc2-regs.h:493:
+#define DIEPMSK_TXFIFOEMPTY^I^IBIT(7)$

ERROR: code indent should never use tabs
#518: FILE: include/hw/usb/dwc2-regs.h:494:
+#define DIEPMSK_INEPNAKEFFMSK^I^IBIT(6)$

ERROR: code indent should never use tabs
#519: FILE: include/hw/usb/dwc2-regs.h:495:
+#define DIEPMSK_INTKNEPMISMSK^I^IBIT(5)$

ERROR: code indent should never use tabs
#520: FILE: include/hw/usb/dwc2-regs.h:496:
+#define DIEPMSK_INTKNTXFEMPMSK^I^IBIT(4)$

ERROR: code indent should never use tabs
#521: FILE: include/hw/usb/dwc2-regs.h:497:
+#define DIEPMSK_TIMEOUTMSK^I^IBIT(3)$

ERROR: code indent should never use tabs
#522: FILE: include/hw/usb/dwc2-regs.h:498:
+#define DIEPMSK_AHBERRMSK^I^IBIT(2)$

ERROR: code indent should never use tabs
#523: FILE: include/hw/usb/dwc2-regs.h:499:
+#define DIEPMSK_EPDISBLDMSK^I^IBIT(1)$

ERROR: code indent should never use tabs
#524: FILE: include/hw/usb/dwc2-regs.h:500:
+#define DIEPMSK_XFERCOMPLMSK^I^IBIT(0)$

ERROR: code indent should never use tabs
#526: FILE: include/hw/usb/dwc2-regs.h:502:
+#define DOEPMSK^I^I^I^IHSOTG_REG(0x814)$

ERROR: code indent should never use tabs
#527: FILE: include/hw/usb/dwc2-regs.h:503:
+#define DOEPMSK_BNAMSK^I^I^IBIT(9)$

ERROR: code indent should never use tabs
#528: FILE: include/hw/usb/dwc2-regs.h:504:
+#define DOEPMSK_BACK2BACKSETUP^I^IBIT(6)$

ERROR: code indent should never use tabs
#529: FILE: include/hw/usb/dwc2-regs.h:505:
+#define DOEPMSK_STSPHSERCVDMSK^I^IBIT(5)$

ERROR: code indent should never use tabs
#530: FILE: include/hw/usb/dwc2-regs.h:506:
+#define DOEPMSK_OUTTKNEPDISMSK^I^IBIT(4)$

ERROR: code indent should never use tabs
#531: FILE: include/hw/usb/dwc2-regs.h:507:
+#define DOEPMSK_SETUPMSK^I^IBIT(3)$

ERROR: code indent should never use tabs
#532: FILE: include/hw/usb/dwc2-regs.h:508:
+#define DOEPMSK_AHBERRMSK^I^IBIT(2)$

ERROR: code indent should never use tabs
#533: FILE: include/hw/usb/dwc2-regs.h:509:
+#define DOEPMSK_EPDISBLDMSK^I^IBIT(1)$

ERROR: code indent should never use tabs
#534: FILE: include/hw/usb/dwc2-regs.h:510:
+#define DOEPMSK_XFERCOMPLMSK^I^IBIT(0)$

ERROR: code indent should never use tabs
#536: FILE: include/hw/usb/dwc2-regs.h:512:
+#define DAINT^I^I^I^IHSOTG_REG(0x818)$

ERROR: code indent should never use tabs
#537: FILE: include/hw/usb/dwc2-regs.h:513:
+#define DAINTMSK^I^I^IHSOTG_REG(0x81C)$

ERROR: code indent should never use tabs
#538: FILE: include/hw/usb/dwc2-regs.h:514:
+#define DAINT_OUTEP_SHIFT^I^I16$

ERROR: code indent should never use tabs
#539: FILE: include/hw/usb/dwc2-regs.h:515:
+#define DAINT_OUTEP(_x)^I^I^I(1 << ((_x) + 16))$

ERROR: code indent should never use tabs
#540: FILE: include/hw/usb/dwc2-regs.h:516:
+#define DAINT_INEP(_x)^I^I^I(1 << (_x))$

ERROR: code indent should never use tabs
#542: FILE: include/hw/usb/dwc2-regs.h:518:
+#define DTKNQR1^I^I^I^IHSOTG_REG(0x820)$

ERROR: code indent should never use tabs
#543: FILE: include/hw/usb/dwc2-regs.h:519:
+#define DTKNQR2^I^I^I^IHSOTG_REG(0x824)$

ERROR: code indent should never use tabs
#544: FILE: include/hw/usb/dwc2-regs.h:520:
+#define DTKNQR3^I^I^I^IHSOTG_REG(0x830)$

ERROR: code indent should never use tabs
#545: FILE: include/hw/usb/dwc2-regs.h:521:
+#define DTKNQR4^I^I^I^IHSOTG_REG(0x834)$

ERROR: code indent should never use tabs
#546: FILE: include/hw/usb/dwc2-regs.h:522:
+#define DIEPEMPMSK^I^I^IHSOTG_REG(0x834)$

ERROR: code indent should never use tabs
#548: FILE: include/hw/usb/dwc2-regs.h:524:
+#define DVBUSDIS^I^I^IHSOTG_REG(0x828)$

ERROR: code indent should never use tabs
#549: FILE: include/hw/usb/dwc2-regs.h:525:
+#define DVBUSPULSE^I^I^IHSOTG_REG(0x82C)$

ERROR: code indent should never use tabs
#551: FILE: include/hw/usb/dwc2-regs.h:527:
+#define DIEPCTL0^I^I^IHSOTG_REG(0x900)$

ERROR: code indent should never use tabs
#552: FILE: include/hw/usb/dwc2-regs.h:528:
+#define DIEPCTL(_a)^I^I^IHSOTG_REG(0x900 + ((_a) * 0x20))$

ERROR: code indent should never use tabs
#554: FILE: include/hw/usb/dwc2-regs.h:530:
+#define DOEPCTL0^I^I^IHSOTG_REG(0xB00)$

ERROR: code indent should never use tabs
#555: FILE: include/hw/usb/dwc2-regs.h:531:
+#define DOEPCTL(_a)^I^I^IHSOTG_REG(0xB00 + ((_a) * 0x20))$

WARNING: Block comments use a leading /* on a separate line
#557: FILE: include/hw/usb/dwc2-regs.h:533:
+/* EP0 specialness:

ERROR: code indent should never use tabs
#562: FILE: include/hw/usb/dwc2-regs.h:538:
+#define D0EPCTL_MPS_MASK^I^I(0x3 << 0)$

ERROR: code indent should never use tabs
#563: FILE: include/hw/usb/dwc2-regs.h:539:
+#define D0EPCTL_MPS_SHIFT^I^I0$

ERROR: code indent should never use tabs
#564: FILE: include/hw/usb/dwc2-regs.h:540:
+#define D0EPCTL_MPS_64^I^I^I0$

ERROR: code indent should never use tabs
#565: FILE: include/hw/usb/dwc2-regs.h:541:
+#define D0EPCTL_MPS_32^I^I^I1$

ERROR: code indent should never use tabs
#566: FILE: include/hw/usb/dwc2-regs.h:542:
+#define D0EPCTL_MPS_16^I^I^I2$

ERROR: code indent should never use tabs
#567: FILE: include/hw/usb/dwc2-regs.h:543:
+#define D0EPCTL_MPS_8^I^I^I3$

ERROR: code indent should never use tabs
#569: FILE: include/hw/usb/dwc2-regs.h:545:
+#define DXEPCTL_EPENA^I^I^IBIT(31)$

ERROR: code indent should never use tabs
#570: FILE: include/hw/usb/dwc2-regs.h:546:
+#define DXEPCTL_EPDIS^I^I^IBIT(30)$

ERROR: code indent should never use tabs
#571: FILE: include/hw/usb/dwc2-regs.h:547:
+#define DXEPCTL_SETD1PID^I^IBIT(29)$

ERROR: code indent should never use tabs
#572: FILE: include/hw/usb/dwc2-regs.h:548:
+#define DXEPCTL_SETODDFR^I^IBIT(29)$

ERROR: code indent should never use tabs
#573: FILE: include/hw/usb/dwc2-regs.h:549:
+#define DXEPCTL_SETD0PID^I^IBIT(28)$

ERROR: code indent should never use tabs
#574: FILE: include/hw/usb/dwc2-regs.h:550:
+#define DXEPCTL_SETEVENFR^I^IBIT(28)$

ERROR: code indent should never use tabs
#575: FILE: include/hw/usb/dwc2-regs.h:551:
+#define DXEPCTL_SNAK^I^I^IBIT(27)$

ERROR: code indent should never use tabs
#576: FILE: include/hw/usb/dwc2-regs.h:552:
+#define DXEPCTL_CNAK^I^I^IBIT(26)$

ERROR: code indent should never use tabs
#577: FILE: include/hw/usb/dwc2-regs.h:553:
+#define DXEPCTL_TXFNUM_MASK^I^I(0xf << 22)$

ERROR: code indent should never use tabs
#578: FILE: include/hw/usb/dwc2-regs.h:554:
+#define DXEPCTL_TXFNUM_SHIFT^I^I22$

ERROR: code indent should never use tabs
#579: FILE: include/hw/usb/dwc2-regs.h:555:
+#define DXEPCTL_TXFNUM_LIMIT^I^I0xf$

ERROR: code indent should never use tabs
#580: FILE: include/hw/usb/dwc2-regs.h:556:
+#define DXEPCTL_TXFNUM(_x)^I^I((_x) << 22)$

ERROR: code indent should never use tabs
#581: FILE: include/hw/usb/dwc2-regs.h:557:
+#define DXEPCTL_STALL^I^I^IBIT(21)$

ERROR: code indent should never use tabs
#582: FILE: include/hw/usb/dwc2-regs.h:558:
+#define DXEPCTL_SNP^I^I^IBIT(20)$

ERROR: code indent should never use tabs
#583: FILE: include/hw/usb/dwc2-regs.h:559:
+#define DXEPCTL_EPTYPE_MASK^I^I(0x3 << 18)$

ERROR: code indent should never use tabs
#584: FILE: include/hw/usb/dwc2-regs.h:560:
+#define DXEPCTL_EPTYPE_CONTROL^I^I(0x0 << 18)$

ERROR: code indent should never use tabs
#585: FILE: include/hw/usb/dwc2-regs.h:561:
+#define DXEPCTL_EPTYPE_ISO^I^I(0x1 << 18)$

ERROR: code indent should never use tabs
#586: FILE: include/hw/usb/dwc2-regs.h:562:
+#define DXEPCTL_EPTYPE_BULK^I^I(0x2 << 18)$

ERROR: code indent should never use tabs
#587: FILE: include/hw/usb/dwc2-regs.h:563:
+#define DXEPCTL_EPTYPE_INTERRUPT^I(0x3 << 18)$

ERROR: code indent should never use tabs
#589: FILE: include/hw/usb/dwc2-regs.h:565:
+#define DXEPCTL_NAKSTS^I^I^IBIT(17)$

ERROR: code indent should never use tabs
#590: FILE: include/hw/usb/dwc2-regs.h:566:
+#define DXEPCTL_DPID^I^I^IBIT(16)$

ERROR: code indent should never use tabs
#591: FILE: include/hw/usb/dwc2-regs.h:567:
+#define DXEPCTL_EOFRNUM^I^I^IBIT(16)$

ERROR: code indent should never use tabs
#592: FILE: include/hw/usb/dwc2-regs.h:568:
+#define DXEPCTL_USBACTEP^I^IBIT(15)$

ERROR: code indent should never use tabs
#593: FILE: include/hw/usb/dwc2-regs.h:569:
+#define DXEPCTL_NEXTEP_MASK^I^I(0xf << 11)$

ERROR: code indent should never use tabs
#594: FILE: include/hw/usb/dwc2-regs.h:570:
+#define DXEPCTL_NEXTEP_SHIFT^I^I11$

ERROR: code indent should never use tabs
#595: FILE: include/hw/usb/dwc2-regs.h:571:
+#define DXEPCTL_NEXTEP_LIMIT^I^I0xf$

ERROR: code indent should never use tabs
#596: FILE: include/hw/usb/dwc2-regs.h:572:
+#define DXEPCTL_NEXTEP(_x)^I^I((_x) << 11)$

ERROR: code indent should never use tabs
#597: FILE: include/hw/usb/dwc2-regs.h:573:
+#define DXEPCTL_MPS_MASK^I^I(0x7ff << 0)$

ERROR: code indent should never use tabs
#598: FILE: include/hw/usb/dwc2-regs.h:574:
+#define DXEPCTL_MPS_SHIFT^I^I0$

ERROR: code indent should never use tabs
#599: FILE: include/hw/usb/dwc2-regs.h:575:
+#define DXEPCTL_MPS_LIMIT^I^I0x7ff$

ERROR: code indent should never use tabs
#600: FILE: include/hw/usb/dwc2-regs.h:576:
+#define DXEPCTL_MPS(_x)^I^I^I((_x) << 0)$

ERROR: code indent should never use tabs
#602: FILE: include/hw/usb/dwc2-regs.h:578:
+#define DIEPINT(_a)^I^I^IHSOTG_REG(0x908 + ((_a) * 0x20))$

ERROR: code indent should never use tabs
#603: FILE: include/hw/usb/dwc2-regs.h:579:
+#define DOEPINT(_a)^I^I^IHSOTG_REG(0xB08 + ((_a) * 0x20))$

ERROR: code indent should never use tabs
#604: FILE: include/hw/usb/dwc2-regs.h:580:
+#define DXEPINT_SETUP_RCVD^I^IBIT(15)$

ERROR: code indent should never use tabs
#605: FILE: include/hw/usb/dwc2-regs.h:581:
+#define DXEPINT_NYETINTRPT^I^IBIT(14)$

ERROR: code indent should never use tabs
#606: FILE: include/hw/usb/dwc2-regs.h:582:
+#define DXEPINT_NAKINTRPT^I^IBIT(13)$

ERROR: code indent should never use tabs
#607: FILE: include/hw/usb/dwc2-regs.h:583:
+#define DXEPINT_BBLEERRINTRPT^I^IBIT(12)$

ERROR: code indent should never use tabs
#608: FILE: include/hw/usb/dwc2-regs.h:584:
+#define DXEPINT_PKTDRPSTS^I^IBIT(11)$

ERROR: code indent should never use tabs
#609: FILE: include/hw/usb/dwc2-regs.h:585:
+#define DXEPINT_BNAINTR^I^I^IBIT(9)$

ERROR: code indent should never use tabs
#610: FILE: include/hw/usb/dwc2-regs.h:586:
+#define DXEPINT_TXFIFOUNDRN^I^IBIT(8)$

ERROR: code indent should never use tabs
#611: FILE: include/hw/usb/dwc2-regs.h:587:
+#define DXEPINT_OUTPKTERR^I^IBIT(8)$

ERROR: code indent should never use tabs
#612: FILE: include/hw/usb/dwc2-regs.h:588:
+#define DXEPINT_TXFEMP^I^I^IBIT(7)$

ERROR: code indent should never use tabs
#613: FILE: include/hw/usb/dwc2-regs.h:589:
+#define DXEPINT_INEPNAKEFF^I^IBIT(6)$

ERROR: code indent should never use tabs
#614: FILE: include/hw/usb/dwc2-regs.h:590:
+#define DXEPINT_BACK2BACKSETUP^I^IBIT(6)$

ERROR: code indent should never use tabs
#615: FILE: include/hw/usb/dwc2-regs.h:591:
+#define DXEPINT_INTKNEPMIS^I^IBIT(5)$

ERROR: code indent should never use tabs
#616: FILE: include/hw/usb/dwc2-regs.h:592:
+#define DXEPINT_STSPHSERCVD^I^IBIT(5)$

ERROR: code indent should never use tabs
#617: FILE: include/hw/usb/dwc2-regs.h:593:
+#define DXEPINT_INTKNTXFEMP^I^IBIT(4)$

ERROR: code indent should never use tabs
#618: FILE: include/hw/usb/dwc2-regs.h:594:
+#define DXEPINT_OUTTKNEPDIS^I^IBIT(4)$

ERROR: code indent should never use tabs
#619: FILE: include/hw/usb/dwc2-regs.h:595:
+#define DXEPINT_TIMEOUT^I^I^IBIT(3)$

ERROR: code indent should never use tabs
#620: FILE: include/hw/usb/dwc2-regs.h:596:
+#define DXEPINT_SETUP^I^I^IBIT(3)$

ERROR: code indent should never use tabs
#621: FILE: include/hw/usb/dwc2-regs.h:597:
+#define DXEPINT_AHBERR^I^I^IBIT(2)$

ERROR: code indent should never use tabs
#622: FILE: include/hw/usb/dwc2-regs.h:598:
+#define DXEPINT_EPDISBLD^I^IBIT(1)$

ERROR: code indent should never use tabs
#623: FILE: include/hw/usb/dwc2-regs.h:599:
+#define DXEPINT_XFERCOMPL^I^IBIT(0)$

ERROR: code indent should never use tabs
#625: FILE: include/hw/usb/dwc2-regs.h:601:
+#define DIEPTSIZ0^I^I^IHSOTG_REG(0x910)$

ERROR: code indent should never use tabs
#626: FILE: include/hw/usb/dwc2-regs.h:602:
+#define DIEPTSIZ0_PKTCNT_MASK^I^I(0x3 << 19)$

ERROR: code indent should never use tabs
#627: FILE: include/hw/usb/dwc2-regs.h:603:
+#define DIEPTSIZ0_PKTCNT_SHIFT^I^I19$

ERROR: code indent should never use tabs
#628: FILE: include/hw/usb/dwc2-regs.h:604:
+#define DIEPTSIZ0_PKTCNT_LIMIT^I^I0x3$

ERROR: code indent should never use tabs
#629: FILE: include/hw/usb/dwc2-regs.h:605:
+#define DIEPTSIZ0_PKTCNT(_x)^I^I((_x) << 19)$

ERROR: code indent should never use tabs
#630: FILE: include/hw/usb/dwc2-regs.h:606:
+#define DIEPTSIZ0_XFERSIZE_MASK^I^I(0x7f << 0)$

ERROR: code indent should never use tabs
#631: FILE: include/hw/usb/dwc2-regs.h:607:
+#define DIEPTSIZ0_XFERSIZE_SHIFT^I0$

ERROR: code indent should never use tabs
#632: FILE: include/hw/usb/dwc2-regs.h:608:
+#define DIEPTSIZ0_XFERSIZE_LIMIT^I0x7f$

ERROR: code indent should never use tabs
#633: FILE: include/hw/usb/dwc2-regs.h:609:
+#define DIEPTSIZ0_XFERSIZE(_x)^I^I((_x) << 0)$

ERROR: code indent should never use tabs
#635: FILE: include/hw/usb/dwc2-regs.h:611:
+#define DOEPTSIZ0^I^I^IHSOTG_REG(0xB10)$

ERROR: code indent should never use tabs
#636: FILE: include/hw/usb/dwc2-regs.h:612:
+#define DOEPTSIZ0_SUPCNT_MASK^I^I(0x3 << 29)$

ERROR: code indent should never use tabs
#637: FILE: include/hw/usb/dwc2-regs.h:613:
+#define DOEPTSIZ0_SUPCNT_SHIFT^I^I29$

ERROR: code indent should never use tabs
#638: FILE: include/hw/usb/dwc2-regs.h:614:
+#define DOEPTSIZ0_SUPCNT_LIMIT^I^I0x3$

ERROR: code indent should never use tabs
#639: FILE: include/hw/usb/dwc2-regs.h:615:
+#define DOEPTSIZ0_SUPCNT(_x)^I^I((_x) << 29)$

ERROR: code indent should never use tabs
#640: FILE: include/hw/usb/dwc2-regs.h:616:
+#define DOEPTSIZ0_PKTCNT^I^IBIT(19)$

ERROR: code indent should never use tabs
#641: FILE: include/hw/usb/dwc2-regs.h:617:
+#define DOEPTSIZ0_XFERSIZE_MASK^I^I(0x7f << 0)$

ERROR: code indent should never use tabs
#642: FILE: include/hw/usb/dwc2-regs.h:618:
+#define DOEPTSIZ0_XFERSIZE_SHIFT^I0$

ERROR: code indent should never use tabs
#644: FILE: include/hw/usb/dwc2-regs.h:620:
+#define DIEPTSIZ(_a)^I^I^IHSOTG_REG(0x910 + ((_a) * 0x20))$

ERROR: code indent should never use tabs
#645: FILE: include/hw/usb/dwc2-regs.h:621:
+#define DOEPTSIZ(_a)^I^I^IHSOTG_REG(0xB10 + ((_a) * 0x20))$

ERROR: code indent should never use tabs
#646: FILE: include/hw/usb/dwc2-regs.h:622:
+#define DXEPTSIZ_MC_MASK^I^I(0x3 << 29)$

ERROR: code indent should never use tabs
#647: FILE: include/hw/usb/dwc2-regs.h:623:
+#define DXEPTSIZ_MC_SHIFT^I^I29$

ERROR: code indent should never use tabs
#648: FILE: include/hw/usb/dwc2-regs.h:624:
+#define DXEPTSIZ_MC_LIMIT^I^I0x3$

ERROR: code indent should never use tabs
#649: FILE: include/hw/usb/dwc2-regs.h:625:
+#define DXEPTSIZ_MC(_x)^I^I^I((_x) << 29)$

ERROR: code indent should never use tabs
#650: FILE: include/hw/usb/dwc2-regs.h:626:
+#define DXEPTSIZ_PKTCNT_MASK^I^I(0x3ff << 19)$

ERROR: code indent should never use tabs
#651: FILE: include/hw/usb/dwc2-regs.h:627:
+#define DXEPTSIZ_PKTCNT_SHIFT^I^I19$

ERROR: code indent should never use tabs
#652: FILE: include/hw/usb/dwc2-regs.h:628:
+#define DXEPTSIZ_PKTCNT_LIMIT^I^I0x3ff$

ERROR: code indent should never use tabs
#653: FILE: include/hw/usb/dwc2-regs.h:629:
+#define DXEPTSIZ_PKTCNT_GET(_v)^I^I(((_v) >> 19) & 0x3ff)$

ERROR: code indent should never use tabs
#654: FILE: include/hw/usb/dwc2-regs.h:630:
+#define DXEPTSIZ_PKTCNT(_x)^I^I((_x) << 19)$

ERROR: code indent should never use tabs
#655: FILE: include/hw/usb/dwc2-regs.h:631:
+#define DXEPTSIZ_XFERSIZE_MASK^I^I(0x7ffff << 0)$

ERROR: code indent should never use tabs
#656: FILE: include/hw/usb/dwc2-regs.h:632:
+#define DXEPTSIZ_XFERSIZE_SHIFT^I^I0$

ERROR: code indent should never use tabs
#657: FILE: include/hw/usb/dwc2-regs.h:633:
+#define DXEPTSIZ_XFERSIZE_LIMIT^I^I0x7ffff$

ERROR: code indent should never use tabs
#658: FILE: include/hw/usb/dwc2-regs.h:634:
+#define DXEPTSIZ_XFERSIZE_GET(_v)^I(((_v) >> 0) & 0x7ffff)$

ERROR: code indent should never use tabs
#659: FILE: include/hw/usb/dwc2-regs.h:635:
+#define DXEPTSIZ_XFERSIZE(_x)^I^I((_x) << 0)$

ERROR: code indent should never use tabs
#661: FILE: include/hw/usb/dwc2-regs.h:637:
+#define DIEPDMA(_a)^I^I^IHSOTG_REG(0x914 + ((_a) * 0x20))$

ERROR: code indent should never use tabs
#662: FILE: include/hw/usb/dwc2-regs.h:638:
+#define DOEPDMA(_a)^I^I^IHSOTG_REG(0xB14 + ((_a) * 0x20))$

ERROR: code indent should never use tabs
#664: FILE: include/hw/usb/dwc2-regs.h:640:
+#define DTXFSTS(_a)^I^I^IHSOTG_REG(0x918 + ((_a) * 0x20))$

ERROR: code indent should never use tabs
#666: FILE: include/hw/usb/dwc2-regs.h:642:
+#define PCGCTL^I^I^I^IHSOTG_REG(0x0e00)$

ERROR: code indent should never use tabs
#667: FILE: include/hw/usb/dwc2-regs.h:643:
+#define PCGCTL_IF_DEV_MODE^I^IBIT(31)$

ERROR: code indent should never use tabs
#668: FILE: include/hw/usb/dwc2-regs.h:644:
+#define PCGCTL_P2HD_PRT_SPD_MASK^I(0x3 << 29)$

ERROR: code indent should never use tabs
#669: FILE: include/hw/usb/dwc2-regs.h:645:
+#define PCGCTL_P2HD_PRT_SPD_SHIFT^I29$

ERROR: code indent should never use tabs
#670: FILE: include/hw/usb/dwc2-regs.h:646:
+#define PCGCTL_P2HD_DEV_ENUM_SPD_MASK^I(0x3 << 27)$

ERROR: code indent should never use tabs
#671: FILE: include/hw/usb/dwc2-regs.h:647:
+#define PCGCTL_P2HD_DEV_ENUM_SPD_SHIFT^I27$

ERROR: code indent should never use tabs
#672: FILE: include/hw/usb/dwc2-regs.h:648:
+#define PCGCTL_MAC_DEV_ADDR_MASK^I(0x7f << 20)$

ERROR: code indent should never use tabs
#673: FILE: include/hw/usb/dwc2-regs.h:649:
+#define PCGCTL_MAC_DEV_ADDR_SHIFT^I20$

ERROR: code indent should never use tabs
#674: FILE: include/hw/usb/dwc2-regs.h:650:
+#define PCGCTL_MAX_TERMSEL^I^IBIT(19)$

ERROR: code indent should never use tabs
#675: FILE: include/hw/usb/dwc2-regs.h:651:
+#define PCGCTL_MAX_XCVRSELECT_MASK^I(0x3 << 17)$

ERROR: code indent should never use tabs
#676: FILE: include/hw/usb/dwc2-regs.h:652:
+#define PCGCTL_MAX_XCVRSELECT_SHIFT^I17$

ERROR: code indent should never use tabs
#677: FILE: include/hw/usb/dwc2-regs.h:653:
+#define PCGCTL_PORT_POWER^I^IBIT(16)$

ERROR: code indent should never use tabs
#678: FILE: include/hw/usb/dwc2-regs.h:654:
+#define PCGCTL_PRT_CLK_SEL_MASK^I^I(0x3 << 14)$

ERROR: code indent should never use tabs
#679: FILE: include/hw/usb/dwc2-regs.h:655:
+#define PCGCTL_PRT_CLK_SEL_SHIFT^I14$

ERROR: code indent should never use tabs
#680: FILE: include/hw/usb/dwc2-regs.h:656:
+#define PCGCTL_ESS_REG_RESTORED^I^IBIT(13)$

ERROR: code indent should never use tabs
#681: FILE: include/hw/usb/dwc2-regs.h:657:
+#define PCGCTL_EXTND_HIBER_SWITCH^IBIT(12)$

ERROR: code indent should never use tabs
#682: FILE: include/hw/usb/dwc2-regs.h:658:
+#define PCGCTL_EXTND_HIBER_PWRCLMP^IBIT(11)$

ERROR: code indent should never use tabs
#683: FILE: include/hw/usb/dwc2-regs.h:659:
+#define PCGCTL_ENBL_EXTND_HIBER^I^IBIT(10)$

ERROR: code indent should never use tabs
#684: FILE: include/hw/usb/dwc2-regs.h:660:
+#define PCGCTL_RESTOREMODE^I^IBIT(9)$

ERROR: code indent should never use tabs
#685: FILE: include/hw/usb/dwc2-regs.h:661:
+#define PCGCTL_RESETAFTSUSP^I^IBIT(8)$

ERROR: code indent should never use tabs
#686: FILE: include/hw/usb/dwc2-regs.h:662:
+#define PCGCTL_DEEP_SLEEP^I^IBIT(7)$

ERROR: code indent should never use tabs
#687: FILE: include/hw/usb/dwc2-regs.h:663:
+#define PCGCTL_PHY_IN_SLEEP^I^IBIT(6)$

ERROR: code indent should never use tabs
#688: FILE: include/hw/usb/dwc2-regs.h:664:
+#define PCGCTL_ENBL_SLEEP_GATING^IBIT(5)$

ERROR: code indent should never use tabs
#689: FILE: include/hw/usb/dwc2-regs.h:665:
+#define PCGCTL_RSTPDWNMODULE^I^IBIT(3)$

ERROR: code indent should never use tabs
#690: FILE: include/hw/usb/dwc2-regs.h:666:
+#define PCGCTL_PWRCLMP^I^I^IBIT(2)$

ERROR: code indent should never use tabs
#691: FILE: include/hw/usb/dwc2-regs.h:667:
+#define PCGCTL_GATEHCLK^I^I^IBIT(1)$

ERROR: code indent should never use tabs
#692: FILE: include/hw/usb/dwc2-regs.h:668:
+#define PCGCTL_STOPPCLK^I^I^IBIT(0)$

ERROR: code indent should never use tabs
#698: FILE: include/hw/usb/dwc2-regs.h:674:
+#define EPFIFO(_a)^I^I^IHSOTG_REG(0x1000 + ((_a) * 0x1000))$

ERROR: code indent should never use tabs
#702: FILE: include/hw/usb/dwc2-regs.h:678:
+#define HCFG^I^I^I^IHSOTG_REG(0x0400)$

ERROR: code indent should never use tabs
#703: FILE: include/hw/usb/dwc2-regs.h:679:
+#define HCFG_MODECHTIMEN^I^IBIT(31)$

ERROR: code indent should never use tabs
#704: FILE: include/hw/usb/dwc2-regs.h:680:
+#define HCFG_PERSCHEDENA^I^IBIT(26)$

ERROR: code indent should never use tabs
#705: FILE: include/hw/usb/dwc2-regs.h:681:
+#define HCFG_FRLISTEN_MASK^I^I(0x3 << 24)$

ERROR: code indent should never use tabs
#706: FILE: include/hw/usb/dwc2-regs.h:682:
+#define HCFG_FRLISTEN_SHIFT^I^I24$

ERROR: code indent should never use tabs
#707: FILE: include/hw/usb/dwc2-regs.h:683:
+#define HCFG_FRLISTEN_8^I^I^I^I(0 << 24)$

ERROR: code indent should never use tabs
#708: FILE: include/hw/usb/dwc2-regs.h:684:
+#define FRLISTEN_8_SIZE^I^I^I^I8$

ERROR: code indent should never use tabs
#709: FILE: include/hw/usb/dwc2-regs.h:685:
+#define HCFG_FRLISTEN_16^I^I^IBIT(24)$

ERROR: code indent should never use tabs
#710: FILE: include/hw/usb/dwc2-regs.h:686:
+#define FRLISTEN_16_SIZE^I^I^I16$

ERROR: code indent should never use tabs
#711: FILE: include/hw/usb/dwc2-regs.h:687:
+#define HCFG_FRLISTEN_32^I^I^I(2 << 24)$

ERROR: code indent should never use tabs
#712: FILE: include/hw/usb/dwc2-regs.h:688:
+#define FRLISTEN_32_SIZE^I^I^I32$

ERROR: code indent should never use tabs
#713: FILE: include/hw/usb/dwc2-regs.h:689:
+#define HCFG_FRLISTEN_64^I^I^I(3 << 24)$

ERROR: code indent should never use tabs
#714: FILE: include/hw/usb/dwc2-regs.h:690:
+#define FRLISTEN_64_SIZE^I^I^I64$

ERROR: code indent should never use tabs
#715: FILE: include/hw/usb/dwc2-regs.h:691:
+#define HCFG_DESCDMA^I^I^IBIT(23)$

ERROR: code indent should never use tabs
#716: FILE: include/hw/usb/dwc2-regs.h:692:
+#define HCFG_RESVALID_MASK^I^I(0xff << 8)$

ERROR: code indent should never use tabs
#717: FILE: include/hw/usb/dwc2-regs.h:693:
+#define HCFG_RESVALID_SHIFT^I^I8$

ERROR: code indent should never use tabs
#718: FILE: include/hw/usb/dwc2-regs.h:694:
+#define HCFG_ENA32KHZ^I^I^IBIT(7)$

ERROR: code indent should never use tabs
#719: FILE: include/hw/usb/dwc2-regs.h:695:
+#define HCFG_FSLSSUPP^I^I^IBIT(2)$

ERROR: code indent should never use tabs
#720: FILE: include/hw/usb/dwc2-regs.h:696:
+#define HCFG_FSLSPCLKSEL_MASK^I^I(0x3 << 0)$

ERROR: code indent should never use tabs
#721: FILE: include/hw/usb/dwc2-regs.h:697:
+#define HCFG_FSLSPCLKSEL_SHIFT^I^I0$

ERROR: code indent should never use tabs
#722: FILE: include/hw/usb/dwc2-regs.h:698:
+#define HCFG_FSLSPCLKSEL_30_60_MHZ^I0$

ERROR: code indent should never use tabs
#723: FILE: include/hw/usb/dwc2-regs.h:699:
+#define HCFG_FSLSPCLKSEL_48_MHZ^I^I1$

ERROR: code indent should never use tabs
#724: FILE: include/hw/usb/dwc2-regs.h:700:
+#define HCFG_FSLSPCLKSEL_6_MHZ^I^I2$

ERROR: code indent should never use tabs
#726: FILE: include/hw/usb/dwc2-regs.h:702:
+#define HFIR^I^I^I^IHSOTG_REG(0x0404)$

ERROR: code indent should never use tabs
#727: FILE: include/hw/usb/dwc2-regs.h:703:
+#define HFIR_FRINT_MASK^I^I^I(0xffff << 0)$

ERROR: code indent should never use tabs
#728: FILE: include/hw/usb/dwc2-regs.h:704:
+#define HFIR_FRINT_SHIFT^I^I0$

ERROR: code indent should never use tabs
#729: FILE: include/hw/usb/dwc2-regs.h:705:
+#define HFIR_RLDCTRL^I^I^IBIT(16)$

ERROR: code indent should never use tabs
#731: FILE: include/hw/usb/dwc2-regs.h:707:
+#define HFNUM^I^I^I^IHSOTG_REG(0x0408)$

ERROR: code indent should never use tabs
#732: FILE: include/hw/usb/dwc2-regs.h:708:
+#define HFNUM_FRREM_MASK^I^I(0xffff << 16)$

ERROR: code indent should never use tabs
#733: FILE: include/hw/usb/dwc2-regs.h:709:
+#define HFNUM_FRREM_SHIFT^I^I16$

ERROR: code indent should never use tabs
#734: FILE: include/hw/usb/dwc2-regs.h:710:
+#define HFNUM_FRNUM_MASK^I^I(0xffff << 0)$

ERROR: code indent should never use tabs
#735: FILE: include/hw/usb/dwc2-regs.h:711:
+#define HFNUM_FRNUM_SHIFT^I^I0$

ERROR: code indent should never use tabs
#736: FILE: include/hw/usb/dwc2-regs.h:712:
+#define HFNUM_MAX_FRNUM^I^I^I0x3fff$

ERROR: code indent should never use tabs
#738: FILE: include/hw/usb/dwc2-regs.h:714:
+#define HPTXSTS^I^I^I^IHSOTG_REG(0x0410)$

ERROR: code indent should never use tabs
#739: FILE: include/hw/usb/dwc2-regs.h:715:
+#define TXSTS_QTOP_ODD^I^I^IBIT(31)$

ERROR: code indent should never use tabs
#740: FILE: include/hw/usb/dwc2-regs.h:716:
+#define TXSTS_QTOP_CHNEP_MASK^I^I(0xf << 27)$

ERROR: code indent should never use tabs
#741: FILE: include/hw/usb/dwc2-regs.h:717:
+#define TXSTS_QTOP_CHNEP_SHIFT^I^I27$

ERROR: code indent should never use tabs
#742: FILE: include/hw/usb/dwc2-regs.h:718:
+#define TXSTS_QTOP_TOKEN_MASK^I^I(0x3 << 25)$

ERROR: code indent should never use tabs
#743: FILE: include/hw/usb/dwc2-regs.h:719:
+#define TXSTS_QTOP_TOKEN_SHIFT^I^I25$

ERROR: code indent should never use tabs
#744: FILE: include/hw/usb/dwc2-regs.h:720:
+#define TXSTS_QTOP_TERMINATE^I^IBIT(24)$

ERROR: code indent should never use tabs
#745: FILE: include/hw/usb/dwc2-regs.h:721:
+#define TXSTS_QSPCAVAIL_MASK^I^I(0xff << 16)$

ERROR: code indent should never use tabs
#746: FILE: include/hw/usb/dwc2-regs.h:722:
+#define TXSTS_QSPCAVAIL_SHIFT^I^I16$

ERROR: code indent should never use tabs
#747: FILE: include/hw/usb/dwc2-regs.h:723:
+#define TXSTS_FSPCAVAIL_MASK^I^I(0xffff << 0)$

ERROR: code indent should never use tabs
#748: FILE: include/hw/usb/dwc2-regs.h:724:
+#define TXSTS_FSPCAVAIL_SHIFT^I^I0$

ERROR: code indent should never use tabs
#750: FILE: include/hw/usb/dwc2-regs.h:726:
+#define HAINT^I^I^I^IHSOTG_REG(0x0414)$

ERROR: code indent should never use tabs
#751: FILE: include/hw/usb/dwc2-regs.h:727:
+#define HAINTMSK^I^I^IHSOTG_REG(0x0418)$

ERROR: code indent should never use tabs
#752: FILE: include/hw/usb/dwc2-regs.h:728:
+#define HFLBADDR^I^I^IHSOTG_REG(0x041c)$

ERROR: code indent should never use tabs
#754: FILE: include/hw/usb/dwc2-regs.h:730:
+#define HPRT0^I^I^I^IHSOTG_REG(0x0440)$

ERROR: code indent should never use tabs
#755: FILE: include/hw/usb/dwc2-regs.h:731:
+#define HPRT0_SPD_MASK^I^I^I(0x3 << 17)$

ERROR: code indent should never use tabs
#756: FILE: include/hw/usb/dwc2-regs.h:732:
+#define HPRT0_SPD_SHIFT^I^I^I17$

ERROR: code indent should never use tabs
#757: FILE: include/hw/usb/dwc2-regs.h:733:
+#define HPRT0_SPD_HIGH_SPEED^I^I0$

ERROR: code indent should never use tabs
#758: FILE: include/hw/usb/dwc2-regs.h:734:
+#define HPRT0_SPD_FULL_SPEED^I^I1$

ERROR: code indent should never use tabs
#759: FILE: include/hw/usb/dwc2-regs.h:735:
+#define HPRT0_SPD_LOW_SPEED^I^I2$

ERROR: code indent should never use tabs
#760: FILE: include/hw/usb/dwc2-regs.h:736:
+#define HPRT0_TSTCTL_MASK^I^I(0xf << 13)$

ERROR: code indent should never use tabs
#761: FILE: include/hw/usb/dwc2-regs.h:737:
+#define HPRT0_TSTCTL_SHIFT^I^I13$

ERROR: code indent should never use tabs
#762: FILE: include/hw/usb/dwc2-regs.h:738:
+#define HPRT0_PWR^I^I^IBIT(12)$

ERROR: code indent should never use tabs
#763: FILE: include/hw/usb/dwc2-regs.h:739:
+#define HPRT0_LNSTS_MASK^I^I(0x3 << 10)$

ERROR: code indent should never use tabs
#764: FILE: include/hw/usb/dwc2-regs.h:740:
+#define HPRT0_LNSTS_SHIFT^I^I10$

ERROR: code indent should never use tabs
#765: FILE: include/hw/usb/dwc2-regs.h:741:
+#define HPRT0_RST^I^I^IBIT(8)$

ERROR: code indent should never use tabs
#766: FILE: include/hw/usb/dwc2-regs.h:742:
+#define HPRT0_SUSP^I^I^IBIT(7)$

ERROR: code indent should never use tabs
#767: FILE: include/hw/usb/dwc2-regs.h:743:
+#define HPRT0_RES^I^I^IBIT(6)$

ERROR: code indent should never use tabs
#768: FILE: include/hw/usb/dwc2-regs.h:744:
+#define HPRT0_OVRCURRCHG^I^IBIT(5)$

ERROR: code indent should never use tabs
#769: FILE: include/hw/usb/dwc2-regs.h:745:
+#define HPRT0_OVRCURRACT^I^IBIT(4)$

ERROR: code indent should never use tabs
#770: FILE: include/hw/usb/dwc2-regs.h:746:
+#define HPRT0_ENACHG^I^I^IBIT(3)$

ERROR: code indent should never use tabs
#771: FILE: include/hw/usb/dwc2-regs.h:747:
+#define HPRT0_ENA^I^I^IBIT(2)$

ERROR: code indent should never use tabs
#772: FILE: include/hw/usb/dwc2-regs.h:748:
+#define HPRT0_CONNDET^I^I^IBIT(1)$

ERROR: code indent should never use tabs
#773: FILE: include/hw/usb/dwc2-regs.h:749:
+#define HPRT0_CONNSTS^I^I^IBIT(0)$

ERROR: code indent should never use tabs
#775: FILE: include/hw/usb/dwc2-regs.h:751:
+#define HCCHAR(_ch)^I^I^IHSOTG_REG(0x0500 + 0x20 * (_ch))$

ERROR: code indent should never use tabs
#776: FILE: include/hw/usb/dwc2-regs.h:752:
+#define HCCHAR_CHENA^I^I^IBIT(31)$

ERROR: code indent should never use tabs
#777: FILE: include/hw/usb/dwc2-regs.h:753:
+#define HCCHAR_CHDIS^I^I^IBIT(30)$

ERROR: code indent should never use tabs
#778: FILE: include/hw/usb/dwc2-regs.h:754:
+#define HCCHAR_ODDFRM^I^I^IBIT(29)$

ERROR: code indent should never use tabs
#779: FILE: include/hw/usb/dwc2-regs.h:755:
+#define HCCHAR_DEVADDR_MASK^I^I(0x7f << 22)$

ERROR: code indent should never use tabs
#780: FILE: include/hw/usb/dwc2-regs.h:756:
+#define HCCHAR_DEVADDR_SHIFT^I^I22$

ERROR: code indent should never use tabs
#781: FILE: include/hw/usb/dwc2-regs.h:757:
+#define HCCHAR_MULTICNT_MASK^I^I(0x3 << 20)$

ERROR: code indent should never use tabs
#782: FILE: include/hw/usb/dwc2-regs.h:758:
+#define HCCHAR_MULTICNT_SHIFT^I^I20$

ERROR: code indent should never use tabs
#783: FILE: include/hw/usb/dwc2-regs.h:759:
+#define HCCHAR_EPTYPE_MASK^I^I(0x3 << 18)$

ERROR: code indent should never use tabs
#784: FILE: include/hw/usb/dwc2-regs.h:760:
+#define HCCHAR_EPTYPE_SHIFT^I^I18$

ERROR: code indent should never use tabs
#785: FILE: include/hw/usb/dwc2-regs.h:761:
+#define HCCHAR_LSPDDEV^I^I^IBIT(17)$

ERROR: code indent should never use tabs
#786: FILE: include/hw/usb/dwc2-regs.h:762:
+#define HCCHAR_EPDIR^I^I^IBIT(15)$

ERROR: code indent should never use tabs
#787: FILE: include/hw/usb/dwc2-regs.h:763:
+#define HCCHAR_EPNUM_MASK^I^I(0xf << 11)$

ERROR: code indent should never use tabs
#788: FILE: include/hw/usb/dwc2-regs.h:764:
+#define HCCHAR_EPNUM_SHIFT^I^I11$

ERROR: code indent should never use tabs
#789: FILE: include/hw/usb/dwc2-regs.h:765:
+#define HCCHAR_MPS_MASK^I^I^I(0x7ff << 0)$

ERROR: code indent should never use tabs
#790: FILE: include/hw/usb/dwc2-regs.h:766:
+#define HCCHAR_MPS_SHIFT^I^I0$

ERROR: code indent should never use tabs
#792: FILE: include/hw/usb/dwc2-regs.h:768:
+#define HCSPLT(_ch)^I^I^IHSOTG_REG(0x0504 + 0x20 * (_ch))$

ERROR: code indent should never use tabs
#793: FILE: include/hw/usb/dwc2-regs.h:769:
+#define HCSPLT_SPLTENA^I^I^IBIT(31)$

ERROR: code indent should never use tabs
#794: FILE: include/hw/usb/dwc2-regs.h:770:
+#define HCSPLT_COMPSPLT^I^I^IBIT(16)$

ERROR: code indent should never use tabs
#795: FILE: include/hw/usb/dwc2-regs.h:771:
+#define HCSPLT_XACTPOS_MASK^I^I(0x3 << 14)$

ERROR: code indent should never use tabs
#796: FILE: include/hw/usb/dwc2-regs.h:772:
+#define HCSPLT_XACTPOS_SHIFT^I^I14$

ERROR: code indent should never use tabs
#797: FILE: include/hw/usb/dwc2-regs.h:773:
+#define HCSPLT_XACTPOS_MID^I^I0$

ERROR: code indent should never use tabs
#798: FILE: include/hw/usb/dwc2-regs.h:774:
+#define HCSPLT_XACTPOS_END^I^I1$

ERROR: code indent should never use tabs
#799: FILE: include/hw/usb/dwc2-regs.h:775:
+#define HCSPLT_XACTPOS_BEGIN^I^I2$

ERROR: code indent should never use tabs
#800: FILE: include/hw/usb/dwc2-regs.h:776:
+#define HCSPLT_XACTPOS_ALL^I^I3$

ERROR: code indent should never use tabs
#801: FILE: include/hw/usb/dwc2-regs.h:777:
+#define HCSPLT_HUBADDR_MASK^I^I(0x7f << 7)$

ERROR: code indent should never use tabs
#802: FILE: include/hw/usb/dwc2-regs.h:778:
+#define HCSPLT_HUBADDR_SHIFT^I^I7$

ERROR: code indent should never use tabs
#803: FILE: include/hw/usb/dwc2-regs.h:779:
+#define HCSPLT_PRTADDR_MASK^I^I(0x7f << 0)$

ERROR: code indent should never use tabs
#804: FILE: include/hw/usb/dwc2-regs.h:780:
+#define HCSPLT_PRTADDR_SHIFT^I^I0$

ERROR: code indent should never use tabs
#806: FILE: include/hw/usb/dwc2-regs.h:782:
+#define HCINT(_ch)^I^I^IHSOTG_REG(0x0508 + 0x20 * (_ch))$

ERROR: code indent should never use tabs
#807: FILE: include/hw/usb/dwc2-regs.h:783:
+#define HCINTMSK(_ch)^I^I^IHSOTG_REG(0x050c + 0x20 * (_ch))$

ERROR: code indent should never use tabs
#808: FILE: include/hw/usb/dwc2-regs.h:784:
+#define HCINTMSK_RESERVED14_31^I^I(0x3ffff << 14)$

ERROR: code indent should never use tabs
#809: FILE: include/hw/usb/dwc2-regs.h:785:
+#define HCINTMSK_FRM_LIST_ROLL^I^IBIT(13)$

ERROR: code indent should never use tabs
#810: FILE: include/hw/usb/dwc2-regs.h:786:
+#define HCINTMSK_XCS_XACT^I^IBIT(12)$

ERROR: code indent should never use tabs
#811: FILE: include/hw/usb/dwc2-regs.h:787:
+#define HCINTMSK_BNA^I^I^IBIT(11)$

ERROR: code indent should never use tabs
#812: FILE: include/hw/usb/dwc2-regs.h:788:
+#define HCINTMSK_DATATGLERR^I^IBIT(10)$

ERROR: code indent should never use tabs
#813: FILE: include/hw/usb/dwc2-regs.h:789:
+#define HCINTMSK_FRMOVRUN^I^IBIT(9)$

ERROR: code indent should never use tabs
#814: FILE: include/hw/usb/dwc2-regs.h:790:
+#define HCINTMSK_BBLERR^I^I^IBIT(8)$

ERROR: code indent should never use tabs
#815: FILE: include/hw/usb/dwc2-regs.h:791:
+#define HCINTMSK_XACTERR^I^IBIT(7)$

ERROR: code indent should never use tabs
#816: FILE: include/hw/usb/dwc2-regs.h:792:
+#define HCINTMSK_NYET^I^I^IBIT(6)$

ERROR: code indent should never use tabs
#817: FILE: include/hw/usb/dwc2-regs.h:793:
+#define HCINTMSK_ACK^I^I^IBIT(5)$

ERROR: code indent should never use tabs
#818: FILE: include/hw/usb/dwc2-regs.h:794:
+#define HCINTMSK_NAK^I^I^IBIT(4)$

ERROR: code indent should never use tabs
#819: FILE: include/hw/usb/dwc2-regs.h:795:
+#define HCINTMSK_STALL^I^I^IBIT(3)$

ERROR: code indent should never use tabs
#820: FILE: include/hw/usb/dwc2-regs.h:796:
+#define HCINTMSK_AHBERR^I^I^IBIT(2)$

ERROR: code indent should never use tabs
#821: FILE: include/hw/usb/dwc2-regs.h:797:
+#define HCINTMSK_CHHLTD^I^I^IBIT(1)$

ERROR: code indent should never use tabs
#822: FILE: include/hw/usb/dwc2-regs.h:798:
+#define HCINTMSK_XFERCOMPL^I^IBIT(0)$

ERROR: code indent should never use tabs
#824: FILE: include/hw/usb/dwc2-regs.h:800:
+#define HCTSIZ(_ch)^I^I^IHSOTG_REG(0x0510 + 0x20 * (_ch))$

ERROR: code indent should never use tabs
#825: FILE: include/hw/usb/dwc2-regs.h:801:
+#define TSIZ_DOPNG^I^I^IBIT(31)$

ERROR: code indent should never use tabs
#826: FILE: include/hw/usb/dwc2-regs.h:802:
+#define TSIZ_SC_MC_PID_MASK^I^I(0x3 << 29)$

ERROR: code indent should never use tabs
#827: FILE: include/hw/usb/dwc2-regs.h:803:
+#define TSIZ_SC_MC_PID_SHIFT^I^I29$

ERROR: code indent should never use tabs
#828: FILE: include/hw/usb/dwc2-regs.h:804:
+#define TSIZ_SC_MC_PID_DATA0^I^I0$

ERROR: code indent should never use tabs
#829: FILE: include/hw/usb/dwc2-regs.h:805:
+#define TSIZ_SC_MC_PID_DATA2^I^I1$

ERROR: code indent should never use tabs
#830: FILE: include/hw/usb/dwc2-regs.h:806:
+#define TSIZ_SC_MC_PID_DATA1^I^I2$

ERROR: code indent should never use tabs
#831: FILE: include/hw/usb/dwc2-regs.h:807:
+#define TSIZ_SC_MC_PID_MDATA^I^I3$

ERROR: code indent should never use tabs
#832: FILE: include/hw/usb/dwc2-regs.h:808:
+#define TSIZ_SC_MC_PID_SETUP^I^I3$

ERROR: code indent should never use tabs
#833: FILE: include/hw/usb/dwc2-regs.h:809:
+#define TSIZ_PKTCNT_MASK^I^I(0x3ff << 19)$

ERROR: code indent should never use tabs
#834: FILE: include/hw/usb/dwc2-regs.h:810:
+#define TSIZ_PKTCNT_SHIFT^I^I19$

ERROR: code indent should never use tabs
#835: FILE: include/hw/usb/dwc2-regs.h:811:
+#define TSIZ_NTD_MASK^I^I^I(0xff << 8)$

ERROR: code indent should never use tabs
#836: FILE: include/hw/usb/dwc2-regs.h:812:
+#define TSIZ_NTD_SHIFT^I^I^I8$

ERROR: code indent should never use tabs
#837: FILE: include/hw/usb/dwc2-regs.h:813:
+#define TSIZ_SCHINFO_MASK^I^I(0xff << 0)$

ERROR: code indent should never use tabs
#838: FILE: include/hw/usb/dwc2-regs.h:814:
+#define TSIZ_SCHINFO_SHIFT^I^I0$

ERROR: code indent should never use tabs
#839: FILE: include/hw/usb/dwc2-regs.h:815:
+#define TSIZ_XFERSIZE_MASK^I^I(0x7ffff << 0)$

ERROR: code indent should never use tabs
#840: FILE: include/hw/usb/dwc2-regs.h:816:
+#define TSIZ_XFERSIZE_SHIFT^I^I0$

ERROR: code indent should never use tabs
#842: FILE: include/hw/usb/dwc2-regs.h:818:
+#define HCDMA(_ch)^I^I^IHSOTG_REG(0x0514 + 0x20 * (_ch))$

ERROR: code indent should never use tabs
#844: FILE: include/hw/usb/dwc2-regs.h:820:
+#define HCDMAB(_ch)^I^I^IHSOTG_REG(0x051c + 0x20 * (_ch))$

ERROR: code indent should never use tabs
#846: FILE: include/hw/usb/dwc2-regs.h:822:
+#define HCFIFO(_ch)^I^I^IHSOTG_REG(0x1000 + 0x1000 * (_ch))$

ERROR: code indent should never use tabs
#859: FILE: include/hw/usb/dwc2-regs.h:835:
+^Iuint32_t status;$

ERROR: code indent should never use tabs
#860: FILE: include/hw/usb/dwc2-regs.h:836:
+^Iuint32_t buf;$

ERROR: code indent should never use tabs
#865: FILE: include/hw/usb/dwc2-regs.h:841:
+#define HOST_DMA_A^I^I^IBIT(31)$

ERROR: code indent should never use tabs
#866: FILE: include/hw/usb/dwc2-regs.h:842:
+#define HOST_DMA_STS_MASK^I^I(0x3 << 28)$

ERROR: code indent should never use tabs
#867: FILE: include/hw/usb/dwc2-regs.h:843:
+#define HOST_DMA_STS_SHIFT^I^I28$

ERROR: code indent should never use tabs
#868: FILE: include/hw/usb/dwc2-regs.h:844:
+#define HOST_DMA_STS_PKTERR^I^IBIT(28)$

ERROR: code indent should never use tabs
#869: FILE: include/hw/usb/dwc2-regs.h:845:
+#define HOST_DMA_EOL^I^I^IBIT(26)$

ERROR: code indent should never use tabs
#870: FILE: include/hw/usb/dwc2-regs.h:846:
+#define HOST_DMA_IOC^I^I^IBIT(25)$

ERROR: code indent should never use tabs
#871: FILE: include/hw/usb/dwc2-regs.h:847:
+#define HOST_DMA_SUP^I^I^IBIT(24)$

ERROR: code indent should never use tabs
#872: FILE: include/hw/usb/dwc2-regs.h:848:
+#define HOST_DMA_ALT_QTD^I^IBIT(23)$

ERROR: code indent should never use tabs
#873: FILE: include/hw/usb/dwc2-regs.h:849:
+#define HOST_DMA_QTD_OFFSET_MASK^I(0x3f << 17)$

ERROR: code indent should never use tabs
#874: FILE: include/hw/usb/dwc2-regs.h:850:
+#define HOST_DMA_QTD_OFFSET_SHIFT^I17$

ERROR: code indent should never use tabs
#875: FILE: include/hw/usb/dwc2-regs.h:851:
+#define HOST_DMA_ISOC_NBYTES_MASK^I(0xfff << 0)$

ERROR: code indent should never use tabs
#876: FILE: include/hw/usb/dwc2-regs.h:852:
+#define HOST_DMA_ISOC_NBYTES_SHIFT^I0$

ERROR: code indent should never use tabs
#877: FILE: include/hw/usb/dwc2-regs.h:853:
+#define HOST_DMA_NBYTES_MASK^I^I(0x1ffff << 0)$

ERROR: code indent should never use tabs
#878: FILE: include/hw/usb/dwc2-regs.h:854:
+#define HOST_DMA_NBYTES_SHIFT^I^I0$

ERROR: code indent should never use tabs
#879: FILE: include/hw/usb/dwc2-regs.h:855:
+#define HOST_DMA_NBYTES_LIMIT^I^I131071$

ERROR: code indent should never use tabs
#883: FILE: include/hw/usb/dwc2-regs.h:859:
+#define DEV_DMA_BUFF_STS_MASK^I^I(0x3 << 30)$

ERROR: code indent should never use tabs
#884: FILE: include/hw/usb/dwc2-regs.h:860:
+#define DEV_DMA_BUFF_STS_SHIFT^I^I30$

ERROR: code indent should never use tabs
#885: FILE: include/hw/usb/dwc2-regs.h:861:
+#define DEV_DMA_BUFF_STS_HREADY^I^I0$

ERROR: code indent should never use tabs
#886: FILE: include/hw/usb/dwc2-regs.h:862:
+#define DEV_DMA_BUFF_STS_DMABUSY^I1$

ERROR: code indent should never use tabs
#887: FILE: include/hw/usb/dwc2-regs.h:863:
+#define DEV_DMA_BUFF_STS_DMADONE^I2$

ERROR: code indent should never use tabs
#888: FILE: include/hw/usb/dwc2-regs.h:864:
+#define DEV_DMA_BUFF_STS_HBUSY^I^I3$

ERROR: code indent should never use tabs
#889: FILE: include/hw/usb/dwc2-regs.h:865:
+#define DEV_DMA_STS_MASK^I^I(0x3 << 28)$

ERROR: code indent should never use tabs
#890: FILE: include/hw/usb/dwc2-regs.h:866:
+#define DEV_DMA_STS_SHIFT^I^I28$

ERROR: code indent should never use tabs
#891: FILE: include/hw/usb/dwc2-regs.h:867:
+#define DEV_DMA_STS_SUCC^I^I0$

ERROR: code indent should never use tabs
#892: FILE: include/hw/usb/dwc2-regs.h:868:
+#define DEV_DMA_STS_BUFF_FLUSH^I^I1$

ERROR: code indent should never use tabs
#893: FILE: include/hw/usb/dwc2-regs.h:869:
+#define DEV_DMA_STS_BUFF_ERR^I^I3$

ERROR: code indent should never use tabs
#894: FILE: include/hw/usb/dwc2-regs.h:870:
+#define DEV_DMA_L^I^I^IBIT(27)$

ERROR: code indent should never use tabs
#895: FILE: include/hw/usb/dwc2-regs.h:871:
+#define DEV_DMA_SHORT^I^I^IBIT(26)$

ERROR: code indent should never use tabs
#896: FILE: include/hw/usb/dwc2-regs.h:872:
+#define DEV_DMA_IOC^I^I^IBIT(25)$

ERROR: code indent should never use tabs
#897: FILE: include/hw/usb/dwc2-regs.h:873:
+#define DEV_DMA_SR^I^I^IBIT(24)$

ERROR: code indent should never use tabs
#898: FILE: include/hw/usb/dwc2-regs.h:874:
+#define DEV_DMA_MTRF^I^I^IBIT(23)$

ERROR: code indent should never use tabs
#899: FILE: include/hw/usb/dwc2-regs.h:875:
+#define DEV_DMA_ISOC_PID_MASK^I^I(0x3 << 23)$

ERROR: code indent should never use tabs
#900: FILE: include/hw/usb/dwc2-regs.h:876:
+#define DEV_DMA_ISOC_PID_SHIFT^I^I23$

ERROR: code indent should never use tabs
#901: FILE: include/hw/usb/dwc2-regs.h:877:
+#define DEV_DMA_ISOC_PID_DATA0^I^I0$

ERROR: code indent should never use tabs
#902: FILE: include/hw/usb/dwc2-regs.h:878:
+#define DEV_DMA_ISOC_PID_DATA2^I^I1$

ERROR: code indent should never use tabs
#903: FILE: include/hw/usb/dwc2-regs.h:879:
+#define DEV_DMA_ISOC_PID_DATA1^I^I2$

ERROR: code indent should never use tabs
#904: FILE: include/hw/usb/dwc2-regs.h:880:
+#define DEV_DMA_ISOC_PID_MDATA^I^I3$

ERROR: code indent should never use tabs
#905: FILE: include/hw/usb/dwc2-regs.h:881:
+#define DEV_DMA_ISOC_FRNUM_MASK^I^I(0x7ff << 12)$

ERROR: code indent should never use tabs
#906: FILE: include/hw/usb/dwc2-regs.h:882:
+#define DEV_DMA_ISOC_FRNUM_SHIFT^I12$

ERROR: code indent should never use tabs
#907: FILE: include/hw/usb/dwc2-regs.h:883:
+#define DEV_DMA_ISOC_TX_NBYTES_MASK^I(0xfff << 0)$

ERROR: code indent should never use tabs
#908: FILE: include/hw/usb/dwc2-regs.h:884:
+#define DEV_DMA_ISOC_TX_NBYTES_LIMIT^I0xfff$

ERROR: code indent should never use tabs
#909: FILE: include/hw/usb/dwc2-regs.h:885:
+#define DEV_DMA_ISOC_RX_NBYTES_MASK^I(0x7ff << 0)$

ERROR: code indent should never use tabs
#910: FILE: include/hw/usb/dwc2-regs.h:886:
+#define DEV_DMA_ISOC_RX_NBYTES_LIMIT^I0x7ff$

ERROR: code indent should never use tabs
#911: FILE: include/hw/usb/dwc2-regs.h:887:
+#define DEV_DMA_ISOC_NBYTES_SHIFT^I0$

ERROR: code indent should never use tabs
#912: FILE: include/hw/usb/dwc2-regs.h:888:
+#define DEV_DMA_NBYTES_MASK^I^I(0xffff << 0)$

ERROR: code indent should never use tabs
#913: FILE: include/hw/usb/dwc2-regs.h:889:
+#define DEV_DMA_NBYTES_SHIFT^I^I0$

ERROR: code indent should never use tabs
#914: FILE: include/hw/usb/dwc2-regs.h:890:
+#define DEV_DMA_NBYTES_LIMIT^I^I0xffff$

ERROR: code indent should never use tabs
#916: FILE: include/hw/usb/dwc2-regs.h:892:
+#define MAX_DMA_DESC_NUM_GENERIC^I64$

ERROR: code indent should never use tabs
#917: FILE: include/hw/usb/dwc2-regs.h:893:
+#define MAX_DMA_DESC_NUM_HS_ISOC^I256$

total: 753 errors, 3 warnings, 895 lines checked

Patch 2/7 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

3/7 Checking commit 6888aac4c231 (dwc-hsotg (dwc2) USB host controller state definitions)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#16: 
new file mode 100644

total: 0 errors, 1 warnings, 173 lines checked

Patch 3/7 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
4/7 Checking commit 15b6d6f2e6be (dwc-hsotg (dwc2) USB host controller emulation)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#65: 
new file mode 100644

total: 0 errors, 1 warnings, 1443 lines checked

Patch 4/7 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
5/7 Checking commit 47c6b53cfcc3 (usb: add short-packet handling to usb-storage driver)
6/7 Checking commit 0135f05ea0cd (wire in the dwc-hsotg (dwc2) USB host controller emulation)
7/7 Checking commit a9690c1a6997 (raspi2 acceptance test: add test for dwc-hsotg (dwc2) USB host)
=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/20200514122334.25089-1-kraxel@redhat.com/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [https://patchew.org/].
Please send your feedback to patchew-devel@redhat.com

^ permalink raw reply	[flat|nested] 10+ messages in thread

end of thread, other threads:[~2020-05-14 16:48 UTC | newest]

Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-05-14 12:23 [PULL 0/7] Usb 20200514 patches Gerd Hoffmann
2020-05-14 12:23 ` [PULL 1/7] raspi: add BCM2835 SOC MPHI emulation Gerd Hoffmann
2020-05-14 12:23 ` [PULL 2/7] dwc-hsotg (dwc2) USB host controller register definitions Gerd Hoffmann
2020-05-14 12:23 ` [PULL 3/7] dwc-hsotg (dwc2) USB host controller state definitions Gerd Hoffmann
2020-05-14 12:23 ` [PULL 4/7] dwc-hsotg (dwc2) USB host controller emulation Gerd Hoffmann
2020-05-14 12:23 ` [PULL 5/7] usb: add short-packet handling to usb-storage driver Gerd Hoffmann
2020-05-14 12:23 ` [PULL 6/7] wire in the dwc-hsotg (dwc2) USB host controller emulation Gerd Hoffmann
2020-05-14 12:23 ` [PULL 7/7] raspi2 acceptance test: add test for dwc-hsotg (dwc2) USB host Gerd Hoffmann
2020-05-14 12:43 ` [PULL 0/7] Usb 20200514 patches Peter Maydell
2020-05-14 16:45 ` no-reply

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