From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.6 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9268BC433E0 for ; Thu, 14 May 2020 13:03:27 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 6653920727 for ; Thu, 14 May 2020 13:03:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1589461407; bh=SuLpaZFpGQ8WM/6iQie50DkPQircPDfzdXDRDkqRnFM=; h=Date:From:To:Cc:Subject:References:In-Reply-To:List-ID:From; b=OsXK2iMSuMTo6yuj+GGeKuCzGSNIaxzrMHENqjNvRPvPp4q014wDNuXBOpNkbGWOs Mr3dEnki6GIvctEcIg+P8GM2mm7/Nx61WNb4po4xWAcpcJsKREH/aaz+Q6zmXj759J tdowK5aa0I3TVhrlx4CEScL6ZxPIK8rIdHNamJfQ= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727099AbgENND0 (ORCPT ); Thu, 14 May 2020 09:03:26 -0400 Received: from mail-ot1-f68.google.com ([209.85.210.68]:32791 "EHLO mail-ot1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726056AbgENND0 (ORCPT ); Thu, 14 May 2020 09:03:26 -0400 Received: by mail-ot1-f68.google.com with SMTP id v17so2281155ote.0; Thu, 14 May 2020 06:03:25 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=PAAq3M4gzQu8HSRZbaaHX+1SesRsxaYoIJArKgrswws=; b=Yfe0/3is/dHKayOCHp7iYgLjtCjQhBpv/lsLMOALJW0MqY8FybHkesUjTP3KYlkYR7 lFq/YesSZtNLvn73W+r83GK2NqI/oWm4bKwaAvBkHuKNqldOkOv94Mx8aR6n0bOvlDwT pua6xjDxzCCXUYZmYou5QHvChfdfyi2vwoYF+bTbT88DLtj4uFyIKnNFKKIzNMmLvaxD bPZnP4/84rCDodtUJWq4PosUQjwn1vdXdYWETRhxHojEP51mllMIDcfzfUWHAgRzsOp2 2mfHcTrDBqtbbEpIcy/gS0aL3F3iWEwfXaFCrB/NIz3dYBsqL+r23/1vDeNBC3oHsyv6 MNpg== X-Gm-Message-State: AOAM532CK8GeOHPH4KRkmk8vjCL5HHd/dHmUvgb7eCgAlWZruPrtXFb/ xu0NG/JbduVeGMIRGfZ6+w== X-Google-Smtp-Source: ABdhPJxcpuhv/1AydK5IH3eeNpW2zbl+DpIvij7siBl4sEeht7w7E4i0Oo7cKTz9Uzccd2FBgUw8Gw== X-Received: by 2002:a9d:7343:: with SMTP id l3mr3144827otk.276.1589461403791; Thu, 14 May 2020 06:03:23 -0700 (PDT) Received: from rob-hp-laptop (24-155-109-49.dyn.grandenetworks.net. [24.155.109.49]) by smtp.gmail.com with ESMTPSA id i10sm765855oos.28.2020.05.14.06.03.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 May 2020 06:03:23 -0700 (PDT) Received: (nullmailer pid 17389 invoked by uid 1000); Thu, 14 May 2020 13:03:21 -0000 Date: Thu, 14 May 2020 08:03:21 -0500 From: Rob Herring To: "Ramuthevar,Vadivel MuruganX" Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, devicetree@vger.kernel.org, miquel.raynal@bootlin.com, richard@nod.at, vigneshr@ti.com, arnd@arndb.de, brendanhiggins@google.com, tglx@linutronix.de, boris.brezillon@collabora.com, anders.roxell@linaro.org, masonccyang@mxic.com.tw, linux-mips@vger.kernel.org, hauke.mehrtens@intel.com, andriy.shevchenko@intel.com, qi-ming.wu@intel.com, cheol.yong.kim@intel.com Subject: Re: [PATCH v6 1/2] dt-bindings: mtd: Add Nand Flash Controller support for Intel LGM SoC Message-ID: <20200514130321.GB8436@bogus> References: <20200513104615.7905-1-vadivel.muruganx.ramuthevar@linux.intel.com> <20200513104615.7905-2-vadivel.muruganx.ramuthevar@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20200513104615.7905-2-vadivel.muruganx.ramuthevar@linux.intel.com> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, May 13, 2020 at 06:46:14PM +0800, Ramuthevar,Vadivel MuruganX wrote: > From: Ramuthevar Vadivel Murugan > > Add YAML file for dt-bindings to support NAND Flash Controller > on Intel's Lightning Mountain SoC. > > Signed-off-by: Ramuthevar Vadivel Murugan > --- > .../devicetree/bindings/mtd/intel,lgm-nand.yaml | 83 ++++++++++++++++++++++ > 1 file changed, 83 insertions(+) > create mode 100644 Documentation/devicetree/bindings/mtd/intel,lgm-nand.yaml > > diff --git a/Documentation/devicetree/bindings/mtd/intel,lgm-nand.yaml b/Documentation/devicetree/bindings/mtd/intel,lgm-nand.yaml > new file mode 100644 > index 000000000000..d9e0df8553fa > --- /dev/null > +++ b/Documentation/devicetree/bindings/mtd/intel,lgm-nand.yaml > @@ -0,0 +1,83 @@ > +# SPDX-License-Identifier: GPL-2.0 Dual license new bindings please: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/mtd/intel,lgm-nand.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Intel LGM SoC NAND Controller Device Tree Bindings > + > +allOf: > + - $ref: "nand-controller.yaml" > + > +maintainers: > + - Ramuthevar Vadivel Murugan > + > +properties: > + compatible: > + const: intel,lgm-nand-controller > + > + reg: > + maxItems: 1 Looks like you have 4 or 6 entries, not 1. Need to define what each one is. > + > + clocks: > + maxItems: 1 > + > + dmas: > + maxItems: 2 > + > + dma-names: > + enum: > + - rx > + - tx This defines a single entry. I believe you want: items: - const: tx - const: rx > + > + pinctrl-names: true No need for this. Tools add pinctrl properties. > + > +patternProperties: > + "^nand@[a-f0-9]+$": > + type: object > + properties: > + reg: > + minimum: 0 > + maximum: 7 > + > + nand-ecc-mode: true > + > + nand-ecc-algo: > + const: hw > + > + additionalProperties: false > + > +required: > + - compatible > + - reg > + - clocks > + - clock-names > + - dmas > + > +additionalProperties: false > + > +examples: > + - | > + nand-controller@e0f00000 { > + compatible = "intel,nand-controller"; Doesn't match the schema. > + reg = <0xe0f00000 0x100>, > + <0xe1000000 0x300>, > + <0xe1400000 0x8000>, > + <0xe1c00000 0x1000>; Is it 4 or 6 entries? > + reg-names = "ebunand", "hsnand", "nand_cs0", "nand_cs1", > + "addr_sel0","addr_sel1"; Not documented. > + clocks = <&cgu0 125>; > + dma-names = "tx", "rx"; > + #address-cells = <1>; > + #size-cells = <0>; > + #clock-cells = <1>; This is a clock provider too? > + > + nand@0 { > + reg = <0>; > + nand-on-flash-bbt; > + #address-cells = <1>; > + #size-cells = <1>; > + }; > + }; > + > +... > -- > 2.11.0 > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.5 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 72A66C433E0 for ; Thu, 14 May 2020 13:03:43 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 42B6820727 for ; Thu, 14 May 2020 13:03:43 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="FTEzRQKl" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 42B6820727 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-mtd-bounces+linux-mtd=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=0s0Oj43TrVVKmADLKVCOY+cge3bychHa/oh58/iKhlU=; b=FTEzRQKltJ7Z0H 0FB0e/lbkYDfoJgrJ/qil5it0qcNzgVBHvorya7gSLd2F6n7F3m/6nsVuvN4UDyJAw+1iFkt2DcmE kp8dcz8Sw/CkzX+cdwXgLzId2wVkmlYLuyRM2icAae2ftHBVjt/NS0B9x8RbCQVTapacqni1frtlW pDvkpvNRx3OX3yZQetznoW6FJqenNBHkKLH6n4c6ckd8yP3UbcGezQAOXwC/ZbZXLWjyAjXU40P9a s28HEdZocUgfbvu5N1XQ3Jii3Y/fPff6FeFtUzvvJnk6t44uGc0QmTOmqRAoHZ/sSFvCfPu08+osZ ovbGIsgfIjbJEYUjuemw==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jZDWL-0006sW-5g; Thu, 14 May 2020 13:03:29 +0000 Received: from mail-ot1-f65.google.com ([209.85.210.65]) by bombadil.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1jZDWI-0006sC-Dc for linux-mtd@lists.infradead.org; Thu, 14 May 2020 13:03:27 +0000 Received: by mail-ot1-f65.google.com with SMTP id z17so2256050oto.4 for ; Thu, 14 May 2020 06:03:25 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=PAAq3M4gzQu8HSRZbaaHX+1SesRsxaYoIJArKgrswws=; b=ay37AKRIbnsXbdPV8hrJiWfX/ACYN6SdZ2IQPMgmoZ7Yoypva2PFZc7r+qR6RTaxJm lps4ryilaCSu1wcxcU4ZPEP+YQ9rKWVzjpUzHspitCGLPfvePpfBhTCiID9Ty42KDZxz fZiZ9E0OXC9ydzm1XjEMEPonC3wpitRhjVdib8zqQT1N6Ei5DMs+qAsvFQ8uUT4oPAp5 +DjOj8mpEpmaH8Pp0yu+zy9IJzz+hT9fGsH+Dv+EJSopgPRJO3Cai0a5qvu029U8piay qWftPBhrF5nQ9hGJMPkV4sOwqOqoBisRYVlZQJkgDC3Nl1sEZi+SAURK+++tmqKqXKKC OxFw== X-Gm-Message-State: AOAM530Zll7qMXygnB+JBvvwqQQoqOVEDJhV0q+eILhxeBIwsfnKs98Y d/dmPjWZn+Nurx6Jwh5zbQ== X-Google-Smtp-Source: ABdhPJxcpuhv/1AydK5IH3eeNpW2zbl+DpIvij7siBl4sEeht7w7E4i0Oo7cKTz9Uzccd2FBgUw8Gw== X-Received: by 2002:a9d:7343:: with SMTP id l3mr3144827otk.276.1589461403791; Thu, 14 May 2020 06:03:23 -0700 (PDT) Received: from rob-hp-laptop (24-155-109-49.dyn.grandenetworks.net. [24.155.109.49]) by smtp.gmail.com with ESMTPSA id i10sm765855oos.28.2020.05.14.06.03.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 May 2020 06:03:23 -0700 (PDT) Received: (nullmailer pid 17389 invoked by uid 1000); Thu, 14 May 2020 13:03:21 -0000 Date: Thu, 14 May 2020 08:03:21 -0500 From: Rob Herring To: "Ramuthevar, Vadivel MuruganX" Subject: Re: [PATCH v6 1/2] dt-bindings: mtd: Add Nand Flash Controller support for Intel LGM SoC Message-ID: <20200514130321.GB8436@bogus> References: <20200513104615.7905-1-vadivel.muruganx.ramuthevar@linux.intel.com> <20200513104615.7905-2-vadivel.muruganx.ramuthevar@linux.intel.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20200513104615.7905-2-vadivel.muruganx.ramuthevar@linux.intel.com> User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200514_060326_463506_7780FA8A X-CRM114-Status: GOOD ( 15.46 ) X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: cheol.yong.kim@intel.com, devicetree@vger.kernel.org, qi-ming.wu@intel.com, anders.roxell@linaro.org, vigneshr@ti.com, arnd@arndb.de, hauke.mehrtens@intel.com, richard@nod.at, brendanhiggins@google.com, linux-kernel@vger.kernel.org, linux-mips@vger.kernel.org, boris.brezillon@collabora.com, linux-mtd@lists.infradead.org, miquel.raynal@bootlin.com, tglx@linutronix.de, masonccyang@mxic.com.tw, andriy.shevchenko@intel.com Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-mtd" Errors-To: linux-mtd-bounces+linux-mtd=archiver.kernel.org@lists.infradead.org On Wed, May 13, 2020 at 06:46:14PM +0800, Ramuthevar,Vadivel MuruganX wrote: > From: Ramuthevar Vadivel Murugan > > Add YAML file for dt-bindings to support NAND Flash Controller > on Intel's Lightning Mountain SoC. > > Signed-off-by: Ramuthevar Vadivel Murugan > --- > .../devicetree/bindings/mtd/intel,lgm-nand.yaml | 83 ++++++++++++++++++++++ > 1 file changed, 83 insertions(+) > create mode 100644 Documentation/devicetree/bindings/mtd/intel,lgm-nand.yaml > > diff --git a/Documentation/devicetree/bindings/mtd/intel,lgm-nand.yaml b/Documentation/devicetree/bindings/mtd/intel,lgm-nand.yaml > new file mode 100644 > index 000000000000..d9e0df8553fa > --- /dev/null > +++ b/Documentation/devicetree/bindings/mtd/intel,lgm-nand.yaml > @@ -0,0 +1,83 @@ > +# SPDX-License-Identifier: GPL-2.0 Dual license new bindings please: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/mtd/intel,lgm-nand.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Intel LGM SoC NAND Controller Device Tree Bindings > + > +allOf: > + - $ref: "nand-controller.yaml" > + > +maintainers: > + - Ramuthevar Vadivel Murugan > + > +properties: > + compatible: > + const: intel,lgm-nand-controller > + > + reg: > + maxItems: 1 Looks like you have 4 or 6 entries, not 1. Need to define what each one is. > + > + clocks: > + maxItems: 1 > + > + dmas: > + maxItems: 2 > + > + dma-names: > + enum: > + - rx > + - tx This defines a single entry. I believe you want: items: - const: tx - const: rx > + > + pinctrl-names: true No need for this. Tools add pinctrl properties. > + > +patternProperties: > + "^nand@[a-f0-9]+$": > + type: object > + properties: > + reg: > + minimum: 0 > + maximum: 7 > + > + nand-ecc-mode: true > + > + nand-ecc-algo: > + const: hw > + > + additionalProperties: false > + > +required: > + - compatible > + - reg > + - clocks > + - clock-names > + - dmas > + > +additionalProperties: false > + > +examples: > + - | > + nand-controller@e0f00000 { > + compatible = "intel,nand-controller"; Doesn't match the schema. > + reg = <0xe0f00000 0x100>, > + <0xe1000000 0x300>, > + <0xe1400000 0x8000>, > + <0xe1c00000 0x1000>; Is it 4 or 6 entries? > + reg-names = "ebunand", "hsnand", "nand_cs0", "nand_cs1", > + "addr_sel0","addr_sel1"; Not documented. > + clocks = <&cgu0 125>; > + dma-names = "tx", "rx"; > + #address-cells = <1>; > + #size-cells = <0>; > + #clock-cells = <1>; This is a clock provider too? > + > + nand@0 { > + reg = <0>; > + nand-on-flash-bbt; > + #address-cells = <1>; > + #size-cells = <1>; > + }; > + }; > + > +... > -- > 2.11.0 > ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/