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From: "Alex Bennée" <alex.bennee@linaro.org>
To: peter.maydell@linaro.org
Cc: "Alex Bennée" <alex.bennee@linaro.org>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"Richard Henderson" <richard.henderson@linaro.org>,
	qemu-devel@nongnu.org, "Richard Henderson" <rth@twiddle.net>
Subject: [PULL v2 05/13] accel/tcg: Relax va restrictions on 64-bit guests
Date: Fri, 15 May 2020 15:43:57 +0100	[thread overview]
Message-ID: <20200515144405.20580-6-alex.bennee@linaro.org> (raw)
In-Reply-To: <20200515144405.20580-1-alex.bennee@linaro.org>

From: Richard Henderson <richard.henderson@linaro.org>

We cannot at present limit a 64-bit guest to a virtual address
space smaller than the host.  It will mostly work to ignore this
limitation, except if the guest uses high bits of the address
space for tags.  But it will certainly work better, as presently
we can wind up failing to allocate the guest stack.

Widen our user-only page tree to the host or abi pointer width.
Remove the workaround for this problem from target/alpha.
Always validate guest addresses vs reserved_va, as there we
control allocation ourselves.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>

Message-Id: <20200513175134.19619-7-alex.bennee@linaro.org>

diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h
index 0895a57881a..d14374bdd49 100644
--- a/include/exec/cpu-all.h
+++ b/include/exec/cpu-all.h
@@ -162,12 +162,27 @@ extern unsigned long guest_base;
 extern bool have_guest_base;
 extern unsigned long reserved_va;
 
-#if HOST_LONG_BITS <= TARGET_VIRT_ADDR_SPACE_BITS
-#define GUEST_ADDR_MAX (~0ul)
+/*
+ * Limit the guest addresses as best we can.
+ *
+ * When not using -R reserved_va, we cannot really limit the guest
+ * to less address space than the host.  For 32-bit guests, this
+ * acts as a sanity check that we're not giving the guest an address
+ * that it cannot even represent.  For 64-bit guests... the address
+ * might not be what the real kernel would give, but it is at least
+ * representable in the guest.
+ *
+ * TODO: Improve address allocation to avoid this problem, and to
+ * avoid setting bits at the top of guest addresses that might need
+ * to be used for tags.
+ */
+#if MIN(TARGET_VIRT_ADDR_SPACE_BITS, TARGET_ABI_BITS) <= 32
+# define GUEST_ADDR_MAX_  UINT32_MAX
 #else
-#define GUEST_ADDR_MAX (reserved_va ? reserved_va - 1 : \
-                                    (1ul << TARGET_VIRT_ADDR_SPACE_BITS) - 1)
+# define GUEST_ADDR_MAX_  (~0ul)
 #endif
+#define GUEST_ADDR_MAX    (reserved_va ? reserved_va - 1 : GUEST_ADDR_MAX_)
+
 #else
 
 #include "exec/hwaddr.h"
diff --git a/target/alpha/cpu-param.h b/target/alpha/cpu-param.h
index 692aee27ca9..1153992e42a 100644
--- a/target/alpha/cpu-param.h
+++ b/target/alpha/cpu-param.h
@@ -10,22 +10,11 @@
 
 #define TARGET_LONG_BITS 64
 #define TARGET_PAGE_BITS 13
-#ifdef CONFIG_USER_ONLY
-/*
- * ??? The kernel likes to give addresses in high memory.  If the host has
- * more virtual address space than the guest, this can lead to impossible
- * allocations.  Honor the long-standing assumption that only kernel addrs
- * are negative, but otherwise allow allocations anywhere.  This could lead
- * to tricky emulation problems for programs doing tagged addressing, but
- * that's far fewer than encounter the impossible allocation problem.
- */
-#define TARGET_PHYS_ADDR_SPACE_BITS  63
-#define TARGET_VIRT_ADDR_SPACE_BITS  63
-#else
+
 /* ??? EV4 has 34 phys addr bits, EV5 has 40, EV6 has 44.  */
 #define TARGET_PHYS_ADDR_SPACE_BITS  44
 #define TARGET_VIRT_ADDR_SPACE_BITS  (30 + TARGET_PAGE_BITS)
-#endif
+
 #define NB_MMU_MODES 3
 
 #endif
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
index 9924e66d1f7..e4f703a7e6d 100644
--- a/accel/tcg/translate-all.c
+++ b/accel/tcg/translate-all.c
@@ -173,8 +173,13 @@ struct page_collection {
 #define TB_FOR_EACH_JMP(head_tb, tb, n)                                 \
     TB_FOR_EACH_TAGGED((head_tb)->jmp_list_head, tb, n, jmp_list_next)
 
-/* In system mode we want L1_MAP to be based on ram offsets,
-   while in user mode we want it to be based on virtual addresses.  */
+/*
+ * In system mode we want L1_MAP to be based on ram offsets,
+ * while in user mode we want it to be based on virtual addresses.
+ *
+ * TODO: For user mode, see the caveat re host vs guest virtual
+ * address spaces near GUEST_ADDR_MAX.
+ */
 #if !defined(CONFIG_USER_ONLY)
 #if HOST_LONG_BITS < TARGET_PHYS_ADDR_SPACE_BITS
 # define L1_MAP_ADDR_SPACE_BITS  HOST_LONG_BITS
@@ -182,7 +187,7 @@ struct page_collection {
 # define L1_MAP_ADDR_SPACE_BITS  TARGET_PHYS_ADDR_SPACE_BITS
 #endif
 #else
-# define L1_MAP_ADDR_SPACE_BITS  TARGET_VIRT_ADDR_SPACE_BITS
+# define L1_MAP_ADDR_SPACE_BITS  MIN(HOST_LONG_BITS, TARGET_ABI_BITS)
 #endif
 
 /* Size of the L2 (and L3, etc) page tables.  */
@@ -2497,9 +2502,7 @@ void page_set_flags(target_ulong start, target_ulong end, int flags)
     /* This function should never be called with addresses outside the
        guest address space.  If this assert fires, it probably indicates
        a missing call to h2g_valid.  */
-#if TARGET_ABI_BITS > L1_MAP_ADDR_SPACE_BITS
-    assert(end <= ((target_ulong)1 << L1_MAP_ADDR_SPACE_BITS));
-#endif
+    assert(end - 1 <= GUEST_ADDR_MAX);
     assert(start < end);
     assert_memory_lock();
 
-- 
2.20.1



  parent reply	other threads:[~2020-05-15 14:47 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-15 14:43 [PULL v2 00/13] testing, tcg and plugin updates Alex Bennée
2020-05-15 14:43 ` [PULL v2 01/13] tests/guest-debug: catch hanging guests Alex Bennée
2020-05-15 14:43 ` [PULL v2 02/13] travis.yml: Improve the --disable-tcg test on s390x Alex Bennée
2020-05-15 14:43 ` [PULL v2 03/13] linux-user: completely re-write init_guest_space Alex Bennée
2020-05-15 14:43 ` [PULL v2 04/13] exec/cpu-all: Use bool for have_guest_base Alex Bennée
2020-05-15 14:43 ` Alex Bennée [this message]
2020-06-04 14:15   ` [PULL v2 05/13] accel/tcg: Relax va restrictions on 64-bit guests Laurent Vivier
2020-06-04 17:31     ` Alex Bennée
2020-06-05 14:11       ` Alex Bennée
2020-06-05 17:38         ` Richard Henderson
2020-06-05 17:46           ` Alex Bennée
2020-06-05 18:26             ` Richard Henderson
2020-05-15 14:43 ` [PULL v2 06/13] accel/tcg: don't disable exec_tb trace events Alex Bennée
2020-05-15 14:43 ` [PULL v2 07/13] disas: include an optional note for the start of disassembly Alex Bennée
2020-05-15 14:44 ` [PULL v2 08/13] disas: add optional note support to cap_disas Alex Bennée
2020-05-15 14:44 ` [PULL v2 09/13] translate-all: include guest address in out_asm output Alex Bennée
2020-05-15 14:44 ` [PULL v2 10/13] qemu/plugin: Trivial code movement Alex Bennée
2020-05-15 14:44 ` [PULL v2 11/13] qemu/plugin: Move !CONFIG_PLUGIN stubs altogether Alex Bennée
2020-05-15 14:44 ` [PULL v2 12/13] qemu/qemu-plugin: Make qemu_plugin_hwaddr_is_io() hwaddr argument const Alex Bennée
2020-05-15 14:44 ` [PULL v2 13/13] MAINTAINERS: update the orphaned cpus-common.c file Alex Bennée
2020-05-15 15:46 ` [PULL v2 00/13] testing, tcg and plugin updates Peter Maydell

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