* [PATCH v2 0/4] hw/arm: Replace hw_error() by qemu_log_mask()
@ 2020-05-18 14:03 Philippe Mathieu-Daudé
2020-05-18 14:03 ` [PATCH v2 1/4] hw/arm/integratorcp: " Philippe Mathieu-Daudé
` (4 more replies)
0 siblings, 5 replies; 10+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-05-18 14:03 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Paolo Bonzini, Igor Mitsyanko, Alistair Francis,
Philippe Mathieu-Daudé,
qemu-arm, Marc-André Lureau, Edgar E. Iglesias
When fuzzing the devices, we don't want the whole process to
exit calling hw_error().
Replace these calls by qemu_log_mask LOG_GUEST_ERROR/LOG_UNIMP
when possible.
Since v1: Fixed uninitialized variable
Philippe Mathieu-Daudé (4):
hw/arm/integratorcp: Replace hw_error() by qemu_log_mask()
hw/arm/pxa2xx: Replace hw_error() by qemu_log_mask()
hw/char/xilinx_uartlite: Replace hw_error() by qemu_log_mask()
hw/timer/exynos4210_mct: Replace hw_error() by qemu_log_mask()
hw/arm/integratorcp.c | 23 +++++++++++++++--------
hw/arm/pxa2xx_gpio.c | 7 ++++---
hw/char/xilinx_uartlite.c | 5 +++--
hw/display/pxa2xx_lcd.c | 8 +++++---
hw/dma/pxa2xx_dma.c | 14 +++++++++-----
hw/timer/exynos4210_mct.c | 12 +++++-------
6 files changed, 41 insertions(+), 28 deletions(-)
--
2.21.3
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v2 1/4] hw/arm/integratorcp: Replace hw_error() by qemu_log_mask()
2020-05-18 14:03 [PATCH v2 0/4] hw/arm: Replace hw_error() by qemu_log_mask() Philippe Mathieu-Daudé
@ 2020-05-18 14:03 ` Philippe Mathieu-Daudé
2020-05-18 16:41 ` Alistair Francis
2020-05-18 14:03 ` [PATCH v2 2/4] hw/arm/pxa2xx: " Philippe Mathieu-Daudé
` (3 subsequent siblings)
4 siblings, 1 reply; 10+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-05-18 14:03 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Paolo Bonzini, Igor Mitsyanko, Alistair Francis,
Philippe Mathieu-Daudé,
qemu-arm, Marc-André Lureau, Edgar E. Iglesias
hw_error() calls exit(). This a bit overkill when we can log
the accesses as unimplemented or guest error.
When fuzzing the devices, we don't want the whole process to
exit. Replace some hw_error() calls by qemu_log_mask().
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
hw/arm/integratorcp.c | 23 +++++++++++++++--------
1 file changed, 15 insertions(+), 8 deletions(-)
diff --git a/hw/arm/integratorcp.c b/hw/arm/integratorcp.c
index 6d69010d06..5fb54e5aa7 100644
--- a/hw/arm/integratorcp.c
+++ b/hw/arm/integratorcp.c
@@ -20,6 +20,7 @@
#include "exec/address-spaces.h"
#include "sysemu/runstate.h"
#include "sysemu/sysemu.h"
+#include "qemu/log.h"
#include "qemu/error-report.h"
#include "hw/char/pl011.h"
#include "hw/hw.h"
@@ -144,8 +145,9 @@ static uint64_t integratorcm_read(void *opaque, hwaddr offset,
/* ??? Voltage control unimplemented. */
return 0;
default:
- hw_error("integratorcm_read: Unimplemented offset 0x%x\n",
- (int)offset);
+ qemu_log_mask(LOG_UNIMP,
+ "%s: Unimplemented offset 0x%" HWADDR_PRIX "\n",
+ __func__, offset);
return 0;
}
}
@@ -252,8 +254,9 @@ static void integratorcm_write(void *opaque, hwaddr offset,
/* ??? Voltage control unimplemented. */
break;
default:
- hw_error("integratorcm_write: Unimplemented offset 0x%x\n",
- (int)offset);
+ qemu_log_mask(LOG_UNIMP,
+ "%s: Unimplemented offset 0x%" HWADDR_PRIX "\n",
+ __func__, offset);
break;
}
}
@@ -394,7 +397,8 @@ static uint64_t icp_pic_read(void *opaque, hwaddr offset,
case 5: /* INT_SOFTCLR */
case 11: /* FRQ_ENABLECLR */
default:
- printf ("icp_pic_read: Bad register offset 0x%x\n", (int)offset);
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIX "\n",
+ __func__, offset);
return 0;
}
}
@@ -430,7 +434,8 @@ static void icp_pic_write(void *opaque, hwaddr offset,
case 8: /* FRQ_STATUS */
case 9: /* FRQ_RAWSTAT */
default:
- printf ("icp_pic_write: Bad register offset 0x%x\n", (int)offset);
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIX "\n",
+ __func__, offset);
return;
}
icp_pic_update(s);
@@ -504,7 +509,8 @@ static uint64_t icp_control_read(void *opaque, hwaddr offset,
case 3: /* CP_DECODE */
return 0x11;
default:
- hw_error("icp_control_read: Bad offset %x\n", (int)offset);
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIX "\n",
+ __func__, offset);
return 0;
}
}
@@ -524,7 +530,8 @@ static void icp_control_write(void *opaque, hwaddr offset,
/* Nothing interesting implemented yet. */
break;
default:
- hw_error("icp_control_write: Bad offset %x\n", (int)offset);
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIX "\n",
+ __func__, offset);
}
}
--
2.21.3
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH v2 2/4] hw/arm/pxa2xx: Replace hw_error() by qemu_log_mask()
2020-05-18 14:03 [PATCH v2 0/4] hw/arm: Replace hw_error() by qemu_log_mask() Philippe Mathieu-Daudé
2020-05-18 14:03 ` [PATCH v2 1/4] hw/arm/integratorcp: " Philippe Mathieu-Daudé
@ 2020-05-18 14:03 ` Philippe Mathieu-Daudé
2020-05-18 16:43 ` Alistair Francis
2020-05-18 14:03 ` [PATCH v2 3/4] hw/char/xilinx_uartlite: " Philippe Mathieu-Daudé
` (2 subsequent siblings)
4 siblings, 1 reply; 10+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-05-18 14:03 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Paolo Bonzini, Igor Mitsyanko, Alistair Francis,
Philippe Mathieu-Daudé,
qemu-arm, Marc-André Lureau, Edgar E. Iglesias
hw_error() calls exit(). This a bit overkill when we can log
the accesses as unimplemented or guest error.
When fuzzing the devices, we don't want the whole process to
exit. Replace some hw_error() calls by qemu_log_mask().
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
hw/arm/pxa2xx_gpio.c | 7 ++++---
hw/display/pxa2xx_lcd.c | 8 +++++---
hw/dma/pxa2xx_dma.c | 14 +++++++++-----
3 files changed, 18 insertions(+), 11 deletions(-)
diff --git a/hw/arm/pxa2xx_gpio.c b/hw/arm/pxa2xx_gpio.c
index f8df3cc227..a01db54a51 100644
--- a/hw/arm/pxa2xx_gpio.c
+++ b/hw/arm/pxa2xx_gpio.c
@@ -9,7 +9,6 @@
#include "qemu/osdep.h"
#include "cpu.h"
-#include "hw/hw.h"
#include "hw/irq.h"
#include "hw/qdev-properties.h"
#include "hw/sysbus.h"
@@ -199,7 +198,8 @@ static uint64_t pxa2xx_gpio_read(void *opaque, hwaddr offset,
return s->status[bank];
default:
- hw_error("%s: Bad offset " REG_FMT "\n", __func__, offset);
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIX "\n",
+ __func__, offset);
}
return 0;
@@ -252,7 +252,8 @@ static void pxa2xx_gpio_write(void *opaque, hwaddr offset,
break;
default:
- hw_error("%s: Bad offset " REG_FMT "\n", __func__, offset);
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIX "\n",
+ __func__, offset);
}
}
diff --git a/hw/display/pxa2xx_lcd.c b/hw/display/pxa2xx_lcd.c
index 464e93161a..d5f2e82a4e 100644
--- a/hw/display/pxa2xx_lcd.c
+++ b/hw/display/pxa2xx_lcd.c
@@ -11,7 +11,7 @@
*/
#include "qemu/osdep.h"
-#include "hw/hw.h"
+#include "qemu/log.h"
#include "hw/irq.h"
#include "migration/vmstate.h"
#include "ui/console.h"
@@ -407,7 +407,8 @@ static uint64_t pxa2xx_lcdc_read(void *opaque, hwaddr offset,
default:
fail:
- hw_error("%s: Bad offset " REG_FMT "\n", __func__, offset);
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIX "\n",
+ __func__, offset);
}
return 0;
@@ -562,7 +563,8 @@ static void pxa2xx_lcdc_write(void *opaque, hwaddr offset,
default:
fail:
- hw_error("%s: Bad offset " REG_FMT "\n", __func__, offset);
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIX "\n",
+ __func__, offset);
}
}
diff --git a/hw/dma/pxa2xx_dma.c b/hw/dma/pxa2xx_dma.c
index 88ed4b6ff1..8a2eeb32bc 100644
--- a/hw/dma/pxa2xx_dma.c
+++ b/hw/dma/pxa2xx_dma.c
@@ -9,6 +9,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/log.h"
#include "hw/hw.h"
#include "hw/irq.h"
#include "hw/qdev-properties.h"
@@ -268,7 +269,8 @@ static uint64_t pxa2xx_dma_read(void *opaque, hwaddr offset,
unsigned int channel;
if (size != 4) {
- hw_error("%s: Bad access width\n", __func__);
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad access width %u\n",
+ __func__, size);
return 5;
}
@@ -315,8 +317,8 @@ static uint64_t pxa2xx_dma_read(void *opaque, hwaddr offset,
return s->chan[channel].cmd;
}
}
-
- hw_error("%s: Bad offset 0x" TARGET_FMT_plx "\n", __func__, offset);
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIX "\n",
+ __func__, offset);
return 7;
}
@@ -327,7 +329,8 @@ static void pxa2xx_dma_write(void *opaque, hwaddr offset,
unsigned int channel;
if (size != 4) {
- hw_error("%s: Bad access width\n", __func__);
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad access width %u\n",
+ __func__, size);
return;
}
@@ -420,7 +423,8 @@ static void pxa2xx_dma_write(void *opaque, hwaddr offset,
break;
}
fail:
- hw_error("%s: Bad offset " TARGET_FMT_plx "\n", __func__, offset);
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIX "\n",
+ __func__, offset);
}
}
--
2.21.3
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH v2 3/4] hw/char/xilinx_uartlite: Replace hw_error() by qemu_log_mask()
2020-05-18 14:03 [PATCH v2 0/4] hw/arm: Replace hw_error() by qemu_log_mask() Philippe Mathieu-Daudé
2020-05-18 14:03 ` [PATCH v2 1/4] hw/arm/integratorcp: " Philippe Mathieu-Daudé
2020-05-18 14:03 ` [PATCH v2 2/4] hw/arm/pxa2xx: " Philippe Mathieu-Daudé
@ 2020-05-18 14:03 ` Philippe Mathieu-Daudé
2020-05-18 16:43 ` Alistair Francis
2020-05-18 14:03 ` [PATCH v2 4/4] hw/timer/exynos4210_mct: " Philippe Mathieu-Daudé
2020-05-21 16:05 ` [PATCH v2 0/4] hw/arm: " Peter Maydell
4 siblings, 1 reply; 10+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-05-18 14:03 UTC (permalink / raw)
To: qemu-devel
Cc: Edgar E . Iglesias, Peter Maydell, Paolo Bonzini, Igor Mitsyanko,
Alistair Francis, Philippe Mathieu-Daudé,
qemu-arm, Marc-André Lureau, Edgar E. Iglesias
hw_error() calls exit(). This a bit overkill when we can log
the accesses as unimplemented or guest error.
When fuzzing the devices, we don't want the whole process to
exit. Replace some hw_error() calls by qemu_log_mask().
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
hw/char/xilinx_uartlite.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/hw/char/xilinx_uartlite.c b/hw/char/xilinx_uartlite.c
index c6512285d7..ae4ccd00c7 100644
--- a/hw/char/xilinx_uartlite.c
+++ b/hw/char/xilinx_uartlite.c
@@ -23,7 +23,7 @@
*/
#include "qemu/osdep.h"
-#include "hw/hw.h"
+#include "qemu/log.h"
#include "hw/irq.h"
#include "hw/qdev-properties.h"
#include "hw/sysbus.h"
@@ -135,7 +135,8 @@ uart_write(void *opaque, hwaddr addr,
switch (addr)
{
case R_STATUS:
- hw_error("write to UART STATUS?\n");
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: write to UART STATUS\n",
+ __func__);
break;
case R_CTRL:
--
2.21.3
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH v2 4/4] hw/timer/exynos4210_mct: Replace hw_error() by qemu_log_mask()
2020-05-18 14:03 [PATCH v2 0/4] hw/arm: Replace hw_error() by qemu_log_mask() Philippe Mathieu-Daudé
` (2 preceding siblings ...)
2020-05-18 14:03 ` [PATCH v2 3/4] hw/char/xilinx_uartlite: " Philippe Mathieu-Daudé
@ 2020-05-18 14:03 ` Philippe Mathieu-Daudé
2020-05-18 16:44 ` Alistair Francis
2020-05-21 16:05 ` [PATCH v2 0/4] hw/arm: " Peter Maydell
4 siblings, 1 reply; 10+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-05-18 14:03 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Paolo Bonzini, Igor Mitsyanko, Alistair Francis,
Philippe Mathieu-Daudé,
qemu-arm, Marc-André Lureau, Edgar E. Iglesias
hw_error() calls exit(). This a bit overkill when we can log
the accesses as unimplemented or guest error.
When fuzzing the devices, we don't want the whole process to
exit. Replace some hw_error() calls by qemu_log_mask().
Per the datasheet "Exynos 4412 RISC Microprocessor Rev 1.00"
Chapter 25 "Multi Core Timer (MCT)" figure 1 and table 4,
the default value on the APB bus is 0.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
v2: Fixes -Wsometimes-uninitialized:
hw/timer/exynos4210_mct.c:1158:5: error: variable 'value' is used uninitialized whenever switch default is taken [-Werror,-Wsometimes-uninitialized]
default:
^~~~~~~
hw/timer/exynos4210_mct.c:1163:12: note: uninitialized use occurs here
return value;
^~~~~
hw/timer/exynos4210_mct.c:1063:19: note: initialize the variable 'value' to silence this warning
uint32_t value;
^
= 0
---
hw/timer/exynos4210_mct.c | 12 +++++-------
1 file changed, 5 insertions(+), 7 deletions(-)
diff --git a/hw/timer/exynos4210_mct.c b/hw/timer/exynos4210_mct.c
index 570cf7075b..29a4b10676 100644
--- a/hw/timer/exynos4210_mct.c
+++ b/hw/timer/exynos4210_mct.c
@@ -54,7 +54,6 @@
#include "qemu/osdep.h"
#include "qemu/log.h"
-#include "hw/hw.h"
#include "hw/sysbus.h"
#include "migration/vmstate.h"
#include "qemu/timer.h"
@@ -62,7 +61,6 @@
#include "hw/ptimer.h"
#include "hw/arm/exynos4210.h"
-#include "hw/hw.h"
#include "hw/irq.h"
//#define DEBUG_MCT
@@ -1062,7 +1060,7 @@ static uint64_t exynos4210_mct_read(void *opaque, hwaddr offset,
int index;
int shift;
uint64_t count;
- uint32_t value;
+ uint32_t value = 0;
int lt_i;
switch (offset) {
@@ -1158,8 +1156,8 @@ static uint64_t exynos4210_mct_read(void *opaque, hwaddr offset,
break;
default:
- hw_error("exynos4210.mct: bad read offset "
- TARGET_FMT_plx "\n", offset);
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIX "\n",
+ __func__, offset);
break;
}
return value;
@@ -1484,8 +1482,8 @@ static void exynos4210_mct_write(void *opaque, hwaddr offset,
break;
default:
- hw_error("exynos4210.mct: bad write offset "
- TARGET_FMT_plx "\n", offset);
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIX "\n",
+ __func__, offset);
break;
}
}
--
2.21.3
^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH v2 1/4] hw/arm/integratorcp: Replace hw_error() by qemu_log_mask()
2020-05-18 14:03 ` [PATCH v2 1/4] hw/arm/integratorcp: " Philippe Mathieu-Daudé
@ 2020-05-18 16:41 ` Alistair Francis
0 siblings, 0 replies; 10+ messages in thread
From: Alistair Francis @ 2020-05-18 16:41 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Peter Maydell, Igor Mitsyanko, Alistair Francis,
Edgar E. Iglesias, qemu-devel@nongnu.org Developers, qemu-arm,
Marc-André Lureau, Paolo Bonzini
On Mon, May 18, 2020 at 7:03 AM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> hw_error() calls exit(). This a bit overkill when we can log
> the accesses as unimplemented or guest error.
>
> When fuzzing the devices, we don't want the whole process to
> exit. Replace some hw_error() calls by qemu_log_mask().
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> hw/arm/integratorcp.c | 23 +++++++++++++++--------
> 1 file changed, 15 insertions(+), 8 deletions(-)
>
> diff --git a/hw/arm/integratorcp.c b/hw/arm/integratorcp.c
> index 6d69010d06..5fb54e5aa7 100644
> --- a/hw/arm/integratorcp.c
> +++ b/hw/arm/integratorcp.c
> @@ -20,6 +20,7 @@
> #include "exec/address-spaces.h"
> #include "sysemu/runstate.h"
> #include "sysemu/sysemu.h"
> +#include "qemu/log.h"
> #include "qemu/error-report.h"
> #include "hw/char/pl011.h"
> #include "hw/hw.h"
> @@ -144,8 +145,9 @@ static uint64_t integratorcm_read(void *opaque, hwaddr offset,
> /* ??? Voltage control unimplemented. */
> return 0;
> default:
> - hw_error("integratorcm_read: Unimplemented offset 0x%x\n",
> - (int)offset);
> + qemu_log_mask(LOG_UNIMP,
> + "%s: Unimplemented offset 0x%" HWADDR_PRIX "\n",
> + __func__, offset);
> return 0;
> }
> }
> @@ -252,8 +254,9 @@ static void integratorcm_write(void *opaque, hwaddr offset,
> /* ??? Voltage control unimplemented. */
> break;
> default:
> - hw_error("integratorcm_write: Unimplemented offset 0x%x\n",
> - (int)offset);
> + qemu_log_mask(LOG_UNIMP,
> + "%s: Unimplemented offset 0x%" HWADDR_PRIX "\n",
> + __func__, offset);
> break;
> }
> }
> @@ -394,7 +397,8 @@ static uint64_t icp_pic_read(void *opaque, hwaddr offset,
> case 5: /* INT_SOFTCLR */
> case 11: /* FRQ_ENABLECLR */
> default:
> - printf ("icp_pic_read: Bad register offset 0x%x\n", (int)offset);
> + qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIX "\n",
> + __func__, offset);
> return 0;
> }
> }
> @@ -430,7 +434,8 @@ static void icp_pic_write(void *opaque, hwaddr offset,
> case 8: /* FRQ_STATUS */
> case 9: /* FRQ_RAWSTAT */
> default:
> - printf ("icp_pic_write: Bad register offset 0x%x\n", (int)offset);
> + qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIX "\n",
> + __func__, offset);
> return;
> }
> icp_pic_update(s);
> @@ -504,7 +509,8 @@ static uint64_t icp_control_read(void *opaque, hwaddr offset,
> case 3: /* CP_DECODE */
> return 0x11;
> default:
> - hw_error("icp_control_read: Bad offset %x\n", (int)offset);
> + qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIX "\n",
> + __func__, offset);
> return 0;
> }
> }
> @@ -524,7 +530,8 @@ static void icp_control_write(void *opaque, hwaddr offset,
> /* Nothing interesting implemented yet. */
> break;
> default:
> - hw_error("icp_control_write: Bad offset %x\n", (int)offset);
> + qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIX "\n",
> + __func__, offset);
> }
> }
>
> --
> 2.21.3
>
>
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v2 2/4] hw/arm/pxa2xx: Replace hw_error() by qemu_log_mask()
2020-05-18 14:03 ` [PATCH v2 2/4] hw/arm/pxa2xx: " Philippe Mathieu-Daudé
@ 2020-05-18 16:43 ` Alistair Francis
0 siblings, 0 replies; 10+ messages in thread
From: Alistair Francis @ 2020-05-18 16:43 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Peter Maydell, Igor Mitsyanko, Alistair Francis,
Edgar E. Iglesias, qemu-devel@nongnu.org Developers, qemu-arm,
Marc-André Lureau, Paolo Bonzini
On Mon, May 18, 2020 at 7:03 AM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> hw_error() calls exit(). This a bit overkill when we can log
> the accesses as unimplemented or guest error.
>
> When fuzzing the devices, we don't want the whole process to
> exit. Replace some hw_error() calls by qemu_log_mask().
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> hw/arm/pxa2xx_gpio.c | 7 ++++---
> hw/display/pxa2xx_lcd.c | 8 +++++---
> hw/dma/pxa2xx_dma.c | 14 +++++++++-----
> 3 files changed, 18 insertions(+), 11 deletions(-)
>
> diff --git a/hw/arm/pxa2xx_gpio.c b/hw/arm/pxa2xx_gpio.c
> index f8df3cc227..a01db54a51 100644
> --- a/hw/arm/pxa2xx_gpio.c
> +++ b/hw/arm/pxa2xx_gpio.c
> @@ -9,7 +9,6 @@
>
> #include "qemu/osdep.h"
> #include "cpu.h"
> -#include "hw/hw.h"
> #include "hw/irq.h"
> #include "hw/qdev-properties.h"
> #include "hw/sysbus.h"
> @@ -199,7 +198,8 @@ static uint64_t pxa2xx_gpio_read(void *opaque, hwaddr offset,
> return s->status[bank];
>
> default:
> - hw_error("%s: Bad offset " REG_FMT "\n", __func__, offset);
> + qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIX "\n",
> + __func__, offset);
> }
>
> return 0;
> @@ -252,7 +252,8 @@ static void pxa2xx_gpio_write(void *opaque, hwaddr offset,
> break;
>
> default:
> - hw_error("%s: Bad offset " REG_FMT "\n", __func__, offset);
> + qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIX "\n",
> + __func__, offset);
> }
> }
>
> diff --git a/hw/display/pxa2xx_lcd.c b/hw/display/pxa2xx_lcd.c
> index 464e93161a..d5f2e82a4e 100644
> --- a/hw/display/pxa2xx_lcd.c
> +++ b/hw/display/pxa2xx_lcd.c
> @@ -11,7 +11,7 @@
> */
>
> #include "qemu/osdep.h"
> -#include "hw/hw.h"
> +#include "qemu/log.h"
> #include "hw/irq.h"
> #include "migration/vmstate.h"
> #include "ui/console.h"
> @@ -407,7 +407,8 @@ static uint64_t pxa2xx_lcdc_read(void *opaque, hwaddr offset,
>
> default:
> fail:
> - hw_error("%s: Bad offset " REG_FMT "\n", __func__, offset);
> + qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIX "\n",
> + __func__, offset);
> }
>
> return 0;
> @@ -562,7 +563,8 @@ static void pxa2xx_lcdc_write(void *opaque, hwaddr offset,
>
> default:
> fail:
> - hw_error("%s: Bad offset " REG_FMT "\n", __func__, offset);
> + qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIX "\n",
> + __func__, offset);
> }
> }
>
> diff --git a/hw/dma/pxa2xx_dma.c b/hw/dma/pxa2xx_dma.c
> index 88ed4b6ff1..8a2eeb32bc 100644
> --- a/hw/dma/pxa2xx_dma.c
> +++ b/hw/dma/pxa2xx_dma.c
> @@ -9,6 +9,7 @@
> */
>
> #include "qemu/osdep.h"
> +#include "qemu/log.h"
> #include "hw/hw.h"
> #include "hw/irq.h"
> #include "hw/qdev-properties.h"
> @@ -268,7 +269,8 @@ static uint64_t pxa2xx_dma_read(void *opaque, hwaddr offset,
> unsigned int channel;
>
> if (size != 4) {
> - hw_error("%s: Bad access width\n", __func__);
> + qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad access width %u\n",
> + __func__, size);
> return 5;
> }
>
> @@ -315,8 +317,8 @@ static uint64_t pxa2xx_dma_read(void *opaque, hwaddr offset,
> return s->chan[channel].cmd;
> }
> }
> -
> - hw_error("%s: Bad offset 0x" TARGET_FMT_plx "\n", __func__, offset);
> + qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIX "\n",
> + __func__, offset);
> return 7;
> }
>
> @@ -327,7 +329,8 @@ static void pxa2xx_dma_write(void *opaque, hwaddr offset,
> unsigned int channel;
>
> if (size != 4) {
> - hw_error("%s: Bad access width\n", __func__);
> + qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad access width %u\n",
> + __func__, size);
> return;
> }
>
> @@ -420,7 +423,8 @@ static void pxa2xx_dma_write(void *opaque, hwaddr offset,
> break;
> }
> fail:
> - hw_error("%s: Bad offset " TARGET_FMT_plx "\n", __func__, offset);
> + qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIX "\n",
> + __func__, offset);
> }
> }
>
> --
> 2.21.3
>
>
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v2 3/4] hw/char/xilinx_uartlite: Replace hw_error() by qemu_log_mask()
2020-05-18 14:03 ` [PATCH v2 3/4] hw/char/xilinx_uartlite: " Philippe Mathieu-Daudé
@ 2020-05-18 16:43 ` Alistair Francis
0 siblings, 0 replies; 10+ messages in thread
From: Alistair Francis @ 2020-05-18 16:43 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Edgar E . Iglesias, Peter Maydell, Igor Mitsyanko,
Alistair Francis, Edgar E. Iglesias,
qemu-devel@nongnu.org Developers, qemu-arm,
Marc-André Lureau, Paolo Bonzini
On Mon, May 18, 2020 at 7:04 AM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> hw_error() calls exit(). This a bit overkill when we can log
> the accesses as unimplemented or guest error.
>
> When fuzzing the devices, we don't want the whole process to
> exit. Replace some hw_error() calls by qemu_log_mask().
>
> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> hw/char/xilinx_uartlite.c | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/hw/char/xilinx_uartlite.c b/hw/char/xilinx_uartlite.c
> index c6512285d7..ae4ccd00c7 100644
> --- a/hw/char/xilinx_uartlite.c
> +++ b/hw/char/xilinx_uartlite.c
> @@ -23,7 +23,7 @@
> */
>
> #include "qemu/osdep.h"
> -#include "hw/hw.h"
> +#include "qemu/log.h"
> #include "hw/irq.h"
> #include "hw/qdev-properties.h"
> #include "hw/sysbus.h"
> @@ -135,7 +135,8 @@ uart_write(void *opaque, hwaddr addr,
> switch (addr)
> {
> case R_STATUS:
> - hw_error("write to UART STATUS?\n");
> + qemu_log_mask(LOG_GUEST_ERROR, "%s: write to UART STATUS\n",
> + __func__);
> break;
>
> case R_CTRL:
> --
> 2.21.3
>
>
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v2 4/4] hw/timer/exynos4210_mct: Replace hw_error() by qemu_log_mask()
2020-05-18 14:03 ` [PATCH v2 4/4] hw/timer/exynos4210_mct: " Philippe Mathieu-Daudé
@ 2020-05-18 16:44 ` Alistair Francis
0 siblings, 0 replies; 10+ messages in thread
From: Alistair Francis @ 2020-05-18 16:44 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Peter Maydell, Igor Mitsyanko, Alistair Francis,
Edgar E. Iglesias, qemu-devel@nongnu.org Developers, qemu-arm,
Marc-André Lureau, Paolo Bonzini
On Mon, May 18, 2020 at 7:05 AM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> hw_error() calls exit(). This a bit overkill when we can log
> the accesses as unimplemented or guest error.
>
> When fuzzing the devices, we don't want the whole process to
> exit. Replace some hw_error() calls by qemu_log_mask().
>
> Per the datasheet "Exynos 4412 RISC Microprocessor Rev 1.00"
> Chapter 25 "Multi Core Timer (MCT)" figure 1 and table 4,
> the default value on the APB bus is 0.
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> v2: Fixes -Wsometimes-uninitialized:
>
> hw/timer/exynos4210_mct.c:1158:5: error: variable 'value' is used uninitialized whenever switch default is taken [-Werror,-Wsometimes-uninitialized]
> default:
> ^~~~~~~
> hw/timer/exynos4210_mct.c:1163:12: note: uninitialized use occurs here
> return value;
> ^~~~~
> hw/timer/exynos4210_mct.c:1063:19: note: initialize the variable 'value' to silence this warning
> uint32_t value;
> ^
> = 0
> ---
> hw/timer/exynos4210_mct.c | 12 +++++-------
> 1 file changed, 5 insertions(+), 7 deletions(-)
>
> diff --git a/hw/timer/exynos4210_mct.c b/hw/timer/exynos4210_mct.c
> index 570cf7075b..29a4b10676 100644
> --- a/hw/timer/exynos4210_mct.c
> +++ b/hw/timer/exynos4210_mct.c
> @@ -54,7 +54,6 @@
>
> #include "qemu/osdep.h"
> #include "qemu/log.h"
> -#include "hw/hw.h"
> #include "hw/sysbus.h"
> #include "migration/vmstate.h"
> #include "qemu/timer.h"
> @@ -62,7 +61,6 @@
> #include "hw/ptimer.h"
>
> #include "hw/arm/exynos4210.h"
> -#include "hw/hw.h"
> #include "hw/irq.h"
>
> //#define DEBUG_MCT
> @@ -1062,7 +1060,7 @@ static uint64_t exynos4210_mct_read(void *opaque, hwaddr offset,
> int index;
> int shift;
> uint64_t count;
> - uint32_t value;
> + uint32_t value = 0;
> int lt_i;
>
> switch (offset) {
> @@ -1158,8 +1156,8 @@ static uint64_t exynos4210_mct_read(void *opaque, hwaddr offset,
> break;
>
> default:
> - hw_error("exynos4210.mct: bad read offset "
> - TARGET_FMT_plx "\n", offset);
> + qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIX "\n",
> + __func__, offset);
> break;
> }
> return value;
> @@ -1484,8 +1482,8 @@ static void exynos4210_mct_write(void *opaque, hwaddr offset,
> break;
>
> default:
> - hw_error("exynos4210.mct: bad write offset "
> - TARGET_FMT_plx "\n", offset);
> + qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIX "\n",
> + __func__, offset);
> break;
> }
> }
> --
> 2.21.3
>
>
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v2 0/4] hw/arm: Replace hw_error() by qemu_log_mask()
2020-05-18 14:03 [PATCH v2 0/4] hw/arm: Replace hw_error() by qemu_log_mask() Philippe Mathieu-Daudé
` (3 preceding siblings ...)
2020-05-18 14:03 ` [PATCH v2 4/4] hw/timer/exynos4210_mct: " Philippe Mathieu-Daudé
@ 2020-05-21 16:05 ` Peter Maydell
4 siblings, 0 replies; 10+ messages in thread
From: Peter Maydell @ 2020-05-21 16:05 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Paolo Bonzini, Igor Mitsyanko, Alistair Francis, QEMU Developers,
qemu-arm, Marc-André Lureau, Edgar E. Iglesias
On Mon, 18 May 2020 at 15:03, Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> When fuzzing the devices, we don't want the whole process to
> exit calling hw_error().
> Replace these calls by qemu_log_mask LOG_GUEST_ERROR/LOG_UNIMP
> when possible.
>
> Since v1: Fixed uninitialized variable
>
> Philippe Mathieu-Daudé (4):
> hw/arm/integratorcp: Replace hw_error() by qemu_log_mask()
> hw/arm/pxa2xx: Replace hw_error() by qemu_log_mask()
> hw/char/xilinx_uartlite: Replace hw_error() by qemu_log_mask()
> hw/timer/exynos4210_mct: Replace hw_error() by qemu_log_mask()
Applied to target-arm.next, thanks.
-- PMM
^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2020-05-21 16:10 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-05-18 14:03 [PATCH v2 0/4] hw/arm: Replace hw_error() by qemu_log_mask() Philippe Mathieu-Daudé
2020-05-18 14:03 ` [PATCH v2 1/4] hw/arm/integratorcp: " Philippe Mathieu-Daudé
2020-05-18 16:41 ` Alistair Francis
2020-05-18 14:03 ` [PATCH v2 2/4] hw/arm/pxa2xx: " Philippe Mathieu-Daudé
2020-05-18 16:43 ` Alistair Francis
2020-05-18 14:03 ` [PATCH v2 3/4] hw/char/xilinx_uartlite: " Philippe Mathieu-Daudé
2020-05-18 16:43 ` Alistair Francis
2020-05-18 14:03 ` [PATCH v2 4/4] hw/timer/exynos4210_mct: " Philippe Mathieu-Daudé
2020-05-18 16:44 ` Alistair Francis
2020-05-21 16:05 ` [PATCH v2 0/4] hw/arm: " Peter Maydell
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.